JPS61139054A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61139054A JPS61139054A JP59261070A JP26107084A JPS61139054A JP S61139054 A JPS61139054 A JP S61139054A JP 59261070 A JP59261070 A JP 59261070A JP 26107084 A JP26107084 A JP 26107084A JP S61139054 A JPS61139054 A JP S61139054A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- conductor
- pellet
- semiconductor
- connecting terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/40227—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Abstract
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は、半導体装置に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a semiconductor device.
従来、電源整流等の整流素子として使用される半導体装
置は、第２図に示すような構造を侑している。図中１は
、冷却フィンとなる放熱基板である。放熱基板１は、筐
体２の床部を構成している。放熱基板１上には、絶縁層
３が形成されている。絶縁層３上には、所定ツクターン
の導体４が形成されている。導体４上には、半田層５を
介して半導体ペレット６が装着されている。半導体ペレ
ット６には、接続端子７の一端部が半田層５を介して装
着されている。接続端子７は、断面路り字形をなし、そ
の他端部を筐体２の外部に導出している。筐体２内の半
導体ペレット６及び接続端子の一端部等は、樹脂封止体
８で一体に封止されている。2. Description of the Related Art Conventionally, a semiconductor device used as a rectifying element for power supply rectification, etc. has a structure as shown in FIG. In the figure, numeral 1 is a heat dissipation board that becomes a cooling fin. The heat dissipation board 1 constitutes the floor of the housing 2. An insulating layer 3 is formed on the heat dissipation substrate 1. A conductor 4 of a predetermined turn is formed on the insulating layer 3. A semiconductor pellet 6 is mounted on the conductor 4 with a solder layer 5 interposed therebetween. One end of a connection terminal 7 is attached to the semiconductor pellet 6 via the solder layer 5. The connection terminal 7 has a cross-sectional shape, and the other end is led out of the housing 2 . The semiconductor pellet 6 and one end of the connection terminal inside the housing 2 are integrally sealed with a resin sealing body 8.
上述のように構成された半導体装置１０は、熱疲労特性
、耐湿性、及び耐衝撃性について次のような問題があっ
た。The semiconductor device 10 configured as described above has the following problems regarding thermal fatigue characteristics, moisture resistance, and impact resistance.
（１）熱疲労特性の問題点
半導体ペレット６の熱容量は、放熱基板１側よシも接続
端子７側の方が小さい。このため熱疲労試験を行うと、
接続端子７側の湿度上昇が大きく、半田層５に亀裂が発
生し易い。また、熱疲労試験の際に半導体ペレット６０
発熱によりて樹脂封止体８が膨張する。このため半田層
５内での亀裂の発生、成長を助長する。(1) Problems with thermal fatigue characteristics The heat capacity of the semiconductor pellet 6 is smaller on the connection terminal 7 side than on the heat dissipation board 1 side. For this reason, when performing a thermal fatigue test,
The humidity on the connection terminal 7 side increases significantly, and cracks are likely to occur in the solder layer 5. In addition, during thermal fatigue testing, semiconductor pellets 60
The resin sealing body 8 expands due to the heat generation. This encourages the generation and growth of cracks within the solder layer 5.
（２）耐湿性の問題点
樹脂封止体８と接続端子７間で最も湿気を吸い易い。従
って、樹脂封止体８内の接続端子７の長さが短い従来の
半導体装置１ｏでは、湿気による特性劣化が起き易い。(2) Problems with moisture resistance Moisture is most likely to be absorbed between the resin sealing body 8 and the connection terminal 7. Therefore, in the conventional semiconductor device 1o in which the length of the connecting terminal 7 within the resin sealing body 8 is short, characteristics deterioration due to moisture is likely to occur.
（３）耐衝撃性の問題点
接続端子１に外力が加わると、直接半導体ペレット６や
半田層５にその外力が伝達される。(3) Problems with impact resistance When an external force is applied to the connecting terminal 1, the external force is directly transmitted to the semiconductor pellet 6 and the solder layer 5.
このため半導体ペレット６及び半田層５が外力によって
破壊され易い。Therefore, the semiconductor pellet 6 and the solder layer 5 are easily destroyed by external force.
本発明は、熱疲労特性、耐湿性及び耐衝撃性の向上を図
った半導体装置を提供することその目的とするものであ
る。An object of the present invention is to provide a semiconductor device with improved thermal fatigue characteristics, moisture resistance, and impact resistance.
本発明は、ペレット装着用導体に装着された複数個の半
導体ペレットに接続端子を電気的に接続すると共に、こ
の接続端子を基板上の端子用導体に接続して外部に導出
するようにしたことにより、熱疲労特性、耐湿性及び耐
衝撃性の向上を達成した半導体装置である。The present invention electrically connects a connecting terminal to a plurality of semiconductor pellets attached to a pellet attaching conductor, and connects this connecting terminal to a terminal conductor on a board to lead it out to the outside. This is a semiconductor device that has improved thermal fatigue characteristics, moisture resistance, and impact resistance.
以下、本発明の実施例について図面を参照して説明する
。第１図は、本発明の一実施例の断面図である。図中２
０は金属からなる放熱基板である。放熱基板２０は、筐
体２１の床部を構成している。放熱基板２０上には、絶
縁層２２が形成されている。絶縁層２２上には、所定ノ
臂ターンのペレット装着用導体２３及び端子用導体２４
が夫々独立して形成されている。ペレット装着用導体２
３には、半田層２５を介して半導体４レフト２６が装着
されている。半導体ペレット２６には、接続端子２２の
一端部が半田層２５を介して電気的に接続されている。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of one embodiment of the present invention. 2 in the diagram
0 is a heat dissipation board made of metal. The heat dissipation board 20 constitutes a floor portion of the housing 21 . An insulating layer 22 is formed on the heat dissipation substrate 20. On the insulating layer 22 are a pellet mounting conductor 23 and a terminal conductor 24 with predetermined arm turns.
are formed independently. Conductor 2 for attaching pellets
A semiconductor 4 left 26 is attached to 3 through a solder layer 25. One end of the connection terminal 22 is electrically connected to the semiconductor pellet 26 via the solder layer 25 .
接続端子２７は、その所定領域を半田層２８を介して端
子用導体２４に接続し、他端部を筐体２１の外部に導出
している。筐体２ノ内の接続端子２７の一端部、半導体
ペレット２６、半田層２５．２８及び（レット装着用導
体２３、端子用導体２４は、樹脂封止体２９によって一
体に樹脂封止されている。The connection terminal 27 has a predetermined region connected to the terminal conductor 24 via the solder layer 28 , and the other end thereof is led out to the outside of the housing 21 . One end of the connection terminal 27 inside the housing 2, the semiconductor pellet 26, the solder layer 25, 28, the conductor 23 for attaching the pellet, and the conductor 24 for the terminal are integrally resin-sealed with a resin sealing body 29. .
このように構成された半導体装置とは、熱疲労特性、耐
湿性及び耐衝撃性について次のような効果を有する。The semiconductor device configured in this manner has the following effects in terms of thermal fatigue characteristics, moisture resistance, and impact resistance.
（１）熱疲労特性についての効果
接続端子２７の所定部分が半田層２８、端子用導体２４
及び絶縁層２２を順次介して放熱基板２０に接続してい
るので、熱疲労試験の際に半導体４レツト２６の放熱基
板２０側と接続端子２２側の熱容量の差を十分に小さく
することができる。その結果、熱疲労試験の際に半田層
２５．２１１中に亀裂が発生するのを防止することがで
きる。(1) Effect on thermal fatigue characteristics A predetermined portion of the connecting terminal 27 is connected to the solder layer 28 and the terminal conductor 24.
Since it is connected to the heat dissipation board 20 through the insulating layer 22 and the insulating layer 22 in order, the difference in heat capacity between the heat dissipation board 20 side and the connection terminal 22 side of the semiconductor 4-let 26 can be made sufficiently small during a thermal fatigue test. . As a result, it is possible to prevent cracks from forming in the solder layer 25, 211 during a thermal fatigue test.
（２）耐湿性についての効果
接続端子２２を半導体ペレット２６に達する前に端子用
導体２４に接続したことにより、接続端子２７の実質長
を長くして、半導体ペレット２６への湿気の侵入を抑制
することができもその結果、耐湿性を向上させることが
できる。(2) Effect on moisture resistance By connecting the connecting terminal 22 to the terminal conductor 24 before reaching the semiconductor pellet 26, the actual length of the connecting terminal 27 is increased and moisture intrusion into the semiconductor pellet 26 is suppressed. As a result, moisture resistance can be improved.
（３）耐衝撃性についての効果
接続端子２７が端子用導体２４に約２５ 鴫偏２以上の
接着力で固着されているので、外力に対してその分だけ
機械的強度を向上できると共Ｋ。(3) Effect on impact resistance Since the connecting terminal 27 is fixed to the terminal conductor 24 with an adhesive force of approximately 25 mm or more, the mechanical strength against external forces can be improved by that amount. .
この端子用導体２４との接続部で外力を吸収して、耐衝
撃性を向上させることができる。External force can be absorbed at the connection portion with the terminal conductor 24, and impact resistance can be improved.
以上説明した如く、本発明に係る半導体装置によれば、
熱疲労特性、耐湿性及び耐衝撃性を向上式せることがで
きるものである。As explained above, according to the semiconductor device according to the present invention,
It can improve thermal fatigue properties, moisture resistance, and impact resistance.
【図面の簡単な説明】
第１図は、本発明の一実施例の断面図、第２図は、従来
の半導体装置の断面図である。
２０・・・放熱基板、２１・・・筐体、２２・・・絶縁
層、２３・・・ペレット装着用導体、２４・・・端子用
導体、２５・・・半田層、２６・・・半導体ペレット、
２７・・・接続端子、２８・・・半田層、２９・・・樹
脂封止体、３０・・・半導体装置
出願人代理人 弁理士 鈴 江 武 彦第１図
第２図BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 20... Heat dissipation board, 21... Housing, 22... Insulating layer, 23... Conductor for pellet attachment, 24... Conductor for terminals, 25... Solder layer, 26... Semiconductor pellet,
27...Connection terminal, 28...Solder layer, 29...Resin sealing body, 30...Semiconductor device applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2
Claims (1)
のペレット装着用導体及び端子用導体と、該ペレット装
着用導体上に装着された半導体ペレットと、該半導体ペ
レットに一端部が電気的に接続され、かつ、前記一端部
以外の領域で前記端子用導体に接続すると共に、他端部
を外部に導出した接続端子と、該他端部以外の領域及び
前記半導体ペレット、前記ペレット装着用導体、前記端
子用導体、前記絶縁層を封止する樹脂封止体とを具備す
ることを特徴とする半導体装置。A conductor for pellet mounting and a terminal conductor of a predetermined pattern formed on a heat dissipation board via an insulating layer, a semiconductor pellet mounted on the conductor for pellet mounting, and one end electrically connected to the semiconductor pellet. and a connecting terminal connected to the terminal conductor in a region other than the one end and having the other end led out to the outside, a region other than the other end, the semiconductor pellet, the pellet mounting conductor, A semiconductor device comprising the terminal conductor and a resin sealing body for sealing the insulating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59261070A JPS61139054A (en) | 1984-12-11 | 1984-12-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59261070A JPS61139054A (en) | 1984-12-11 | 1984-12-11 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61139054A true JPS61139054A (en) | 1986-06-26 |
Family
ID=17356660
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59261070A Pending JPS61139054A (en) | 1984-12-11 | 1984-12-11 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61139054A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61157340U (en) * | 1985-03-20 | 1986-09-30 | ||
| JPH0297055A (en) * | 1988-10-04 | 1990-04-09 | Fuji Electric Co Ltd | Semiconductor device |
| US5506447A (en) * | 1993-06-15 | 1996-04-09 | Fuji Electric Co., Ltd. | Hybrid integrated circuit |
| JP2012059876A (en) * | 2010-09-08 | 2012-03-22 | Sanken Electric Co Ltd | Semiconductor module and manufacturing method of the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52127759A (en) * | 1976-04-20 | 1977-10-26 | Hitachi Ltd | Resin-seal type semiconductor unit |
| JPS57122550A (en) * | 1981-01-23 | 1982-07-30 | Hitachi Ltd | Semiconductor device |
-
1984
- 1984-12-11 JP JP59261070A patent/JPS61139054A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52127759A (en) * | 1976-04-20 | 1977-10-26 | Hitachi Ltd | Resin-seal type semiconductor unit |
| JPS57122550A (en) * | 1981-01-23 | 1982-07-30 | Hitachi Ltd | Semiconductor device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61157340U (en) * | 1985-03-20 | 1986-09-30 | ||
| JPH0297055A (en) * | 1988-10-04 | 1990-04-09 | Fuji Electric Co Ltd | Semiconductor device |
| US5506447A (en) * | 1993-06-15 | 1996-04-09 | Fuji Electric Co., Ltd. | Hybrid integrated circuit |
| JP2012059876A (en) * | 2010-09-08 | 2012-03-22 | Sanken Electric Co Ltd | Semiconductor module and manufacturing method of the same |
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