JPS61135263A - Transmission system of control signal - Google Patents
Transmission system of control signalInfo
- Publication number
- JPS61135263A JPS61135263A JP25644784A JP25644784A JPS61135263A JP S61135263 A JPS61135263 A JP S61135263A JP 25644784 A JP25644784 A JP 25644784A JP 25644784 A JP25644784 A JP 25644784A JP S61135263 A JPS61135263 A JP S61135263A
- Authority
- JP
- Japan
- Prior art keywords
- control signal
- input
- circuit
- pulse
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Dc Digital Transmission (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
この発明はボタン電話装置、EPBX等における主装置
と端末、又は電話機との制御信号の伝送方式に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a control signal transmission system between a main device and a terminal or telephone in a button telephone device, EPBX, etc.
(従来の技術)
従来ボタン電話装置1.EPBX等の主装置と端末又は
電話機との制御信号の伝送は、平衡伝送の場合はトラン
スを用いて信号を直接伝送している。(Prior art) Conventional button telephone device 1. In the case of balanced transmission, control signals are transmitted directly between a main device such as an EPBX and a terminal or telephone using a transformer.
(発明が解決しようとする問題点)
しかしながら信号のビット幅が長い場合や、NR,Z符
号でピット数が多い場合、使用するトランスは大形にな
り、かつ直流ドリフトにより性能の劣化やノイズマージ
ンが低下するという欠点があった。(Problem to be solved by the invention) However, when the bit width of the signal is long, or when the number of pits is large in NR and Z codes, the transformer used becomes large, and the performance deteriorates due to DC drift and the noise margin The disadvantage was that it decreased.
この発明の目的は小形のパルストランスを使用でき、安
価で高性能かつノイズマージンの大きい伝送方式を提供
することにある。An object of the present invention is to provide a transmission system that can use a small pulse transformer, is inexpensive, has high performance, and has a large noise margin.
(問題点を解決するための手段)
上記目的を達成するだめの本発明の特徴は、トランスを
介して制御信号をラインに送出する制御信号伝送方式に
おいて、制御信号をクロック信号で変調し、変調出力を
クロック毎に極性反転して直流分を除去した後前記トラ
ンスを介してラインに送出し、受信側では、受信信号を
両波検波した後低域濾波器を介して制御信号を再生する
制御信号伝送方式にある。(Means for Solving the Problems) A feature of the present invention to achieve the above object is that in a control signal transmission system in which a control signal is sent to a line via a transformer, the control signal is modulated by a clock signal. After inverting the polarity of the output every clock and removing the DC component, it is sent to the line via the transformer, and on the receiving side, the received signal is double-wave detected and then passed through a low-pass filter to reproduce the control signal. It's in the signal transmission method.
(作 用)
上記構成により、制御信号は変調され、かつ交互に極性
反転されてラインに送出される。従って、例え信号のピ
ント幅が広い場合やNRZでビット数が多し・場合にも
、伝送される信号は実質的に周波数の高い交流となり、
小形のトランスを介してラインに送出することかできる
。直流ドリフトによる問題も発生しない。受信側では受
信信号を両波検波した後低域F波器を介して制御信号を
再生する。信号が周波数の高い交流となるのでトランス
は小形でよく、安価でノイズマージンの大きな伝送方式
が得られる。(Function) With the above configuration, the control signal is modulated and sent to the line with its polarity alternately inverted. Therefore, even if the signal has a wide focus width or a large number of bits in NRZ, the transmitted signal will essentially be a high-frequency alternating current.
It can be sent to the line via a small transformer. There are no problems caused by DC drift. On the receiving side, after double-wave detection is performed on the received signal, a control signal is reproduced via a low-frequency F wave detector. Since the signal is a high-frequency alternating current, the transformer can be small, and an inexpensive transmission system with a large noise margin can be obtained.
(実施例)
第1図はこの発明の実施例を示す回路図であって、送信
側の入力端子1はデータ入力端子でありアンド回路IC
1の一方の入力に接続される。入力端子2は変調信号入
力端子でありアンド回路ICIのもう一方の入力に接続
される。アンド回路IC1の出力はナンド回路IC3,
’IC4の一方の入力に接続されると共にフリップフロ
ップIC2のクロック入力に接続される。フリップフロ
ップIC2の出力Qはナンド回路IC3の他方の入力、
Qはナンド回路IC4の他方の入力に接続される。(Embodiment) FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which the input terminal 1 on the transmitting side is a data input terminal, and the AND circuit IC
Connected to one input of 1. Input terminal 2 is a modulation signal input terminal and is connected to the other input of AND circuit ICI. The output of the AND circuit IC1 is the NAND circuit IC3,
' It is connected to one input of IC4 and also to the clock input of flip-flop IC2. The output Q of the flip-flop IC2 is the other input of the NAND circuit IC3,
Q is connected to the other input of the NAND circuit IC4.
ナンド回路IC3,rc4の出力はドライバ・レシーバ
回路DR,1の入力I、、I2に接続される。DR,1
のトランス側出力T、、T2はパルストランスPTIの
2次側に接続され、2次側のセンタは接地されている。The outputs of the NAND circuits IC3, rc4 are connected to inputs I, , I2 of the driver/receiver circuits DR,1. DR, 1
The transformer side outputs T, , T2 are connected to the secondary side of the pulse transformer PTI, and the center of the secondary side is grounded.
パルストランスPTIの1次側はライン出力であり、受
信側のパルストランスPT2の1次側にラインを通じて
接続されている。受信側のパルストランスPT2とドラ
イバ・レシーバ回路DR,2は送信側と同様に接続され
ている。受信側のドライバ・レシーバ回路DR,2のT
TL規格の出力Oは抵抗RとコンデンサCで構成される
低域r波器に接続され、r波器の出力は出力バッフ1B
を通り受信側の端子3に接続されたμcpu(マイクロ
プロセッサ)に入力される。The primary side of the pulse transformer PTI is a line output, and is connected to the primary side of the receiving side pulse transformer PT2 through a line. The pulse transformer PT2 and driver/receiver circuit DR,2 on the receiving side are connected in the same way as on the transmitting side. Receiving side driver/receiver circuit DR, T of 2
The TL standard output O is connected to a low-frequency r-wave generator consisting of a resistor R and a capacitor C, and the output of the r-wave generator is output to the output buffer 1B.
The signal is input to the μCPU (microprocessor) connected to terminal 3 on the receiving side.
先ず入力端子2に変調信号が入力されている状態で入力
端子1に”H”のデータが入力されると(図20A)、
変調されたパルス列がナンド回路IC3,4の一方の入
力端子に入力されるが(図20B)フリップフロップI
C2のQ、Qの状態によりナンド回路IC3,4のどち
らか一方だけに出力“L”があられれる。パルスの立下
りでナンド回路IC2のQ、 Qは反転するため次のパ
ルスで出力”LI+のあられれるIC(IC3又はIC
4)が変化する。ナンド回路IC3,4で駆動されるド
ライバケシ−3回路DRIは工、に″Ln入力があると
T1に・H・が出力され、T2にL”入力があるとT2
に1H”が出力される。そのためパルストランスT。First, when "H" data is input to input terminal 1 while a modulation signal is input to input terminal 2 (Fig. 20A),
The modulated pulse train is input to one input terminal of the NAND circuit IC3, IC4 (FIG. 20B), but the flip-flop I
Depending on the states of Q and Q of C2, only one of the NAND circuits IC3 and IC4 outputs "L". At the falling edge of the pulse, Q and Q of the NAND circuit IC2 are inverted, so the next pulse outputs "LI+" from the IC (IC3 or IC3).
4) changes. The driver Keshi-3 circuit DRI driven by the NAND circuit IC3 and IC4 outputs ・H・ to T1 when there is an ``Ln'' input to the circuit, and T2 when there is an ``L'' input to T2.
1H" is output. Therefore, the pulse transformer T.
は変調信号の172の周波数で正負両極性に駆動される
(図2のD)。is driven in both positive and negative polarities at the frequency 172 of the modulation signal (D in Figure 2).
受信側まで伝達された両極性信号は受信側のドライバ・
レシーバ回路り几2で両波整流され(図2のE)低域P
波した後(図20F)バッファを通して元のデータが再
生される(図2のG)。The bipolar signal transmitted to the receiving side is
Both waves are rectified by receiver circuit 2 (E in Figure 2), and the low-frequency P
After the wave (FIG. 20F), the original data is reproduced through the buffer (FIG. 2G).
(発明の効果)
この発明は以上説明したように変調回路と極性反転回路
を設けたので安価に直流分を除去でき、ノイズマージン
の低下が防げるため、小形のパルストランスを使用でき
るという利点がある。更に低域P波器を使用しているた
め、高域の雑音の影響を低減することができる。(Effects of the Invention) As explained above, this invention has the advantage of being able to use a small pulse transformer because it is equipped with a modulation circuit and a polarity reversal circuit, so it can remove the direct current component at low cost and prevent a reduction in noise margin. . Furthermore, since a low-frequency P-wave device is used, the influence of high-frequency noise can be reduced.
第1図はこの発明の実施例の回路図、第2図は各部の波
形を示す図である。FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a diagram showing waveforms at various parts.
Claims (1)
伝送方式において、制御信号をクロック信号で変調し、
変調出力をクロック毎に極性反転して直流分を除去した
後前記トランスを介してラインに送出し、受信側では、
受信信号を両波検波した後低域濾波器を介して制御信号
を再生することを特徴とする制御信号伝送方式。In a control signal transmission method that sends a control signal to the line via a transformer, the control signal is modulated with a clock signal,
After inverting the polarity of the modulated output every clock and removing the DC component, it is sent to the line via the transformer, and on the receiving side,
A control signal transmission method characterized by regenerating the control signal through a low-pass filter after double-wave detection of the received signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25644784A JPH0234540B2 (en) | 1984-12-06 | 1984-12-06 | SEIGYOSHINGODENSOHOSHIKI |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25644784A JPH0234540B2 (en) | 1984-12-06 | 1984-12-06 | SEIGYOSHINGODENSOHOSHIKI |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61135263A true JPS61135263A (en) | 1986-06-23 |
JPH0234540B2 JPH0234540B2 (en) | 1990-08-03 |
Family
ID=17292773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25644784A Expired - Lifetime JPH0234540B2 (en) | 1984-12-06 | 1984-12-06 | SEIGYOSHINGODENSOHOSHIKI |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0234540B2 (en) |
-
1984
- 1984-12-06 JP JP25644784A patent/JPH0234540B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0234540B2 (en) | 1990-08-03 |
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