JPS6112234B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an improvement in an electronic watch with an alarm. Thanks to the development of LSIs, crystal oscillators, liquid crystal display elements, light emitting diode display elements, etc., all-electronic watches with digital displays have already been developed and commercially available. Additionally, electronic watches equipped with an alarm mechanism, which is the most important and commonly used additional mechanism for watches, have begun to be commercially available. In the present invention, the conventional alarm clock, for example, sets the "hour" and "minute" with the alarm, and
In a watch with an alarm that sends an alarm when the minute reaches the end, we designed a clock that can set a separate alarm for just the minute.
The content of the settings for "minutes" and "minutes" can be identified by displaying or erasing all or part of the display for each unit of alarm setting time display. ” When only “hour” is used alone, all or part of the “hour” digits are displayed and deleted.
The purpose is to provide. Therefore, the following configuration was considered in the present invention. n is a natural number of 2 or more. In an electronic clock with an alarm, an alarm memory circuit B ₁ ...B _o corresponding to the counting circuit A ₁ ...A _o of the clock mechanism
A coincidence detection circuit that compares and detects each of C ₁ ... C _o
an alarm combination circuit configured to independently detect a coincidence signal from those of the coincidence detection circuits _C1 ... _Co , and output an alarm warning signal by a combination or a single output of the coincidence signals;
The combination contents of the combinational circuit are stored in the memory circuit _B1 ...
An electronic timepiece with an _alarm , characterized in that the alarm setting display is indicated by erasing all or part of the alarm setting display corresponding to each of the alarm settings. This will be explained below with reference to the drawings. FIG. 1 is an example of a circuit block diagram according to the present invention. Reference signal oscillator 2, frequency dividing circuit 4, time counting circuit 6, calendar counting circuit 8, decoder 10, 1
2. The display drive circuit 14 constitutes a normal digital display electronic watch with calendar. On the other hand, the alarm storage circuit 17 includes an alarm time storage circuit 16 and an alarm calendar storage circuit 18, and the count contents of the time counting circuit 6 and the stored count contents of the alarm time storage circuit 16 are compared in a coincidence detection circuit 20, and if they match, they match. Outputs detection signal _C1 . Similarly, the counts in the calendar counting circuit 18 and the alarm calendar storage circuit 22 and the contents of the stored counts are compared in a coincidence detection circuit C ₂ 22, and if they match, a coincidence detection signal C ₂ is output. Setting of the alarm storage circuit 17 is performed by operating an alarm select switch 24 and an alarm set switch 26. When the alarm select switch 24 is operated, the alarm is activated via the flip-flop 30 for removing chattering of the switch.
The number signal is transmitted to the shift register 32,
Output lines 321, 322, 3 of shift register 32
23 and 324 are sequentially changed from L to H level. According to changes in the output lines 321, 322, 323, and 324, the AND gates 34, 36, 38, and 40 open sequentially. In this state, when the alarm set switch 26 is operated, a signal representing the number of operations is transmitted to the alarm storage circuit 17 via the flip-flop 42 for removing chattering, and via the open AND gates 34, 36, 38, and 40. The contents of the stored count are changed and set to a predetermined value. Here, "hour" is passed through AND gate 34, "minute" is passed through AND gate 36, and "minute" is passed through AND gate 36.
The alarm storage circuit is configured to set the alarm memory circuit for "Sunday" through 8 and for "Month" through AND gate 40. Which digit is selected by the select switch 24 is transmitted through output lines 321 to 324 to the display drive circuit 14, and the selected digit is displayed and identified. By the way, this watch includes coincidence detection circuits 20 and 22 for alarm time and alarm calendar, respectively, and the coincidence signals C ₁ and C ₂ are transmitted to the alarm combination circuit 44, and both C ₁ and C ₂ are When output, C ₁ When output, C ₂
It is configured to issue an alarm when each is output. This alarm combination circuit 44 includes a control circuit 46
It is configured to be controlled by This control circuit 46 includes the alarm time storage circuit 1
6 and data detection circuits 48 and 50 that detect when the respective stored count signals a ₁ and b ₁ of the alarm calendar storage circuit 18 reach specific values. The memory circuits 16 and 18 are configured to store the non-existent time in advance, and when the non-existent time is set in the memory circuits 16 and 18 by the set switch 42, the data detection circuits 48 and 50 detect the non-existent time, respectively. The lines 52 and 54 change from the "L" level to the "H" level, and the alarm combination circuit 4
The AND gate 60 and the AND gate 58 of No. 4 are respectively opened. For example, Table 1 shows a display example of the stored count values of the alarm calendar storage circuit 18 and the corresponding alarm settings. If the count value of the "month" digit is stored as 0, which is the non-existent time, the display will be changed to "month" and "day", except for the 7th segment of the 7 segments, regardless of the count value of the "day" digit. Both digits are erased and displayed. The "hour" and "minute" digits have a similar structure.

[Table] Figure 2 is a display example of the electronic clock with calendar alarm shown in Figure 1.To explain this alarm mechanism using Figure 2, Figure 2a shows an example of the display of the electronic clock with calendar alarm shown in Figure 1. On display, May 18th, 12:30 a.m.
It shows 30 seconds. FIGS. 2b to 2e are diagrams when this normal clock display is switched to an alarm display. It should be noted that in FIG. 1, the switching of the display mode and the time setting switch of the clock are omitted. When this alarm is displayed, the seconds display on the clock display changes to display AL as an alarm symbol using 7 segments of numbers. FIG. 2c shows an example when the alarm time storage circuit 16 and the alarm calendar storage circuit 18 each have their respective existence times set.
The date is set for 2:30 p.m. At this time, the output lines 52 and 54 of the data detection circuits 48 and 50 are at "L" level, so the AND gates 60 and 58 are closed, and both the coincidence detection signals C ₁ and C ₂ are output as alarms. At this time, the output "D ₁ " of the AND gate 56 becomes H and an alarm is issued. Therefore, this is an example in which notification is made when the normal clock display, calendar, and time both match the alarm settings. FIG. 2b shows the alarm calendar storage circuit 18.
The existence time is set in the alarm time memory circuit 1.
This is an example in which a non-existence time is set for 6. Here, June 1st is set. At this time, the output line 52 of the data detection circuit 48 becomes "H" and the AND gate 60 is opened. Therefore, when the coincidence signal _C2 is output, the output _D3 of the AND gate 60 becomes "H" and an alarm is issued. Therefore, if the calendar normally displayed as a clock matches the alarm settings, an alarm will be issued. In contrast, in FIG. 2d, the non-existence time is stored in the alarm calendar storage circuit 18, and here 3:00 pm is set. At this time, the output line 54 of the data detection circuit 50 becomes H, the AND gate 58 opens, and when the coincidence signal _C1 is output, the output _D2 of the AND gate 58 becomes H and alerts the alarm. FIG. 2e is an example of a display when the non-existence time is set in both the alarm storage circuits 16 and 18 and the alarm setting is canceled. When the output signals of D ₁ and D ₂ become H, the alarm is notified by modulating the display and by sound. 62 is an alarm sound generating device. When the output signal of _D3 becomes H, a warning is given only by display modulation. Since the output of the coincidence signal C ₁ continues for one minute, the alarm sound will automatically stop sounding after one minute, but the notification by display modulation will
Since the D ₁ , D ₂ , and D ₃ signals are transmitted to the display drive device 14 via the alarm notification storage circuit 64 as storage signals D ₁ ′, D ₂ ′, and D ₃ ′, the alarm control switch 66 is operated. This continues automatically until the alarm notification storage circuit 64 is reset by the _R1 signal. In addition, the _R1 signal from the switch 66 serves to stop the alarm from sounding and to cancel the memory in the alarm memory circuits 16 and 18. As described above, in the present invention, the coincidence detection circuit 20,
22 for time and calendar respectively, detect coincidence signals C ₁ and C ₂ independently, and combine the C ₁ and C ₂ signals in alarm combination circuit 44 to generate calendar time alarm, calendar alarm, and time alarm. This increases the number of uses for alarms. Furthermore, in the example shown in FIG.
Since the signal detected at 0 is used, there is no need to provide a separate operation switch for this purpose, which simplifies the process. Moreover, when the non-existence time is set in the alarm memory circuits 16 and 18, the time shown in FIG. 2b. Only one of the seven segments is displayed as shown in d and e,
This is convenient because it indicates this and at the same time indicates the control content of the alarm combination circuit 44. An example of the decoder circuits 10 and 12 at this time is shown in FIG. 3, taking the calendar decoder circuit 12 as an example. Here, the count signals from the calendar counting circuit and their relationships are omitted. 121, 122, 123 are each "moon"
In the decoder for the digits of "10th" and "day", b ₁₁ , b ₁₂ , and b ₁₃ are the output terminals of the respective segment signals. When the "Month" signal of the b ₁ signal from the alarm storage circuit 18 is 0, it is detected by the 0 detection gate 124, and by the function of the gate circuit 125, all other b ₁ signals are treated as 0 signals and are set to "10th" and "day". '' are transmitted to decoders 122 and 123, respectively. On the other hand, the outputs of OR gates 126, 127, and 128 whose one input is the output of 0 detection gate 124 become H,
Except for the segment signals output from the OR gates 126, 127, and 128, all the segment signals b ₁₁ , b ₁₂ , and b ₁₃ are L, and the calendar display section for alarm setting display is as shown in Figure 2 d and e. Is displayed. This or gate 126, 127, 12
If you increase 8, the number of partially displayed segments will increase,
Conversely, if you remove it, it will all be deleted. FIG. 4 is a partial circuit diagram of an embodiment of an electronic timepiece with an alarm according to the present invention and claims 1 and 3, and the numbers are based on FIG. 1 and the alarm combinations are compared with FIG. 1. circuit 44, control circuit 46 of alarm combination circuit 44, decoder circuits 10, 12
The contents are different, and an operation switch 70 and gate circuits 90 and 92 are additionally added. In this electronic clock with alarm, the operation switch 7
The signal of the number of operations of 0 is stored in the shift register 72, and the alarm combination circuit 4 is
4, when the output line 72 of the shift register 72 is H, the alarm time coincidence signal
When C ₁ is inhibited and output line 722 is H,
Alarm calendar match signal C ₂ is prohibited,
This alarm combination circuit is configured to function as a calendar alarm and a time alarm, respectively. Moreover, when the output line 723 is H, the alarm warning signal D ₁ ,
It is configured so that neither D ₂ nor D ₃ are output. When these output lines 721, 722, and 723 are all at L, this combination circuit 44 operates as a calendar time alarm that notifies an alarm alarm only after both _C1 and _C2 signals are output.
It consists of In this electronic timepiece with an alarm, the alarm combination circuit 44 is controlled by the operation switch 70 and the control circuit 46 as described above. Further, each of the alarm time storage circuit and the alarm calendar storage circuit is configured to count and store only the time of existence, and therefore, the respective count value signals a ₁ and b ₁ always store the time of existence at the decoder 1.
0,12. Therefore, the output line 72 of the control circuit 46 described above
When 1,722,723 is H, the transmission of the _a1 , _b1 signals to the decoders 10,12 is stopped according to the respective output lines 721,722,723, and the time and/or calendar alarms are set. The gate circuit 90, so as to erase the display.
92 and decoders 10 and 12. That is, when the output line 721 is H, it works as a calendar alarm, so the _A1 signal is prohibited and the alarm display is as shown in Figure 2b, and when the output line 722 is H, it works as a time alarm. , b ₁ signals are prohibited to display as shown in Figure 2 (d), and when the output line 723 is H, the alarm is prohibited, so both the a ₁ and b ₁ signals are prohibited, and the display is as shown in Figure 2 (e). I am trying to display it in An example of the decoder 10 at this time is shown in FIG.
Decoders 1, 102, and 103 are decoders for hours, 10 minutes, and minutes, respectively, and only segment signals 104, 105, and 106 are output when the output line 723 is at H level. This electronic watch with an alarm also displays alarm combinations, calendar time alarms, calendar alarms, and time alarm contents as shown in Figure 2 without using a separate display, and unnecessary alarm setting times are displayed and erased. This makes it easy to identify, easy to identify, and convenient for operation and handling. In the example shown in FIG. 4, the signals a ₁ and b ₁ are controlled by the gate circuits 90 and 92, but the decoder circuits 10 and 12 or the control circuit 46 of the display driving device 14 may be Similarly, the present invention can be realized by display erasing. Furthermore, the electronic watch with calendar alarm according to the present invention is not limited to the example shown in FIG.
Valid for day of the week and date, day of the week, date, and month, and valid for portable clocks, table clocks, and wall clocks. Furthermore, it is effective for watches that can set only the hours or minutes with an alarm for hours and minutes, and especially those that can be set for only the minutes. . In addition, it is an electronic watch with an alarm that has display modes as shown in Fig. 2, and includes calendar alarms, calendar time alarms, and calendar alarms shown in Fig. 2b, Fig. 2c, and Fig. 2d.
A separate dedicated alarm memory circuit is provided for each time alarm, and three coincidence detection circuits are provided to compare and match the three alarm memory circuits and the clock's time (including calendar) counting circuit.
It is also possible to consider an electronic clock with an alarm that displays the display example in FIG. 2 by switching the mode of each memory circuit. In this case as well, the alarm setting display is partially erased to show the difference in the type of memory circuit for each alarm. In contrast, Fig. 1 shows a method in which one alarm memory circuit is divided into two and used in combination, but there are also systems that have multiple such memory circuits.
Of course, it is included in the present invention.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of an electronic timepiece with an alarm according to the present invention, FIG. 2 is a diagram showing a display example of the electronic timepiece with an alarm shown in FIG. 1, and FIG. 4 is a circuit diagram showing another embodiment of the decoder circuit of the present invention based on FIG. 1; FIG. 5 is a circuit diagram showing another embodiment of the decoder circuit of the present invention based on FIG. FIG. 2 is a circuit diagram showing an example. 6, 8... Counting circuit, 20, 22... Coincidence detection circuit, 17... Alarm storage circuit, 44... Alarm combination circuit, 46... Control circuit, 48, 50
...Data detection circuit, 10, 12...Decoder circuit.

Claims (1)

[Claims] 1. In an electronic watch with an alarm, an alarm storage circuit B ₁ ... corresponding to a counting circuit A ₁ ...A _o of the clock mechanism.
A coincidence detection circuit _C1 ... which compares and detects each of B _o .
an alarm _combination circuit which is provided with _{a coincidence detection circuit C 1 .} and stores the combination contents of the combinational circuit in the memory circuit.
An electronic clock with an alarm, characterized in that the alarm setting display corresponding to each of _B1 ... _Bo is indicated by displaying or erasing all or part of the alarm setting display. 2. The alarm storage circuit _B1 ...B _o is provided with a data detection circuit that stores the non-existence time and detects the stored content, and the alarm combination circuit is controlled by the data detection circuit to change the combination content of the alarm. and the alarm storage circuit B ₁
... When the non-existing time is set in B _o , all or a part of the alarm setting display corresponding to each of the memory circuits B ₁ ... B _o that have stored and counted the non-existent time are erased by the decoder circuit, and the above-mentioned An electronic timepiece with an alarm as set forth in claim 1, characterized in that the electronic timepiece is configured such that the content of the combination of alarms can be identified. 3 An operation switch for controlling the alarm combination circuit is provided, and a control circuit that stores a signal indicating the number of times the operation switch is pressed is configured to control the alarm combination circuit and change the combination of alarms, and at the same time , the control circuit controls the storage signal transmitted from the alarm storage circuit B ₁ . . . B _o to the decoder circuit, and the alarm storage circuit B ₁ .
The _alarm according to claim 1, characterized in that the combination content of the alarms can be identified by displaying or erasing all or part of the alarm setting display corresponding to each of the alarm settings. Comes with an electronic clock.