JPS61117948A - Transmission data relay system - Google Patents

Abstract

PURPOSE:To avoid a head bit of a transmission frame from being lost by starting a relay transmission driver to the heat bit of transmission data in a timing, e.g., before one bit's share. CONSTITUTION:A clock frequency division circuit 21 stars a clock signal in registers 13 and 22 with a delay for 4.5.clock's share from a change point of the 1st information of the transmission data. On the other hand, the transmission data inputted to the register 13 through a recovery repeater circuit 12 is to be rtarded by, e.g., 12.5 clocks' share. Then a Q output of a register (FF) goes to 'L' earlier by 8 clocks to the head bit of the Q output of the register 13 and a transmission driver 14 is in the state of output enable. In this case, 1 bit corresponds to 8 clocks. As a result, the transmission driver 14 is in the state of output enable earlier by one bit of the inputted transmission data.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a transmission data relay system, and in particular, in a relay station where a plurality of stations are connected in a loop bus, frame This invention relates to a transmission data relay system that can prevent the leading bit of the next frame from disappearing due to a floating state that occurs between frames.

[Conventional technology]

FIG. 4 shows the configuration of a transmission system in which stations 1 to 4 are serially connected in a loop via a transmission line.

Here, for example, if station 1 transmits transmission data in a so-called floating state, in which there is no transmission data between transmission frames, the next station 2 will receive this transmission data transmitted by upstream station 1. It is received, regenerated and relayed, and sent to the stage tongue 3 located downstream.

Similarly, this transmission data is sequentially transmitted from station 3 to station 4, and is regenerated and relayed at each of these stations. This allows station 1
transmits the data to other stations, which in turn receive the data.

Therefore, each station is provided with a regenerative relay circuit 5. FIG. 5 shows a specific configuration of the conventional circuit, and as shown in FIG.
Then, a regenerative relay circuit 7 and a relay control circuit 8 receive the signal received by the transmission receiver 6, and under the control of the relay control circuit 8, receive the transmission data from the regenerative relay circuit 7 and transmit the data to the transmission line 10. The transmission driver 9 and the like output data.

This type of regenerative relay circuit generally detects a transmission frame based on a signal change in the first bit of the received transmission receiver and controls the relay.

Figures 6 and 7 are timing charts showing how the transmitted data is relayed. It shows the waveform at the end of the frame and the beginning of the next frame.

When transmitting the source signal waveform 10a in FIGS. 6 and 7, a certain transmitting station modulates this signal and outputs it to the transmission path 10, but the timing waveform of the output data is as shown in FIG. The final focus-floating state-“L” level (LOW level) as seen in the transmission output waveform 10b in FIG. 7, and the transmission output waveform 1 in FIG.
Final focus - floating shape m- as seen in 0b
There is a case of "H" level (HIGH level).

First, to explain the case of FIG. 6, the transmission output waveform 10
When signal b is transmitted from a certain stage signal and received by the next relay station, the receiver output of that relay station has a timing waveform as seen in either receiver output waveform 10c or receiver output waveform IQd.

In this case, since the relay transmission driver is enabled at the first signal change from the floating state, when the receiver output waveform 10d is relayed and output to the transmission line 10, the output waveform of the relay transmission becomes 10'. This is the same waveform as the transmission output waveform 10b, the original waveform is completely reproduced, and no problem occurs.

In addition, to explain the case of FIG. 7, when the next relay station receives the data after the floating state at a "H" level different from the transmission output waveform 10b of FIG. 6, the receiver output of the relay stage signal is Similarly, the 6th
Unlike the case shown in the figure, the timing waveform is either the receiver output waveform 10c or the receiver output waveform 10d.

In this case, when the receiver waveform output 10c is relayed and output, the transmission waveform becomes the relay transmission output waveform 10e, which is the same waveform as the transmission output waveform 10b, and no problem occurs.

[Problem that the invention seeks to solve]

However, in the case of FIG. 6, when the receiver output waveform of the relay station is 10c, the relay transmission output waveform becomes 10e, so the first bit disappears.

In addition, in the case of Fig. 7, 1. When the receiver output waveform of the relay station becomes 10d, the relay transmission output waveform becomes 1of, and the first bit also disappears.

By the way, at the beginning of the frame, some synchronization bits are inserted at the beginning position, and after that, a predetermined code bit is provided as a so-called open flag.
There is predetermined data, there is a close flag at the end, and the same synchronization bit as before is inserted.

Therefore, if one bit disappears as described above every time the data is reproduced and relayed, the synchronization bit is lost, resulting in a situation in which the open flag indicating the beginning of the frame cannot be recognized.

[Purpose of the invention]

The present invention has been made in view of the problems of the prior art, and is intended to solve these problems and also to prevent bit loss of transmitted data that occurs during playback and relay. The purpose of this invention is to provide a transmission data relay method that does not cause

Means for Solving Problem C] In order to achieve such an object, the present invention starts a relay transmission driver at a timing, for example, one bit before the first bit of transmission data to be relayed. (
This method focuses on the fact that when the output level is set (output enable), the last receiver output of the previously relayed transmission frame matches the output level of the relay transmission driver. Change points can always be determined. Therefore, this change point is detected to prevent the leading bit of the transmission frame from disappearing when serial transmission data is regenerated and relayed.

The means includes a receiver that receives transmission data, a regenerative relay circuit that receives and regenerates the received transmission data, and a driver that sends the transmission data from the regenerative relay circuit to the transmission line. , based on the transmission data received by the receiver, detects the first change from the floating state between frames, and in response to this detection signal, changes the transmission data output of the regenerative repeater circuit to the transmission data output of the frame. The data to be transmitted is formed before the first n bits (n is a positive integer) and sent to the transmission line via the driver.

[Effect]

By forming the transmission data before n bits in this way, it is possible to additionally generate transmission data of n or n-1 bits (when n-1, they are the same), and floating data that occurs between frames can be generated. This prevents the leading bit of the next frame from disappearing depending on the state.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail using the drawings.

FIG. 1 is a block diagram of a regenerative relay circuit of a transmission data relay system according to an embodiment of the present invention, and FIG.
FIG. 3 is a block diagram of a regenerative relay circuit of a transmission data relay method according to another embodiment. Components that are the same as those in FIG. 4 are designated by the same reference numerals.

Transmission data from the transmission line IO is transmitted to the transmission receiver 11
The received data is sequentially taken into a register (FF: flip-flop) 13 via a regenerative relay circuit 12 . The signal is then sent to the transmission line 10 via the transmission driver 14.

On the other hand, the received transmission data is differentiated by the differentiating circuit 15, and the first differentiated pulse is input to the carrier detecting circuit 16, which outputs the carrier detecting signal CD.

The clock frequency dividing circuit 21 includes JK-FF circuits 17 and 18.
, a NAND circuit 19, and a NOR circuit 20, which divide the clock CK by four, and are operated and controlled in response to the carrier detection signal CD from the carrier detection circuit 16. In addition, "H" in the figure indicates HIGH
This is a level operation signal.

This clock frequency dividing circuit 21 plays a role of starting the clock signals of the register 13 and the register (FF) 22 with a delay of 4.5 clocks from the first information change point of the transmission data.

On the other hand, it is assumed here that the transmission data that has passed through the regenerative relay circuit 12 and is input to the register 13 is delayed by 12.5 clocks. Therefore, the Q of the register (FF)
The output is 8 for the first bit of the Q output of register 13.
The clock becomes “L” level quickly, and the transmission driver 14
At this time, the output is enabled. Note that here, 1 bit corresponds to 8 clocks.

As a result, the transmission driver 14 is enabled for output one via) before the input transmission data.

By doing this, the state one bit before the bit in which the first change in data detected by the differentiating circuit 15 occurs is detected, and data is generated. Therefore, looking at the receiver output waveform of the receiving station when floating state F exists between frames in FIG. 6, the output waveform 10G is:
Since the bit before the bit that first changes in the transmission data is at the "L" level, even if there is a floating state between frames as a result of the above operation, the second (a) The timing waveform is as shown in the output waveform 30a during relay transmission shown in Figure 3, and the leading bit does not disappear.

Similarly, when the receiver output waveform is 10d in FIG. 6, for the first changing bit in the transmitted data,
Since the one bit before that is at the “H” level, the second (a)
), the timing waveform becomes like the output waveform 30b during relay transmission, and one bit is added to the received data.

This is the same in the case of FIG. 7, and the receiver output waveform 10c becomes the timing waveform seen in the output waveform 30a at the time of relay transmission shown in 2(b), and corresponds to the received data. 1 bit will be added. Moreover, when the receiver output waveform is 10d in FIG. 7, the second (b)
The timing waveform shown in the output waveform 30b during relay transmission shown in FIG.

Moreover, the added 1 bit only increases the number of synchronization bits, and can be treated as mere noise. Therefore, no problem arises regarding frame recognition itself.

FIG. 3 shows a regenerative relay circuit according to another embodiment, and is an example where it is necessary to select and relay data transmitted from both directions, i.e., the transmission input A and the transmission input B. .

Components that are the same as those in FIG. 1 are designated by the same reference numerals.

Here, lla and llb are transmission receivers that receive transmission data from transmission lines A and B, respectively, and 1
5a and 15b are differentiating circuits, respectively, and correspond to the differentiating circuit 15 in FIG.

Further, 23 is a selector for selecting one of these differentiating circuits 15a and 15b, and 24 is a toggle type toggle FF ( toggle flip-flop) and sends its Q output to the regenerative relay circuit 12.

On the other hand, 25 is a relay control circuit, and the differentiation circuit 1
5a and 15b, and also outputs a control signal to drive the selector 23.

Next, to explain its operation, transmission data from transmission lines A and B are transmitted to transmission receivers 11a and llb, respectively.
After the transmission data is received by the differential circuit 15a or 15b and differentiated by the differentiating circuit 15a or 15b, the toggle FF 24 is driven using the differential pulse of the transmission data selected by the selector 23 as a clock in accordance with a control signal from the relay control circuit 25. Then, the output data is converted back into transmission data and input to the regenerative relay circuit 12.

Here, the toggle FF 24 generates a reset signal according to the final contents of the previous register 13, inverts its state with respect to the output of the selector 23 as the receiver side output, and reproduces it as the opposite state. It generates data to be input to the relay circuit 12.

By employing the toggle FF 24 in this way, the bit positions of the final data of the frame before floating and the first data of the frame after floating can be reversed, so the first information of the data of the frame after floating changes can be detected from the first synchronization bit data, allowing more accurate data processing.

As described above, in the embodiment, the transmission driver is operated one bit earlier, but this may be several bits earlier, and the transmission driver is not limited to performing such processing.

In addition, in the embodiment, the delay time is set based on the time relationship between the clock, the timing time of 1 bit, and the regenerative relay circuit, but these values are just examples and can be freely changed in the design. Can be set.

〔Effect of the invention〕

As can be understood from the above description, the present invention includes a receiver that receives transmission data, a regenerative relay circuit that receives and regenerates the received transmission data, and a transmission line that transmits the transmitted data from the regenerative relay circuit. Based on the transmission data received by the receiver, the driver detects the first change from the floating state between frames, and in response to this detection signal, the regenerative relay circuit is activated. For transmission data output, the data to be transmitted is formed before the first n bits of the frame (n is a positive integer) and sent to the transmission line via the driver, so By forming the transmission data, transmission data of n or n-1 bits (in the case of n-1, they are the same) can be additionally generated.

As a result, it is possible to prevent the first bit of the next frame from disappearing due to the floating state that occurs between frames, and the synchronization bit will not be lost (for example, the oven flag indicating the beginning of the frame can be reliably recognized). become.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a regenerative relay circuit of a transmission data relay system according to an embodiment of the present invention, and FIG.
a) and (b) are timing charts each showing how the transmission data is relayed, and FIG. 3 is a block diagram of the regenerative relay circuit portion of the transmission data relay method according to another embodiment.
FIG. 4 is an explanatory diagram showing the configuration of a transmission system configured by loop-connecting stations via serial transmission paths, and FIG. 5 is a block diagram of a conventional regenerative repeater circuit.
FIGS. 6 and 7 are timing charts showing the state of conventional transmission data relay, respectively. 11, lla, Llb - Transmission receiver. 12.-Regenerative relay circuit, 13.22-Register (F
F), 14--Transmission driver. 15.15a, 15b - Differential circuit. 16.--Carrier detection circuit. 21.- Frequency divider circuit, 23-. Selector. 24 - Toggle FF, 25 - Relay control circuit.

Claims (2)

[Claims] (1) It has a receiver that receives transmission data, a regenerative relay circuit that receives and regenerates the received transmission data, and a driver that sends the transmission data from the regenerative relay circuit to a transmission line, and the receiver Based on the received transmission data, the first change from the floating state between frames is detected, and in response to this detection signal, for the transmission data output of the regenerative repeater circuit,
A transmission data relay system characterized in that data to be transmitted is formed before the first n bits (n is a positive integer) of the frame and is sent to the transmission line via the driver. (2) n is 1, and the data to be transmitted 1 bit before the beginning is formed by operating the driver 1 bit before the beginning of the frame in the transmission data output of the regenerative relay circuit. A transmission data relay system according to claim 1, characterized in that: