JPS611150A - Ringing preventing circuit - Google Patents

Ringing preventing circuit

Info

Publication number
JPS611150A
JPS611150A JP12253384A JP12253384A JPS611150A JP S611150 A JPS611150 A JP S611150A JP 12253384 A JP12253384 A JP 12253384A JP 12253384 A JP12253384 A JP 12253384A JP S611150 A JPS611150 A JP S611150A
Authority
JP
Japan
Prior art keywords
input
circuit
impedance
cable
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12253384A
Other languages
Japanese (ja)
Inventor
Hiroshi Matsunaga
博 松永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12253384A priority Critical patent/JPS611150A/en
Publication of JPS611150A publication Critical patent/JPS611150A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/14Two-way operation using the same type of signal, i.e. duplex
    • H04L5/1407Artificial lines or their setting

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To improve the performance of noise immunity by introducing a low resistance to the input side of a reception circuit to adjust the sum of resistance value between the effective resistance of an input clamp diode and the low resistance. CONSTITUTION:The input impedance of a reception circuit Q2 is substituted equivalently by a series circuit comprising a high resistor R and a diode D1 and an input clamp diode D2. Thus, since the input impedance when the input to the circuit Q2 is a negative potential is expressed by the diode D2, the low resistance R0 is inserted to the input side to adjust the sum of resistance value between the effective resistance of the diode D2 and the low resistor R0, causing a reflection signal to be reflected into the final stable state. Since the reflection signal is produced respectively once at the reception and transmission side and converged, a reception input voltage is not larger temporarily from the final stable state and the performance of noise immunity is improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディジタル伝送を行う通信装置に係り、特にT
TL系素子を使用して送信回路、及び受信回路を構成し
ている通信装置間の伝送に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a communication device that performs digital transmission, and particularly relates to a communication device that performs digital transmission.
The present invention relates to transmission between communication devices that configure a transmitting circuit and a receiving circuit using TL elements.

〔従来の技術〕[Conventional technology]

第5図は従来のTTL系素子を使用して送信回路、及び
受信回路を構成している通信装置間の伝送路の一例を示
す概略図である。尚以下全図を通じ同一記号は同一対象
物を表す。
FIG. 5 is a schematic diagram showing an example of a transmission path between a communication device using conventional TTL elements to configure a transmitting circuit and a receiving circuit. The same symbols represent the same objects throughout all the figures below.

第5図のQlはTTL系素子を使用する送信回路、Q2
は同様にTTL系素子を使用する受信回路であり、ケー
ブルCABLEにより送信回路と受信回路はメタリック
に接続されている。
Ql in Figure 5 is a transmitting circuit using TTL elements, Q2
is a receiving circuit that similarly uses TTL elements, and the transmitting circuit and receiving circuit are metallically connected by a cable CABLE.

此の様な回路構成に於いて、送信回路出力Q1の入力に
パルス信号を印加して送信回路Q1の出力を5オン、又
はオフとし、送信回路Q1出力のコレフタルアース間か
らパルス信号を取る。
In a circuit configuration like this, a pulse signal is applied to the input of the transmitting circuit output Q1 to turn the output of the transmitting circuit Q1 on or off, and a pulse signal is taken from between the coreftal ground of the output of the transmitting circuit Q1. .

送信回路Q1の出力がパルス信号をケーブルCABLE
に出力するとパルス信号はケーブルCABLE内を伝播
して受信側の受信回路Q2の入力端に到達する。
The output of the transmitter circuit Q1 sends the pulse signal to the cable CABLE
When outputted to , the pulse signal propagates within the cable CABLE and reaches the input end of the receiving circuit Q2 on the receiving side.

第6図は上記回路で使用される送信回路Q1、受信回路
Q2の特性を説明するグラフである。
FIG. 6 is a graph explaining the characteristics of the transmitting circuit Q1 and receiving circuit Q2 used in the above circuit.

第6図に於いて、縦軸は電圧、横軸は電流を表し、Vo
hは送信回路出力が“High ”の時の電圧電流特性
、Volは送信回路出力が“Low”の時の電圧電流特
性、Iinは受イ会回路の人力特性を夫々示している。
In Figure 6, the vertical axis represents voltage and the horizontal axis represents current, Vo
h indicates the voltage-current characteristic when the transmitting circuit output is "High," Vol indicates the voltage-current characteristic when the transmitting circuit output is "Low," and Iin indicates the human power characteristic of the receiving circuit.

更に電流の方向は送信回路Q1から受信回路Q2へ流れ
る方向を正とする。
Furthermore, the direction of current flowing from the transmitting circuit Q1 to the receiving circuit Q2 is defined as positive.

送信回路出力が“High ”の時の出力インピーダン
スは無負荷時Highインピーダンスであり、電圧電流
特性Vohが示す様に負荷電流をとらない時其の電圧値
は最高で約3.5V(此の点をHとする)であり、負荷
を取るに従って出力電圧は順次低下し、電流が70mA
で略oVになる。
When the transmitting circuit output is "High", the output impedance is High impedance when there is no load, and as the voltage-current characteristic Voh shows, the voltage value when no load current is taken is about 3.5V at maximum (this point is H), and as the load is increased, the output voltage gradually decreases until the current reaches 70mA.
This is abbreviated as oV.

一方送倍回路出力が’Low”の時の出力インピーダン
スはLowインピーダンスであり、電圧電流特性Vol
が示す様に負荷電流をとらない時其の電圧値は最低で約
0.3Vであり、負荷を取るに従って出力電圧は順次上
昇し、電流が80mAを越すと飽和して電圧が急上昇す
る。
On the other hand, when the multiplier circuit output is 'Low', the output impedance is Low impedance, and the voltage-current characteristic Vol.
As shown, the voltage value when no load current is taken is about 0.3V at the lowest, and as the load is taken, the output voltage increases sequentially, and when the current exceeds 80 mA, it becomes saturated and the voltage suddenly rises.

次に受信回路の入力特性Iinは図示する様に、通常の
TTLレヘルでの入力インピーダンスはH4ghインピ
ーダンスであるが、負電位以下になるとLowインピー
ダンスに変化する。
Next, as shown in the figure, the input characteristic Iin of the receiving circuit is that the input impedance at the normal TTL level is H4gh impedance, but changes to Low impedance when the potential becomes less than a negative potential.

第5図の回路は此の様な特性を持つ送信回路Q1出力に
成る特性インピーダンスZを有するケーブルCABLE
の入力端を接続し、ケーブルCABLEの終端に同様な
特性を持つ受信回路Q2の入力を接続していることにな
る。
The circuit in Figure 5 is a cable CABLE with a characteristic impedance Z that becomes the output of a transmitting circuit Q1 with such characteristics.
The input end of the cable CABLE is connected to the terminal end of the cable CABLE, and the input of the receiving circuit Q2 having similar characteristics is connected to the terminal end of the cable CABLE.

此の場合ケーブルCABLEの入力端に於いてケーブル
CABLEの特性インピーダンスZば送信回路Q1の出
力インピーダンスと整合するとは限らず、ケーブルCA
BLEの終端に於いてケーブルCABLEの特性インピ
ーダンスZが受信回路Q2の入力インピーダンスと整合
するとは限らない。
In this case, the characteristic impedance Z of the cable CABLE at the input end of the cable CABLE does not necessarily match the output impedance of the transmitting circuit Q1;
At the termination of BLE, the characteristic impedance Z of the cable CABLE does not necessarily match the input impedance of the receiving circuit Q2.

此の為、ケーブルCABLEの入出力端に於いて反射現
象が起きる。
For this reason, a reflection phenomenon occurs at the input and output ends of the cable CABLE.

今送信回路Q1の出力が“High”の状態がら“Lo
w″の状態に変化した場合に就いて考える。
Now, the output of the transmitting circuit Q1 is in the “High” state, but the output is “Lo”.
Let us consider the case where the state changes to w''.

送信回路Q1の出力が無負荷で“High ”状態であ
ると場合、送信回路Q1は第6図の点Hに位置している
When the output of the transmitting circuit Q1 is in a "High" state with no load, the transmitting circuit Q1 is located at point H in FIG.

第7図+a)に示す様に時刻T1の時送信回路Q1の出
力が“Low″の状態に変化すると、第6図に示す様に
ケーブルCABLEの特性・インピーダンス2を表す直
線■と特性Volの交点Aに状態が移動する。
As shown in Figure 7+a), when the output of the transmitting circuit Q1 changes to the "Low" state at time T1, as shown in Figure 6, the line ■ representing the characteristic/impedance 2 of the cable CABLE and the characteristic Vol. The state moves to intersection A.

受信側では第7図(blに示す様に、此の変化はケーブ
ルCABLEの特性により定まる成る伝播時間τ経過し
てから起こり、受信回路Q2の入力は通常のTTLレベ
ルでの入力インピーダンスがHighインピーダンスで
ある為、ケーブルCABLEの特性インピーダンスZと
整合せず、反射現象が起き、受信回路Q2の入力インピ
ーダンスはLowインピーダンスとなり、伝播時間τ経
過して再び送信回路Ql側に戻る。従って送信回路Q1
の状態は点Aから点Cに移る。
On the receiving side, as shown in Figure 7 (bl), this change occurs after the propagation time τ determined by the characteristics of the cable CABLE has elapsed, and the input impedance of the input of the receiving circuit Q2 at the normal TTL level becomes High impedance. Therefore, it does not match the characteristic impedance Z of the cable CABLE, a reflection phenomenon occurs, the input impedance of the receiving circuit Q2 becomes Low impedance, and after the propagation time τ has elapsed, it returns to the transmitting circuit Ql side again.Therefore, the transmitting circuit Q1
The state moves from point A to point C.

此の送信回路Q1の状態が点Aから点Cに移る変化も又
伝播時間τ経過してから受信側に伝わり、再び反射現象
を起こす。
This change in the state of the transmitting circuit Q1 from point A to point C is also transmitted to the receiving side after the propagation time τ has elapsed, causing a reflection phenomenon again.

此の様な動作を繰り返しながら点H一点八へ点B一点C
一点り一点E一点F−、’Gと動作点が変わり、安定状
態となる。
While repeating this action, move from point H to point B to point C.
The operating points change one by one from E to F to 'G, and a stable state is reached.

然し不整合の度合が大きく、且つ伝播時間τが長い場合
、第7図(b)のFに示す様に受信側の入力電圧が最終
安定状態の入力電圧より一時大きくなることがある。即
ち、オーバーシュートする場合にはリンギング波形を生
じ、“Loiy”レベルの時のノイズマージンが減少し
、耐雑音性が悪くなると云う欠点を生ずる。
However, if the degree of mismatch is large and the propagation time τ is long, the input voltage on the receiving side may temporarily become larger than the input voltage in the final stable state, as shown by F in FIG. 7(b). That is, in the case of overshooting, a ringing waveform is generated, the noise margin at the "Loiy" level is reduced, and the noise resistance is deteriorated.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は上記の欠点を除去し、受信側でオーバーシュー
ト現象の起きない様に即ち少なくともクリティカルダン
ピングの状態を確保する方法を提供することである。
The object of the present invention is to eliminate the above-mentioned drawbacks and provide a method for ensuring that no overshoot phenomenon occurs on the receiving side, that is, at least a state of critical damping.

〔問題点を解決するための手段〕[Means for solving problems]

問題点を解決するための手段は、TTL系素子を使用し
て送信回路、及び受信回路を構成し、前記両回路をメタ
リック線路で接続する場合、前記受信回路の入力に直列
抵抗を挿入するリンギング防止回路により達成される。
A means to solve the problem is to construct a transmitting circuit and a receiving circuit using TTL elements, and when both circuits are connected by a metallic line, ringing is performed by inserting a series resistor into the input of the receiving circuit. This is achieved by a prevention circuit.

〔作用〕[Effect]

本発明に依ると受信回路の入力インピーダンスがLo−
インピーダンスの時ケーブルの特性インピーダンスと整
合する為反射現象が極めて小さくなり受信側の入力電圧
が最終安定状態の入力端子より一時大きくなることがな
くなるので耐雑音性が悪くならないと云う効果が生まれ
る。
According to the present invention, the input impedance of the receiving circuit is Lo-
When the impedance is matched with the characteristic impedance of the cable, the reflection phenomenon is extremely small, and the input voltage on the receiving side does not temporarily become higher than the input terminal in the final stable state, resulting in the effect that noise resistance does not deteriorate.

〔実施例〕〔Example〕

第1図は本発明に依るリンギング防止回路の一実施例を
示すブロック図である。
FIG. 1 is a block diagram showing one embodiment of a ringing prevention circuit according to the present invention.

第2図は本発明の詳細な説明する図である。FIG. 2 is a diagram explaining the present invention in detail.

受信回路Q2の入力インピーダンスは第2図の等価回路
で表される。即ち、高抵抗RとダイオードD1の直列回
路と入力クランプダイオードD2により置換えらる。尚
Vccは電源電圧、INは入力端子である。
The input impedance of the receiving circuit Q2 is represented by the equivalent circuit shown in FIG. That is, it is replaced by a series circuit of a high resistance R and a diode D1, and an input clamp diode D2. Note that Vcc is a power supply voltage, and IN is an input terminal.

従って受信回路Q2の入力が負電位の状態にある時の入
力インピーダンスは入力クランプダイオードD2のみで
表現される為第1図に示す様に入力側に低抵抗Roを挿
入して入力クランプダイオードD2の実効抵抗と低抵抗
Raの和を調整し、反射信号を信号の最終安定状態へ反
射する様にすれば、反射信号は受信・送信側で夫々−回
生ずるのみで収束することが出来る為受信入力電圧が最
終安定状態より一時大きくなることはなく耐雑音性が向
上する。
Therefore, when the input of the receiving circuit Q2 is at a negative potential, the input impedance is expressed only by the input clamp diode D2, so a low resistance Ro is inserted on the input side as shown in Figure 1. If the sum of the effective resistance and low resistance Ra is adjusted to reflect the reflected signal to the final stable state of the signal, the reflected signal can be converged by regenerating on the receiving and transmitting sides, respectively, so the receiving input Noise resistance is improved because the voltage does not temporarily become higher than the final stable state.

第3図(alは本発明に依る送信出力波形、(b)は受
信入力波形を夫々示す。
FIG. 3 (al shows the transmitted output waveform according to the present invention, and (b) shows the received input waveform, respectively.

第4図は本発明に依るリンギング防止回路の動作を説明
する図である。
FIG. 4 is a diagram illustrating the operation of the ringing prevention circuit according to the present invention.

第4図に示す様に入力側に低抵抗ROを挿入することに
より、受信回路Q2の入力特性1inを点線の様に変化
させ、点Aからの特性線と最終安定点Cからの特性線の
交点Bを修正された入力特性Iinが通過する様にすれ
ば、点Bからオーツλ−シュートすることなく最終安定
点Cに移動出来ることになる。
As shown in Figure 4, by inserting a low resistance RO on the input side, the input characteristic 1in of the receiving circuit Q2 is changed as shown by the dotted line, and the characteristic line from point A and the characteristic line from final stable point C are changed. If the corrected input characteristic Iin is made to pass through the intersection B, it is possible to move from the point B to the final stable point C without performing an Oats λ-shoot.

此の場合に於ける送信出力波形を第3図(alに、受信
入力波形を第3図tb)に夫々示す。
The transmitted output waveform in this case is shown in FIG. 3 (al), and the received input waveform is shown in FIG. 3 tb.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明した様に本発明によれば、受信側でオー
バーシュート現象の起きない様にすることにより″LO
W″レベル側の雑音マージンの減少を防ぐことが出来る
と云う大きい効果がある。
As explained in detail above, according to the present invention, by preventing the overshoot phenomenon from occurring on the receiving side, the "LO"
This has the great effect of preventing a reduction in the noise margin on the W'' level side.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に依るリンギング防止回路の一実施例を
示すブロック図である。 第2図は本発明の詳細な説明する図である。 第3図fa)は本発明に依る送信出力波形、(blは受
信入力波形を夫々示す。 第4図は本発明に依るリンギング防止回路の動作を説明
する図である。 第5図は従来のTTL系素子を使用して送信回路、及び
受信回路を構成している通信装置間の伝送路の一例を示
す概略図である。 第6図はTTL系素子の入力、出力特性を説明するグラ
フである。 第7図は第6図の動作を説明する図である。 図中、QlはTTL系素子を使用する送信回路、Qlは
TTL系素子を使用する受信回路、CABLEはケーブ
ル、Ro、Rは夫々抵抗、Dl、D2は夫々ダイオード
である。 茶 1 区 妄 5 閉 茅  7  口
FIG. 1 is a block diagram showing one embodiment of a ringing prevention circuit according to the present invention. FIG. 2 is a diagram explaining the present invention in detail. Fig. 3 (fa) shows the transmission output waveform according to the present invention, and (bl shows the reception input waveform). Fig. 4 is a diagram explaining the operation of the ringing prevention circuit according to the invention. Fig. 5 shows the conventional ringing prevention circuit. FIG. 6 is a schematic diagram showing an example of a transmission path between communication devices that configure a transmitting circuit and a receiving circuit using TTL elements. FIG. 6 is a graph illustrating the input and output characteristics of the TTL element. Fig. 7 is a diagram explaining the operation of Fig. 6. In the figure, Ql is a transmitting circuit using TTL elements, Ql is a receiving circuit using TTL elements, CABLE is a cable, Ro, R are each a resistor, and Dl and D2 are diodes.

Claims (1)

【特許請求の範囲】[Claims] TTL系素子を使用して送信回路、及び受信回路を構成
し、前記両回路をメタリック線路で接続する場合、前記
受信回路の入力に直列抵抗を挿入することを特徴とする
リンギング防止回路。
1. A ringing prevention circuit comprising a transmitting circuit and a receiving circuit using TTL elements, and when the two circuits are connected by a metallic line, a series resistor is inserted into the input of the receiving circuit.
JP12253384A 1984-06-14 1984-06-14 Ringing preventing circuit Pending JPS611150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12253384A JPS611150A (en) 1984-06-14 1984-06-14 Ringing preventing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12253384A JPS611150A (en) 1984-06-14 1984-06-14 Ringing preventing circuit

Publications (1)

Publication Number Publication Date
JPS611150A true JPS611150A (en) 1986-01-07

Family

ID=14838211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12253384A Pending JPS611150A (en) 1984-06-14 1984-06-14 Ringing preventing circuit

Country Status (1)

Country Link
JP (1) JPS611150A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192747U (en) * 1987-05-29 1988-12-12
JPH0213480A (en) * 1988-04-16 1990-01-17 Friedrich Wolff Condition training apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192747U (en) * 1987-05-29 1988-12-12
JPH0213480A (en) * 1988-04-16 1990-01-17 Friedrich Wolff Condition training apparatus
JPH0412995B2 (en) * 1988-04-16 1992-03-06 Borufu Furiidoritsuhi

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