JPH0744085Y2 - High frequency variable attenuator - Google Patents

Description

[Detailed description of the device]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency variable attenuator used in a microwave or millimeter wave band radio communication device.

[0002]

2. Description of the Related Art As a conventional high frequency variable attenuator, a structure using a pin (PIN) diode whose high frequency resistance value is changed by flowing a DC bias current is put into practical use. FIG. 3 is a circuit diagram of a conventional high frequency variable attenuator.
FIG. 3A is a parallel type variable attenuator having a one-stage configuration.
(B) is a ladder type (π type) variable attenuator having a two-stage configuration.
FIG. 4 shows the amount of attenuation with respect to the resistance value of the pin diodes D ₁ and D ₂ in FIG. Hereinafter, description will be given with reference to FIGS. In FIGS. 3A and 3B, D ₁ , D
₂ and D ₃ are pin diodes, R ₁ , R ₂ and R _{3 respectively.}
Is the resistance of each pin diode,

[1] indicates a transmission line having a characteristic impedance of Z ₀ and a length of λ / 4, C indicates a DC blocking capacitor, and B indicates a bias circuit.

In the case of the circuit of FIG. 3A, the same current flows through the pin diodes D ₁ and D ₂ by the DC bias current from the bias circuit B, and the high frequency resistance value is changed. Pin diode D ₁ for attenuation
Since the resistance value of D ₂ is the same and the voltage of the common bias circuit B is changed, there is an advantage that the bias circuit is simple.

On the other hand, in the case of the ladder type variable attenuation having the two-stage configuration shown in FIG. 3B, the bias current supplied to the pin diode D ₃ of the parallel arm in the subsequent stage is the pin diodes D ₁ and D _2.
Also, the same current flows and the high-frequency resistance value is changed at the same time, so that the attenuation amount can be changed.

[0005]

However, such a conventional circuit has the following drawbacks. First, in the case of the former FIG. 3A, the resistance values R _{1 of the two} pin diodes D ₁ and D ₂ ,
Since R ₂ is the same and R ₁ = R ₂ , the impedances Z ₁ and Z ₂ on the input side and the output side are the following (1),
It is expressed by equation (2).

[0006]

[Equation 1]

Therefore, the attenuation amount (Loss) is calculated by the following (3)
It is shown by the formula.

[Equation 2] Loos = 20log (1+ (R ₁ / Z ₀ )) …………… (3)

Since the input impedance Z ₁ is equal to the characteristic impedance Z ₀ of the transmission line according to the equation (1), the input wave is not reflected. However, the output impedance Z ₂
Has a drawback that the difference from Z ₀ becomes larger as R ₁ becomes larger according to the equation (2), a reflected wave appears, and the characteristics deteriorate.

On the other hand, in the latter circuit of FIG. 3B, when the pin diode D ₁ of the series arm is turned on, the respective λ / 4 transmission lines (I) and (II) are seen from the points a and b. Since the impedance is infinite (∞), its equivalent circuit is shown in FIG. 5 (A), and when the pin diode D ₁ is non-conductive, the equivalent circuit is Z ₀ as shown in FIG. 5 (B).
Therefore, there is an advantage that there is no reflection from the input / output side.
However, since the pin diode has an equivalent capacitance added in parallel as shown in FIG. 6 in terms of high frequency and the like, the amount of attenuation for the high frequency signal is limited and a desired value cannot be secured. Therefore, a configuration is used in which the circuits in FIG. 3B are connected in cascade to increase the number of stages to obtain a desired amount of attenuation. However, when such a ladder circuit has a multi-stage configuration, the amount of attenuation increases in proportion to the number of stages, but the number of bias circuits increases with each cascade connection, which is a drawback that the driving method becomes difficult.

In summary, in the conventional configuration, if the number of stages is further increased to form a ladder-type multi-stage configuration, (1) the reflection characteristic is poor. (2) It is difficult to secure a large amount of attenuation at high frequencies. (3) The bias driving method for the pin diode is difficult. (4) Loss is large. There are drawbacks such as. It is an object of the present invention to provide a high frequency variable attenuator that can solve such a problem even if it is configured in multiple stages and can obtain a large amount of attenuation.

[0011]

A high frequency variable attenuator of the present invention is a ladder type circuit in which a plurality of stages of parallel arms are connected in series by a series arm, and each of the plurality of stages of parallel arms has a high frequency. Is composed of a λ / 4 line having an impedance Z substantially equal to the characteristic impedance Z ₀ , a resistor having an impedance Z connected in series with the line, and a pin diode connected in parallel to the resistor. Between the resistor of the arm and the ground, between the pin diode of the other arm in parallel except for the stage immediately before the final stage and the ground, and in parallel from the second stage to the stage immediately before the final stage. DC blocking capacitors respectively inserted between the line of the arm and the connection point of the pin diode, and the pin diode of the parallel arm from the first stage to the stage immediately before the last stage. And a choke coil respectively inserted between the connection point of the capacitor and the pin diode connection point of the next stage, and a bias circuit connected to the connection point of the pin diode and the capacitor of the final stage parallel arm, Each of the series arms is composed of a pin diode, and the polarity of the pin diode is such that a bias current supplied from the bias circuit passes through a pin diode of the final stage parallel arm and a line of the series arm. It is characterized in that it is connected so that it flows from the pin diode of the parallel arm of the first stage through the diode to the pin diode of the next stage through the choke coil and then to the ground from the pin diode of the previous stage of the final stage. It is a thing.

[0012]

1 is a circuit diagram showing an embodiment of the present invention.
In this embodiment, the conventional two-stage structure shown in FIG.
This figure shows a ladder-type variable attenuator having a multi-stage configuration by increasing the number of stages to three or more (the number of stages: n ≧ 3). The number of stages n here is represented by the number of parallel arms having a ladder configuration. In the figure, Z ₀ represents the termination impedance on the input (IN) side and the output (OUT) side.

[Outer 2] is a transmission line with a characteristic impedance of Z and a length of λ / 4,
D ₁ , D ₂ ,-, D _n ,-, D _2n-1 are pin diodes. However, n is n ≧ 3 as described above. C is a high frequency path, a DC blocking capacitor, L is a choke coil, and B is a bias circuit.

In each parallel arm, a transmission line, a resistor having an impedance Z, and a capacitor C for blocking direct current are connected in series, and pin diodes D ₁ , D ₂ , D _n-1 , ..., D _n are respectively formed in the transmission line. The basic configuration is that it is connected between the connection point between the resistor and the resistor and the ground. The parallel arms are connected in series by pin diodes D _{n + 1} , D _{n + 2} , ..., D _2n-1 which are series arms between the stages. These series arm pin diodes D _{n + 1} ,
D _{n + 2} ,-, D _2n-1 are connected so that a forward current flows from the final stage toward the input side. In the basic circuit configured as described above, the connecting direction of the pin diodes is determined so that the pin diodes of each parallel arm form a direct current series path, and a high-frequency path and a DC blocking capacitor C are inserted. A DC path and a choke coil L for high frequency blocking are inserted and arranged between the cathode of the pin diode and the anode of the pin diode of the next stage in this order.

That is, in order to supply a bias current to the pin diode D _n of the final stage parallel arm, the cathode of the pin diode D _n is connected to the connection point between the transmission line and the resistor, and the capacitor is connected between the anode and ground. C is inserted to supply a bias current to the anode. This bias current flows through the pin diode of the series arm toward the input side via the transmission line of the final stage, and is applied to the pin diode D ₁ via the transmission line of the parallel arm of the first stage.

The pin diodes D ₁ , D ₂ , ..., D _n-1 of the parallel arms from the first stage to the stage one stage before the final stage have their anodes connected to the connection points between the transmission line and the resistors and the cathodes. The capacitor C is inserted between the first stage and the stage two stages before the final stage with the ground, and the stage one stage before the final stage is directly grounded. The cathodes of the pin diodes D ₁ , D ₂ ,-, D _n-2 from the first stage to the stage two stages before the final stage and the anodes of the pin diodes D ₂ ,-, D _n-1 of the next stage are formed. A choke coil L is connected between them, and a capacitor C is inserted between the choke coil L and the transmission line of the parallel arm from the second stage to the stage immediately before the final stage, and a direct current flows to the transmission line side. There is no such thing.

Since the parallel arms are connected as described above, the bias current applied to the pin diode D _{1 of the} first stage is sequentially applied to the pin diodes D ₂ ,-, D of the next stage.
It flows to _n-1 and the pin diode D of the stage one stage before the final stage
It flows to the ground through _n-1 . In this way, all the pin diodes are connected in series in a direct current manner, and the bias current supplied to the anode of the pin diode D _{n at} the final stage receives the series route D _n → D _2n-1 → ─D _n of the pin diodes. ₊₂
Since the same current flows through → D _{n + 1} → D ₁ → D ₂ → ─D _n-1 , the resistance value of all pin diodes due to the bias current is always the same resistance R ₁ . Therefore, from one Baice circuit B to all pin diodes D ₁ , D ₂ ,
The same current flows through D _2n-1, and a variable attenuator having a multi-stage configuration in which the resistance value of the pin diode is changed by changing the magnitude of the current to change the high frequency attenuation amount is obtained.

FIGS. 2A and 2B are characteristic diagrams of the embodiment of the present invention, and FIG. 2A shows the case where the parallel arm has three stages.
(B) is a characteristic showing the case where the parallel arm has five stages. The equivalent capacitance of the pin diode in this case is 1 pF. As is clear from FIGS. 2A and 2B, even if the number of stages is increased, good characteristics with extremely small reflection (VSWR) can be obtained, and a desired attenuation amount at a high frequency can be easily secured.

[0018]

As described in detail above, by carrying out the present invention, even in a multi-stage cascade connection, the resistance value of all the pin diodes is changed by the bias current from one Baice circuit and at high frequencies. Not only a desired high attenuation amount can be obtained, but also an extremely excellent reflection characteristic can be obtained, so that a high-frequency variable attenuator with high expandability can be realized, which is extremely effective in practice.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a characteristic diagram according to the present invention.

FIG. 3 is a circuit diagram of a conventional high frequency variable attenuator.

FIG. 4 is a characteristic example diagram of attenuation amount vs. pin diode resistance value.

FIG. 5 is an operation explanatory diagram of a conventional circuit.

FIG. 6 is an operation explanatory diagram of a conventional circuit.

[Explanation of symbols]

D ₁ , D ₂ , D ₃ , ... D _n , ... D _2n-1 pin diode B Baice circuit

[Outer 3] Resistance of transmission line R ₁ , R ₂ , R ₃ pin with length λ / 4 Z impedance Z ₀ Characteristic impedance

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Michio Norioka 2-13-13 Toranomon, Minato-ku, Tokyo Kokusai Electric Co., Ltd. (72) Yasuo Sera 2-3-13 Toranomon, Minato-ku, Tokyo International Electric Co., Ltd. (56) References Japanese Patent Laid-Open No. 57-44314 (JP, A)

Claims (1)

[Scope of utility model registration request] 1. A ladder circuit in which a plurality of stages of parallel arms are cascade-connected by a series arm, wherein each of the plurality of stages of parallel arms has a λ of an impedance Z substantially equal to a characteristic impedance Z ₀ at high frequencies.
/ 4 line and impedance Z connected in series with the line
And a pin diode connected in parallel to the resistor, between the resistors and the ground of the parallel arms of all stages, and the parallel arms of other stages except the stage immediately before the final stage. A capacitor for DC blocking inserted between the pin diode and the ground, and between the line of the parallel arm from the second stage to the stage immediately preceding the final stage and the connection point of the pin diode. Choke coils respectively inserted between the connection point of the pin diode and the capacitor and the connection point of the pin diode of the next stage of the parallel arm from the first stage to the stage immediately before the last stage, and the parallel arm of the final stage. A bias circuit connected to a connection point of the pin diode and a capacitor, each of the series arms is configured by a pin diode, the polarity of the pin diode, The bias current supplied from the bias circuit passes through the pin diode of the parallel arm of the final stage, the line of the pin diode of the series arm, the pin diode of the parallel arm of the first stage, and the pin of the next stage sequentially through the choke coil. A high frequency variable attenuator which is connected so as to flow from a pin diode at a stage immediately preceding the final stage to a ground through a diode.