JPS61113545U - - Google Patents
Info
- Publication number
- JPS61113545U JPS61113545U JP20066184U JP20066184U JPS61113545U JP S61113545 U JPS61113545 U JP S61113545U JP 20066184 U JP20066184 U JP 20066184U JP 20066184 U JP20066184 U JP 20066184U JP S61113545 U JPS61113545 U JP S61113545U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- comparison circuit
- flop
- load current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000009499 grossing Methods 0.000 description 1
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Protection Of Generators And Motors (AREA)
Description
第１図は本考案回路の一実施例を示すもので、
ａはブロツク図、ｂはその各部波形図であり、第
２図は従来例を示すもので、ａはブロツク図、ｂ
はその各部波形図である。
１……電源線、２……負荷電流検出手段または
変流器、３……整流平滑回路、４……比較回路、
５……設定回路、６……電源オン検知回路、７…
…タイマ回路、８……アンド回路、９……出力回
路、１０……電源スイツチ、１１……トグル型フ
リツプフロツプ、１２……アンド回路。
FIG. 1 shows an embodiment of the circuit of the present invention.
a is a block diagram, b is a waveform diagram of each part, and FIG. 2 shows a conventional example;
are waveform diagrams of each part. 1... Power supply line, 2... Load current detection means or current transformer, 3... Rectifier smoothing circuit, 4... Comparison circuit,
5...Setting circuit, 6...Power-on detection circuit, 7...
... timer circuit, 8 ... AND circuit, 9 ... output circuit, 10 ... power switch, 11 ... toggle type flip-flop, 12 ... AND circuit.
Claims (1)
を基準値と比較することにより過電流を検出する
比較回路とを備えた過電流検出回路において、上
記比較回路出力の立下りで反転するトグル型フリ
ツプフロツプと、該フリツプフロツプの出力を一
方の入力とし、上記比較回路出力を他方の入力と
するアンド回路とを設けたことを特徴とする過電
流検出回路。 In an overcurrent detection circuit comprising means for detecting load current and a comparison circuit for detecting overcurrent by comparing the load current detection signal with a reference value, there is provided a toggle type flip-flop that is inverted at the falling edge of the output of the comparison circuit. and an AND circuit having one input as the output of the flip-flop and the other input as the output of the comparison circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20066184U JPS61113545U (en) | 1984-12-24 | 1984-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20066184U JPS61113545U (en) | 1984-12-24 | 1984-12-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61113545U true JPS61113545U (en) | 1986-07-18 |
Family
ID=30761719
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20066184U Pending JPS61113545U (en) | 1984-12-24 | 1984-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61113545U (en) |
-
1984
- 1984-12-24 JP JP20066184U patent/JPS61113545U/ja active Pending