JPS61111025A - Automatic equalizer - Google Patents

Abstract

PURPOSE:To apply simply the algorithm by the ZF method by using a logical circuit to control and adjust a complex phase angle of a tap control signal of a filter of a transversal filter automatic equalizer. CONSTITUTION:The transversal filter consists of delay circuits 10, 11, a variable weighting circuit 21 of in-phase side corresponding to (-1) tap, a variable weighting circuit 31 of orthogonal side, a variable weighting circuit 20 of in- phase side corresponding to a main tap, a variable weighting circuit 22 of in- phase side corresponding to (+1) tap, a variable weighting circuit 32 of orthogonal side, a signal synthesis circuit 33 of in-phase side, a signal synthesis circuit 34 of orthogonal side and an orthogonal synthesis circuit 40. Then the phase is controlled by not using complex phase angle control circuits 101, 102 but using a cable for phase correction to the phase rotation in the delay circuit at all. Thus, it is not required to add a cable to correct the phase rotation of a carrier of a modulation signal in the delay circuit, and the accuracy of the phase correction is attained.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to an automatic equalizer, and in particular to an intermediate frequency band (hereinafter referred to as IF band) applied to orthogonal amplitude modulated waves used in digital wireless transmission systems. This invention relates to improvements in transversal automatic equalizers equipped with transversal filters.

(Prior Art) Conventionally, in digital wireless transmission systems, transversal equalizers, etc. have been used as countermeasures against line deterioration and momentary line interruptions caused by waveform distortion generated by multipath fading, etc. occurring in the transmission path. An adaptive automatic equalizer including

FIG. 4 is a conceptual block diagram of the transversal automatic equalizer, in which eight predetermined orthogonal amplitude modulation signals in the intermediate frequency band are input from the terminal 110 to the transversal filter l. . The output signal SR of the transversal filter 1 is input to the demodulation means 3, and the demodulated signal Sc is outputted via the terminal 120.
main tap control error signals YP' and YQ' for
Other tap control error signals Yp and YQ and demodulated data signals Dp and DQ are output, respectively. These YP
', YQ', Yp, YQ, Dp s DQ
is input to the control signal generating means 2, and is generated as a tap control signal C via a predetermined processing procedure in the control signal generating means 2.
, (comic = -N, -N+1,..., -1,0,1,...
, N-1, N) are generated and output, input to the transversal filter 1, and processed through variable weighting circuits of the corresponding taps to eliminate waveform distortion mainly caused by code amount interference in the IF band. Equalized. The operation of an IF band transversal equalizer equipped with these transversal filters 1, control signal generating means 2, demodulating means 3, etc. is already known (for example, Japanese Patent Application No. 1983-215271). FIG. 5 shows the main parts of a three-tap type transversal filter 1 and control signal generating means 2 as a premise for the explanation of the present invention to be described later.

The transversal filter section is a delay circuit lO with delay times τ1 and τ, respectively (τ□, τ are times corresponding to the reciprocal of the modulation speed and are originally set to be equal).
and the same 11, the in-phase side variable weighting circuit 21 and the orthogonal side variable weighting circuit 3 corresponding to the (-1) tap.
1 and a variable weighting circuit 2 on the in-phase side corresponding to the main tap.
0 and (+1) taps, an in-phase side variable weighting circuit 22, an orthogonal side variable weighting circuit 32, an in-phase side signal synthesis circuit 33, and an orthogonal side signal synthesis circuit 34,
It is formed by an orthogonal synthesis circuit 40 and phase adjustment cables 12 and 13. ' Also, the control signal generation section receives error signals YP', YQ', Yp XYQ, and demodulated data signal DP input from the demodulation means.
, DQ and the Yp
Q″″11 and demodulated data signal 1), -1, DQ″″1
As shown in the following □, the exclusive OR circuits 51 to 60 input one error signal and one demodulated data signal, and the output E -s,E I-s,ER・,E
Integrating circuit 81 with reset that receives Rt and El as inputs.
91.80.82.72, and the outputs r-u, d-, ro, rlsdl of the integrating circuit with reset are input to the variable weighting circuit 21.31.20.22.32, respectively.

The above error signals y/, YQ', Yp, YQ, y
p-t, Yq-1 and demodulated data signal Dp s DQ s
Exclusive OR circuit 5 with inputs Dp-' and DQ-凰
The operations involving additions in resistors 1 to 60 and resistors 61 to 70 are performed as follows.

ER-s=Yp-"■DP + YQ-"■DQ+
rt=ER-IEI-1=Yq-■Dp+
Yp ■DQ + d-+ ” E I-rE
Re ” Yp'■Dp +YQ'■, [) (2,
ro=ER.

ERs = Yp■Dp-' + YQ■DQ-'',
rt=KR+ where (■) is an exclusive OR - is an inverted output + is an addition by a resistor ~ shows time averaging by an integrator with reset.

The integrating circuit with reset outputs time-averaged input signals r-x, cL, ro, r when several books are in synchronization.
l, dl, and at the time of asynchronous divergence r −s = a−1
= rs = dt =O1r·=1 and wait for synchronization pull-in. These operations are carried out at terminal 6 from the demodulating means.
controlled by a carrier synchronization signal.

The fact that equalization is performed by the above control signal is Z F
(Zero Forcing) algorithm is known (Japanese Patent Application No. 56-215271 mentioned above).

Next, the operation of the transversal self-filter will be described.

In FIG. 5, a modulated signal in the intermediate frequency band is input from the terminal 4 and is inputted to the delay circuit 10 as the modulated signal S-8 at the (-1) tap. It is also input to the variable weighting circuit 31 of.

The output signal S of the delay circuit 10 is input to the delay circuit 11 as a modulation signal at the main tap, and is also input to the variable weighting circuit 20 on the in-phase side corresponding to the main tap. The output signal S1 of the delay circuit 11 is given a predetermined phase shift via the cable 12, and is then input to the in-phase side variable weighting circuit 22 and the orthogonal side variable weighting circuit 32 corresponding to the (+1) tap as the modulated signal abruptly. is input to both. (-1) In the variable weighting circuits 21 and 31 corresponding to the taps, the in-phase control signal r-
+ and orthogonal control signal cL, the amplitude and polarity of the signal input of the modulated signal S-s at the (-1) tap are controlled, and the modulated signal S! and S to the signal synthesis circuits 33 and 34, respectively. Furthermore, in the variable weighting circuit 20 corresponding to the main tap, the amplitude of the signal input of the modulation signal Sa at the main tap is controlled by the in-phase control signal r0 output from the integrating circuit with reset 80, and the modulation signal S' is generated. After being given a predetermined phase shift via the cable 13, the signal is input to the signal synthesis circuit 33 as a modulated signal.

Similarly, in the variable weighting circuits 22 and 32 corresponding to the (+1) tap, the above-mentioned (+1) tap is The amplitude and polarity of the signal input of the delayed signal sum of the modulated signal S1 in are controlled, and the modulated signals ρ' and ? The signal is output as a signal and input to the signal synthesis circuits 33 and 34. In the signal synthesis circuit 33, the above-mentioned in-phase modulation signals S-:, s; and s; are added and output as a modulation signal Sr, which is input to the orthogonal synthesis image path 4. Further, in the signal synthesis circuit 34, the above-mentioned orthogonal side modulation signal S2 and the modulation signal S2 are added together and outputted as a modulation signal S1, which is input to the orthogonal synthesis circuit 40. In the orthogonal combining circuit 4o, the modulated signals S and SI are orthogonally combined in the form Sr+jS+ (j=1) and outputted as a modulated signal So via the terminal 5.

In the transversal filter section shown in FIG. 5, the delay times τ1 and τ of the delay circuits 10 and 11 are
Since all snow signals are set at a time equivalent to the reciprocal of the modulation speed (clock frequency) of the input modulation signal, generally at the output point of each tap, the phase of the main tap signal s0 and the other tap signals S- 1 and S do not match in phase. That is, the phase rotation in the delay circuits lo and 11 is as follows, assuming that the angular frequency of the carrier wave is ω.

In the above equation, Δθ−1 and Δθ1 are π to 2 of the phase rotation of the carrier wave in delay circuits 10 and 11, respectively.
is the amount of phase shift from .

Based on the phase of the main tap signal S, (-1)
In the tap, it leads by ΔI− in radians, and in the (+1) tap, it lags in Δθ radians.

As is well known, in a transversal equalizer, when applying an algorithm based on the ZF method, for example, Δθ−1 and Δθl in equation (1) above are as follows.
It is essential that each of them be placed under the following constraint conditions.

If the condition of equation (2) above does not hold, the polarity of the control system forming the tiger/sparsal equalizer will not be normalized, and especially when Δθ−1 and Δθ1 are around ±100, Due to phase rotation in the delay circuits 10 and 11 due to variations in carrier frequency in the input modulated signal, the stability of the control system becomes unstable and the function as an equalizer is completely impaired. As one of the countermeasures against this problem, in the conventional transpertiled equalizer shown in FIG. Eliminating factors.

For example, in the conventional example shown in Fig. 5, as shown in Fig. 6,
The phase of S-1 leads by about 34 radians with respect to the phase of S, and the phase of Sl is about 3/! , , 2K radians in Δθ1 = Δθ−1, the main signal S is transmitted by the cable 13 (2π
-Δθ-8) radians and the (+1) tap signal is delayed by 2×(2π-Δθ1) radians by the cable 12 described above, the phases of the (+1) tap signal and the (-1) tap signal will be the same as that of the main tap signal. The ZF algorithm can be applied when the phase matches and the condition of equation (2) is met.

(Problems to be Solved by the Invention) However, as described above, in the conventional transversal equalizer in which a cable is added in order to correct the amount of phase rotation of the carrier wave of the modulated signal in the delay circuit, It is necessary to provide an extra cable that does not need to be added as an essential component, and since phase adjustment using a cable can only be adjusted in the direction of delaying the signal, it may be necessary to insert a considerably long cable depending on the phase state of each tap. This often causes difficulties in implementation, and the time difference between each tap, which should normally be equal to the reciprocal of the modulation speed (black and white frequency), shifts due to cable insertion, so equalization of the automatic equalizer is difficult. In addition, the cable length adjustment requires a large amount of time due to the accuracy of the phase correction amount.

(Means for Solving the Problems) It is an object of the present invention to eliminate the above-mentioned drawbacks and to connect the main taps of a seven transversal filter while maintaining the correct delay time between each tap without using extra cables. By controlling the complex phase angle of the tap control signal corresponding to a specific tap among the taps excluding the The object of the present invention is to provide an automatic equalizer that uses the following methods.

The present invention has the following configuration to achieve the above object.

2N(N
is a positive integer) delay circuits (2N+1
) Tap intermediate frequency band transversal filter In a transversal type automatic equalizer, the phase of the intermediate frequency modulation signal at the main tap of the transversal filter and the phase of the intermediate frequency modulation signal at the other 2N taps excluding this main tap are With reference to the phase of each intermediate frequency modulation signal, tap control signals C, (state=-N, -N+1, ..., -) corresponding to 2N taps excluding the main tap are determined.
This is an automatic equalizer equipped with a predetermined complex phase angle control means for controlling and adjusting the complex phase angles of 2, -1, 2, .

Further, as an embodiment thereof, the predetermined complex phase angle control means has a complex phase angle adjustment function in steps of '/2 radians, and in order to realize this phase angle adjustment function, the predetermined complex phase angle control means is a target of phase angle adjustment. The automatic controller sets the input classification and polarity of the in-phase control signal and quadrature control signal to the variable weighting circuits on the in-phase side and quadrature side of the tap corresponding to the tap coefficient in accordance with the phase angle adjustment of the step of 2 radians. It is an equalizer.

(for production) Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 shows the main parts of a transversal filter section and a control signal generation section to which the present invention is applied. N for convenience of explanation
=1, that is, a 3-tap transversal filter. As shown in FIG. 1, the transversal filter used in the present invention includes a delay circuit 10 and a delay circuit 11.
and (-1) the in-phase side variable weighting circuit 21 and orthogonal side variable weighting circuit 317 corresponding to the tap, the in-phase side variable weighting circuit 20 corresponding to the main tap, and (+1)
An in-phase variable weighting circuit 22 and an orthogonal variable weighting circuit 32 corresponding to the taps, an in-phase signal synthesis circuit 33, an orthogonal signal synthesis circuit 34, and an orthogonal synthesis circuit 40
It is equipped with

In addition, the control signal generation section generates error signals y, l,
Yq', YpsYq, demodulated data signals Dp, D, and error signal y, which is delayed by 1 bit by slip flops 71, 73, 74, and 75, respectively; 'y'
;' and the demodulated data signal D;1, D=1 As described above in the example of FIG. The outputs of the exclusive OR circuit are added together through resistors 61 to 70 to produce six outputs E R-t, EI-s, ERo, ERl.
A complex phase angle control circuit 101 which receives ER- and II-t of E R1 and E I as inputs, and E R1 and E I
A complex phase angle control circuit 102 which receives r as an input, integration circuits 81 and 91 with resets which receive the outputs r-'1 and d-'1 of the complex phase angle control circuit 101 as inputs, and the complex phase angle control circuit 102. Integrating circuits 82 and 72 with resets each receiving the outputs rr and d: of the circuit 102, and the E
It consists of an integrating circuit 80 with R, which receives R, as an input.
The output r- of the integrating circuit 81 with reset, the output d-1 of the same 91. The output r0 of the same 80, the output r8 of the same 82, and the output d of the same 72 are respectively the variable weighting circuits 21, 31. It is input as a control signal to the terminals 20, 22 and 32. Further, details of the complex phase angle control circuits 101 and 102 are shown in FIG.

The main difference in the structure of the present invention from the conventional example is that in the present invention, the above-mentioned phase correction cable for phase rotation in the delay circuit is not used at all, and the complex phase angle control circuit 101 as shown in FIG. and 102 to control the phase.

Next, the basic principle of complex phase angle control of the present invention will be explained with reference to FIG. For simplicity, the variable weighting amount in the main tap is set to 1. That is, S: = S.

It is. Furthermore, we will normalize it to ls, 1=ls:l=t. In FIG. 3(a), the main tap signal S0
is plotted on the real axis, and the amount of code amount interference caused by the (-1) bit signal is expressed as a complex number E-1=α+jβ.

Now, this code amount interference E-, is converted into (-1) tap signal S
To perform equalization using -1, the variable weighting circuits 21 and 31 are used to calculate E-s=E-□, and when added to the main signal S0, the main signal S is obtained.

The code amount interference E-, included in is equalized.

That is, if the tap control coefficient 2C for (-1) tap is C-3,=E25=E-86-(α+jβ)...(3
), it is sufficient to output C that satisfies the formula. Therefore, C becomes.

<(-1) tap signal S as shown in FIG. 3(a).

is in the same amplitude and phase as the main tap signal S, that is, s,
When = s, = i, C becomes C=-(α+jβ).

On the other hand, as shown in FIG. 3(b), when the tap signal <(-1) is ahead of the main tap signal S by sea radians, S-s
"j" Since So = j, the signal E2 is generated by multiplying S-□ by the above tap control coefficient.

is E double = c-s-, =-(α+jβ)・j = β-
jα ...(4) Even if it is added to the main signal S including E-1=α+jβ, E-, +Ei,' = (α+β)+j
(-α+β)...(5), and it cannot be equalized and diverges.

Therefore, the main signal S is advanced by radians (-1
) from tap signal 5-8(:j), L', =-α+j(
-β), the control signal C' is C'·S-, = E-'.

C'・j=-α+j(-β), a, C'=-β+jα ・・・・・・・・・・・・
......(6) That is, C' is the original control signal C
The real part of =-α+j(-β) is inverted (-1 times) and the imaginary part is replaced.

The above describes the case where the tap signal is in phase with the main tap signal S0 and the case where it leads by η radians.
In the same way, if we examine the case where the lead is π radians and the case where the lead is 3 tradians (delayed by ηrad), the first
It will look like the table.

Table 1. Here, the control signal C= r + j d made from the error signal Y,, Y0, Y; 1, Y-1, the demodulated data signal DP, D0, D-, l, I); The relationship between the new control signal C'=r'+j d' whose complex phase angle is controlled in order to correctly control each tap signal is shown.

In addition, in the circuit shown in FIG. 2, when the real part (Pl phase side) and imaginary part (orthogonal side) of the control signal are swapped and the originality is reversed as shown in Table 1, the control human power T6, T1,
Table 1 also shows the values that the logic level of T should take.

For example, when the phase angle with respect to the main tap signal S is as shown in FIG. 6, in FIG.
T and T are at the 'H# (21) level, Tr tt
'l'L' (= 0) Fix kVC to V,
It can be seen that TQ and T of the complex phase angle control circuit 102 on the (+1) tap side should be fixed at the 'H# level, and T1 should be fixed at the 'L' level.

In the embodiment of the present invention shown in FIG. 1, a modulated signal in the intermediate frequency band is inputted from the terminal 4, and is inputted to the delay circuit 10 as the modulated signal S-8 at the (-1) tap, and the in-phase side variable It is also input to the weighting circuit 21 and the variable weighting circuit 31 on the orthogonal side. The output signal S0 of the delay circuit 10 is sent to the delay circuit 11 as a modulation signal at the main tap.
It is also input to the variable weighting circuit 20 on the in-phase side corresponding to the main tap. The output signal S of the delay circuit 11 is input as a modulation signal at the (+1) tap to both the variable weighting circuit 22 on the in-phase side and the variable weighting circuit 32 on the orthogonal side. In the variable weighting circuits 21 and 31 corresponding to the (-1) tap, the above-mentioned (-1)
) The amplitude and polarity of the signal input of the modulated signal S-1 at the tap are controlled and inputted to the signal synthesis circuits 33 and 34 as the modulated signals Sll and S-1, respectively. In addition, in the variable weighting circuit 20 corresponding to the main tap, the amplitude of the signal input of the modulation signal S at the main tap is controlled by the in-phase control signal r6 outputted from the integrating circuit with reset 80, and the amplitude of the signal input to the main tap is controlled as the modulation signal S'. 33. Similarly, in the variable weighting circuits 22 and 32 corresponding to the (+1) tap, the in-phase control signal r
and orthogonal control signal d, the amplitude and polarity of the signal input of the modulated signal S1 at the (+1) tap are controlled and output as modulated signals S' and S2, respectively, and input to the signal synthesis circuits 33 and 34, respectively.

In the signal synthesis circuit, the above-mentioned in-phase modulation signal Sl
8, S; and S; are added to form a modulated signal S.

The signal is outputted as a signal and inputted to the orthogonal combining circuit 40.

Further, in the signal synthesis circuit 34, the above-mentioned orthogonal side modulation signals S-8 and Sl are added and outputted as a modulation signal S, which is input to the orthogonal synthesis circuit 40. Orthogonal synthesis circuit 4
At 0, s, + js.

The auxiliary modulation signals S and Sl are orthogonally combined in the form shown below and output as a modulation signal S0 via the terminal 5.

In the above description of the present invention, a transversal type equalizer using a 3-tap type transversal filter was explained, but of course the present invention is not limited to a 3-tap type, but 2N+1(N is any positive integer)
Needless to say, the present invention can also be applied to a transversal equalizer equipped with a tap-type transversal filter.

(Effects of the Invention) As described above in detail, the present invention provides an automatic equalizer including a transversal filter, in which the complex phase angle of the tap control signal of the transversal filter is controlled and adjusted by a simple logic circuit. By doing so, there is no need to add a cable to correct the amount of phase rotation of the carrier wave of the modulated signal in the delay circuit.
When the cable becomes long as in technology; 1
Yo. . Ya1, engineering. ff<$L<66 The time difference between each tap may be distorted by inserting a cable, impairing the function of the equalizer, or requiring time and effort to adjust the cable length in order to obtain the accuracy of the phase correction amount. This has the effect that the above disadvantages are removed, the algorithm based on the ZF method can be easily applied, and the performance and economy related to adjustment man-hours are significantly improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main parts of the transversal filter and control signal generator when the 3-tap transversal Hatake filter of the present invention is used, and FIG. 2 is a block diagram showing the main parts of the transversal filter and control signal generator used in the automatic equalizer of the present invention. Complex phase angle control circuit, FIG. 3 is a diagram explaining the operation of the complex phase control circuit used in the automatic equalizer of the present invention, FIG. 4 is a conceptual block diagram of the automatic equalizer, and FIG. 5 is a conventional FIG. 6 is a block diagram showing the main parts of the transversal filter and control signal generating section in the automatic equalizer, and FIG. 6 is a complex phase diagram of the modulation signal corresponding to each trap. 1...Transversal filter-filter, 2...
Control signal generation means, 3... demodulation means, 4, 5.
6...Terminal, 10.11...Delay circuit, 12.
13... Cable for phase adjustment, 20°21.2
2, 31.32...Variable weighting circuit, 33.34.
... Signal synthesis circuit, 40... Orthogonal synthesis circuit,
51-60...exclusive OR circuit, 61-70...
Resistor, 71.73.74. 75...Flip...
Flo, P, 72,80,81゜82.91...Integrator circuit with reset, 101゜102...Complex phase angle control circuit, 110.120...Terminal

Claims (2)

[Claims] (1) 2 with a delay time approximately equal to the reciprocal of the modulation speed
Formed by N (N is a positive integer) delay circuits (2
In a transversal type automatic equalizer equipped with an N+1) tap intermediate frequency band transversal filter, the phase of the intermediate frequency modulation signal at the main tap of the transversal filter and the phase of the intermediate frequency modulation signal at the other 2N taps excluding this main tap are With reference to the phase of each intermediate frequency modulation signal, tap control signals Cn (n=-N, -N+1, . . . ) corresponding to 2N taps excluding the main tap are determined.
, -2, -1, 1, 2, . . . , N-1, N). (2) The predetermined complex phase angle control means has a complex phase angle adjustment function in steps of π/2 radians, and in order to realize this phase angle adjustment function, the tap coefficient to be the target of phase angle adjustment. The input classification and polarity of the in-phase control signal and quadrature control signal to the variable weighting circuits on the in-phase side and quadrature side of the tap corresponding to the tap are set in accordance with the phase angle adjustment in steps of π/2 radians. An automatic equalizer according to claim (1).