JPS61110772A - Multi-layer thin film forming device - Google Patents

Multi-layer thin film forming device

Info

Publication number
JPS61110772A
JPS61110772A JP23081384A JP23081384A JPS61110772A JP S61110772 A JPS61110772 A JP S61110772A JP 23081384 A JP23081384 A JP 23081384A JP 23081384 A JP23081384 A JP 23081384A JP S61110772 A JPS61110772 A JP S61110772A
Authority
JP
Japan
Prior art keywords
reaction chamber
thin film
chamber
opening
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23081384A
Other languages
Japanese (ja)
Inventor
Masakazu Ueno
正和 上野
Yoshiyuki Uchida
内田 喜之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP23081384A priority Critical patent/JPS61110772A/en
Publication of JPS61110772A publication Critical patent/JPS61110772A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/28Deposition of only one other non-metal element
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/482Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation using incoherent light, UV to IR, e.g. lamps
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating

Abstract

PURPOSE:To form a multi-layer thin film of optional constitution by communicating a plasma CVD reaction chamber with an optical CVD reaction chamber through a connecting port which can be closed up, and moving a substrate between each reaction chamber by a carrying means. CONSTITUTION:A connecting port 5 between plasma CVD reaction chambers 1, 2 and an optical CVD reaction chamber 3, and a carrying chamber 4 is partitioned by an opening and closing valve 6. A tray 8 to which a substrate 7 has been set is put into the carrying chamber 4, and the inside of the carrying chamber 4 is exhausted by closing an opening and closing valve 9. The tray 8 moves on a carrying rail 10, and stops in front of a desired reaction chamber. By opening an opening and closing valve 5, the tray 8 is put into the reaction chamber which has been brought to vacuum exhaust in advance. By closing the opening and closing valve 5 and leading in a prescribed gas, the first thin film is formed on the substrate 7. By opening the opening and closing valve 5 again, the tray 8 is fed out to the carrying chamber 4, put into the next reaction chamber, and the second thin film is superposed and formed. By repeating it, a desired multi-layer thin film is formed.

Description

【発明の詳細な説明】[Detailed description of the invention] 【発明の属する技術分野】[Technical field to which the invention pertains]

本発明は、例えば非晶室シリコンのp−1−n構造をを
する光電変換素子のように複数層の半導体薄膜を積層し
た電子素子を製造するための多層薄膜形成装置に関する
The present invention relates to a multilayer thin film forming apparatus for manufacturing an electronic device in which a plurality of semiconductor thin films are laminated, such as a photoelectric conversion device having a p-1-n structure of amorphous silicon.

【従来技術とその問題点】[Prior art and its problems]

近年薄膜半導体を用いた電子素子、特に非晶室シリコン
(以下a−5iと記す)を用いた光電変換素子の研究が
盛んであり、電卓用電源あるいは各種センサへ実用化が
行われている。現在これらのa−8iを形成する方法と
しては、モノシラン(Sime)ガス中でのグロー放電
分解により基板上に薄膜を成長させるプラズマCVD法
が広く採用されている。第2図にこの原理図を示す0反
応室21内に原料ガス22を導入し、ヒータ24により
加熱される支持体25の上の基板23と放電電極26と
の間に電源27によって高周波電界を加え°ることによ
り、電極26と基板23の空間28にプラズマを発生さ
せる。 空間2Bの中ては、記入された反応図のようにプラズマ
中の電子が原料ガス分子と衝突することにより活性分子
が出来、これが基板23上に堆積するものである。とこ
ろが同時に有害無益なイオンが発生するため、基板上に
イオン損傷が生じたり、反応槽壁に付着した不純物等が
たたき出され、薄膜に悪影響を及ぼす場合もある。ある
いはプラズマが基板上に既に設けられた下層を損なうこ
ともある。
In recent years, research has been active on electronic devices using thin film semiconductors, particularly photoelectric conversion devices using amorphous silicon (hereinafter referred to as a-5i), and they are being put to practical use in power supplies for calculators and various sensors. Currently, as a method for forming these a-8i, a plasma CVD method is widely adopted in which a thin film is grown on a substrate by glow discharge decomposition in monosilane (Sime) gas. A raw material gas 22 is introduced into a reaction chamber 21 whose principle is shown in FIG. By adding this, plasma is generated in the space 28 between the electrode 26 and the substrate 23. In the space 2B, active molecules are formed by collision of electrons in the plasma with source gas molecules, and these are deposited on the substrate 23, as shown in the reaction diagram. However, since harmful and useless ions are generated at the same time, ion damage may occur on the substrate, and impurities adhering to the walls of the reaction chamber may be knocked out, which may have an adverse effect on the thin film. Alternatively, the plasma may damage underlying layers already provided on the substrate.

【発明の目的】[Purpose of the invention]

本発明は、上述のようなプラズマCVD法の欠点を除去
して、特性の良い多層薄膜電子素子を製造するために用
いることができる多層薄膜形成装置を提供することを目
的とする。
An object of the present invention is to provide a multilayer thin film forming apparatus that can be used to eliminate the drawbacks of the plasma CVD method as described above and to manufacture multilayer thin film electronic devices with good characteristics.

【発明の要点】[Key points of the invention]

本発明は、上述の目的を達成するためにプラズマCVD
法と光CVD法とを組み合わせたものである。光CVD
法は、公知のように紫外線の輻射エネルギーにより原料
ガス分子を分解、解離させる方法である。すなわち、第
3図に示すように反応室31の中に原料ガス32を導入
し、ヒータ34により加熱される支持体35の上の基板
33の上の空間38に紫外光源37からの紫外光36を
入射させる。空間3日の中では、記入された反応図のよ
うに光子が原料分子に衝突することにより活性分子が出
来、これが基板33上に堆積するものである。この方法
によれば、1111成長の速度はプラズマCVD法に比
べて遅いものの、第3図から明らかなようにイオンが発
生しないため上述のプラズマCVD法の欠点は存在しな
い。 本発明による多層llR形成装置は、真空気密室内にr
5rIm5層の連絡口を介して互いに連通ずるプラズマ
CVD反応室および光CVD反応室と基板を各反応室間
において任意の方向に移動できる搬送手段とを備えるこ
とにより、プラズマCVD法と光CVD法を適宜組み合
わせて多層III!!電子素子を製造可能にする。
In order to achieve the above-mentioned objects, the present invention utilizes plasma CVD
This is a combination of the method and the photo-CVD method. Optical CVD
This method is a well-known method in which source gas molecules are decomposed and dissociated using ultraviolet radiant energy. That is, as shown in FIG. 3, a raw material gas 32 is introduced into a reaction chamber 31, and ultraviolet light 36 from an ultraviolet light source 37 is emitted into a space 38 above a substrate 33 on a support 35 heated by a heater 34. is made incident. In the space of 3 days, photons collide with raw material molecules to form active molecules, which are deposited on the substrate 33, as shown in the reaction diagram shown. According to this method, although the speed of 1111 growth is slower than that of the plasma CVD method, as is clear from FIG. 3, no ions are generated, so the drawbacks of the plasma CVD method described above do not exist. The multilayer llR forming apparatus according to the present invention has r
The plasma CVD method and the photo CVD method can be performed by providing a plasma CVD reaction chamber and a photo CVD reaction chamber that communicate with each other through a five-layer communication port, and a transport means that can move the substrate in any direction between the reaction chambers. Combine appropriately to create multilayer III! ! Make it possible to manufacture electronic devices.

【発明の実施例】[Embodiments of the invention]

第1図は、本発明の一実施例による装置の主要部の平面
断面図である。主要部は三つの反応室1゜2.3と搬送
室4からなり、反応室1.2はプラズマCVDによって
薄膜を形成し、反応室3は光CVDにより薄膜を形成す
るための室である。各反応室1,2.3と搬送室4との
間の連絡口5は、開閉パルプ6で仕切られており、基板
7を搭載したトレイ8を反応室、Wi送室間の移動の際
には開け、成膜中には閉じられる。また開閉パルプ9は
トレイ8を搬送室4へ出し入れするために設けられてい
る。搬送室4内には反応室1,2.3の並ぶ方向に搬送
レール10が設けられている。 ここで実際に多層薄膜を形成する手順を述べる。 基板7をセットしたトレイ8を搬送室4に入れ、開閉パ
ルプ9を閉じ搬送室内を排気管11より真空排気する。 このトレイは搬送レール10の上を移動し、所望の反応
室(例えば反応室1)の前で停止する0次に開閉パルプ
5を開け、移動ローラ (後述)によりトレイ8を多ら
かじめ真空排気された反応室1に入れる。開閉パルプ5
を閉じ所定のガスを導入した後、プラズマ反応により第
一の薄膜を基板7の上に形成する。再び開閉パルプ5を
開け、トレイ8を搬送室4へ送り出し、次の反応室で第
二の薄膜を重ねて形成する。これを操り返すことにより
、所望の多層薄膜が形成される。 各反応室の構成を詳しく説明するために、第1図A−A
’面の断面図を第4図、第5図に示す、第4図は反応室
1 (プラズマCVD法)の断面図である。ここには基
板を所定の温度に上昇させるためのヒータ24と、それ
に平行に設置された二枚の放電電極26がある。基板を
搭載したトレイ8は移動ローラ28に掛かっている。ヒ
ータ24とトレイ8は電気的に接地しており、一方放電
電極26は図には示していないが高周波電源の出力と接
続されている。 第5図は反応室3 (光CVD室)の断面図である。ヒ
ータ34.移動ローラ38等はプラズマ反応室のヒータ
24.移動ローラ28と同様であるが、放電電極の位置
に紫外線発光用の低圧水銀ランプ37が設置されている
。 第6図は本装置をa −31太陽電池の製造に応用した
時の工程例を、2種類′簡単に示している。ここに示し
た2例は、いずれもすでに透明電極を形成したガラス基
板上にp−1−n三層を形成するものである。(a)の
場合には、まず反応室3において光CVD法により9層
を約100人の厚さに形成する。使用する原料ガスはジ
シラン (Si、H,)とジボラン(BJa)の混合ガ
スであり、基板温度200℃程度で成長させる0次に反
応室1でモノシランのグロー放電分解により1層を形成
し、反応室2でモノシランとホスフィン(Pffs)の
グミ−放電分解により1層を形成する。この工程により
製作した太陽電池は次の点で優れた特徴を持っている。 通常透明電極としてはITO<インジウムと錫の酸化物
)を用いるが、グロー放電分解法で9層を形成すると、
170表面がプラズマにより還元され薄い絶縁層が出来
る。その結果、直列抵抗が増加し出力特性が悪くなろ、
しかし光CVD法によりp層を形成するこの工程では前
述した通り、イ′オンの発生がないので、この現象は生
じない。 次に第6図〜)の工程はp層、n層をグロー放電分解に
よるプラズマCVD法で形成し、1層を光CVD法で形
成する。この場合p層、n層は微結晶(me)相を含ん
だa−3tであり、このためp層での光吸収ロスの低減
、n層とその上に形成される金属電極との接触抵抗の低
減が図られる。このことは公矧の事実である。しかし最
も効果的なのは、1層を光CVD法で形成するので、反
応槽内壁からの不純物の購入を防ぐことが出来るのであ
る。なおいずれの工程でも光CVD法の適用は1層のみ
であり、成長速度の遅いことをカバーすることができる
。 以上p−1−n三層構造の非晶質シリコンについて、本
発明の適用例について説明したが、これらに限定されな
いことは言うまでもない、また第1図あるいは第4.第
5図に示された構造は、本発明による装置の概念を示す
ものであって、これにとられれることはない。 第6図の工程例からも明らかなように、本発明によろ装
置は、プラズマCVD法と光CVD法のどのような組み
合わせも使用可能で、装置の構造を変更する必要がない
FIG. 1 is a plan sectional view of the main parts of an apparatus according to an embodiment of the present invention. The main part consists of three reaction chambers 1.2.3 and a transfer chamber 4. Reaction chamber 1.2 is a chamber for forming a thin film by plasma CVD, and reaction chamber 3 is a chamber for forming a thin film by photoCVD. The communication port 5 between each reaction chamber 1, 2.3 and the transfer chamber 4 is partitioned by an opening/closing pulp 6, so that the tray 8 carrying the substrate 7 can be moved between the reaction chamber and the Wi transfer chamber. is open and closed during film deposition. Further, an opening/closing pulp 9 is provided to take the tray 8 in and out of the transfer chamber 4. A transport rail 10 is provided within the transport chamber 4 in the direction in which the reaction chambers 1, 2.3 are lined up. Here, we will describe the procedure for actually forming a multilayer thin film. The tray 8 on which the substrate 7 is set is placed in the transfer chamber 4, the open/close pulp 9 is closed, and the transfer chamber is evacuated through the exhaust pipe 11. This tray moves on the conveyor rail 10 and stops in front of a desired reaction chamber (for example, reaction chamber 1). Next, the opening/closing pulp 5 is opened, and the tray 8 is preliminarily vacuumed by moving rollers (described later). Place in the evacuated reaction chamber 1. Opening and closing pulp 5
After closing and introducing a predetermined gas, a first thin film is formed on the substrate 7 by plasma reaction. The open/close pulp 5 is opened again, the tray 8 is sent to the transfer chamber 4, and a second thin film is overlaid and formed in the next reaction chamber. By manipulating this, a desired multilayer thin film is formed. In order to explain the configuration of each reaction chamber in detail, FIG.
4 and 5 are cross-sectional views of the ' plane. FIG. 4 is a cross-sectional view of the reaction chamber 1 (plasma CVD method). Here, there is a heater 24 for raising the temperature of the substrate to a predetermined temperature, and two discharge electrodes 26 installed parallel to the heater 24. The tray 8 loaded with substrates is hung on a moving roller 28. The heater 24 and the tray 8 are electrically grounded, while the discharge electrode 26 is connected to the output of a high frequency power source (not shown). FIG. 5 is a sectional view of the reaction chamber 3 (photo-CVD chamber). Heater 34. The moving roller 38 and the like are connected to the heater 24 of the plasma reaction chamber. Although it is similar to the moving roller 28, a low pressure mercury lamp 37 for emitting ultraviolet light is installed at the position of the discharge electrode. FIG. 6 briefly shows two types of process examples when this apparatus is applied to the production of A-31 solar cells. In both of the two examples shown here, p-1-n three layers are formed on a glass substrate on which transparent electrodes have already been formed. In the case of (a), nine layers are first formed in the reaction chamber 3 to a thickness of about 100 layers by photo-CVD. The raw material gas used is a mixed gas of disilane (Si, H,) and diborane (BJa), and one layer is formed by glow discharge decomposition of monosilane in the zero-order reaction chamber 1, which is grown at a substrate temperature of about 200°C. In reaction chamber 2, a layer is formed by gummy discharge decomposition of monosilane and phosphine (Pffs). The solar cell manufactured by this process has the following excellent features. Normally, ITO (indium and tin oxide) is used as a transparent electrode, but when nine layers are formed using the glow discharge decomposition method,
The 170 surface is reduced by the plasma to form a thin insulating layer. As a result, the series resistance increases and the output characteristics deteriorate.
However, in this process of forming the p-layer by the photo-CVD method, as described above, no ions are generated, so this phenomenon does not occur. Next, in the steps shown in FIGS. 6-), the p-layer and n-layer are formed by plasma CVD using glow discharge decomposition, and one layer is formed by photo-CVD. In this case, the p-layer and n-layer are a-3T containing a microcrystalline (me) phase, which reduces light absorption loss in the p-layer and reduces contact resistance between the n-layer and the metal electrode formed on it. This will reduce the amount of This is an obvious fact. However, the most effective method is to form one layer by photo-CVD, which can prevent impurities from being purchased from the inner wall of the reaction tank. Note that in both steps, the photoCVD method is applied to only one layer, which can compensate for the slow growth rate. Although the application examples of the present invention have been described above with respect to amorphous silicon having a p-1-n three-layer structure, it goes without saying that the present invention is not limited to these examples. The structure shown in FIG. 5 illustrates the concept of the device according to the invention and is not to be taken as such. As is clear from the process example shown in FIG. 6, the apparatus according to the present invention can use any combination of plasma CVD and photoCVD, and there is no need to change the structure of the apparatus.

【発明の効果】【Effect of the invention】

本発明は、光CVD反応室とプラズマ反応室とを備え、
それらの室の間で基板を外気に触れることなく搬送でき
るようにしたもので、光CVD法。 プラズマCVD法の利点をそれぞれ生かした任意の構成
の多層薄膜を形成することができ、各層の薄膜間の界面
もクリーンに保たれるため、特性の良好な光電変換素子
あるいは薄膜トランジスタなどの多層is素子の製造に
極めて有効に使用できる。
The present invention includes a photo-CVD reaction chamber and a plasma reaction chamber,
This is a photo-CVD method that allows substrates to be transported between these chambers without being exposed to the outside air. Multilayer thin films with arbitrary configurations can be formed by taking advantage of the advantages of the plasma CVD method, and the interface between the thin films of each layer is also kept clean, so it is possible to form multilayer IS devices such as photoelectric conversion elements or thin film transistors with good characteristics. It can be used extremely effectively in the production of

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による装置の要部の平面断面
図、第2図、第3図はそれぞれプラズマCVD法および
光CVD法の原理を反応図を含めて示した装置の断面図
、第4図、第5図はそれぞれ第1図のプラズマCVD反
応室および光CVD反応室のA−^°線断面図へ第6図
は本発明による装置を用いた二つの工程例の工程図であ
る。 1.2:プラズマCVD法、3:光CVD室、4:Wi
送室、5+連絡口、6+M閉パルプ、7:基板、8ニド
レイ、10:搬送レール、U+排気管、26:放電電極
、2B、38 :移動ローラ、37:水銀う第1図
FIG. 1 is a plan sectional view of essential parts of an apparatus according to an embodiment of the present invention, and FIGS. 2 and 3 are sectional views of the apparatus showing the principles of plasma CVD and photoCVD, including reaction diagrams, respectively. , FIGS. 4 and 5 are cross-sectional views taken along the line A-^° of the plasma CVD reaction chamber and photoCVD reaction chamber shown in FIG. 1, respectively. FIG. 6 is a process diagram of two process examples using the apparatus according to the present invention. It is. 1.2: Plasma CVD method, 3: Photo CVD chamber, 4: Wi
Conveying chamber, 5+ communication port, 6+M closed pulp, 7: Substrate, 8 Nidle, 10: Transport rail, U+exhaust pipe, 26: Discharge electrode, 2B, 38: Moving roller, 37: Mercury tube Figure 1

Claims (1)

【特許請求の範囲】[Claims] 1)真空気密室内に閉鎖可能の連絡口を介して互いに連
通するプラズマCVD反応室および光CVD反応室と基
板を各反応室間において任意の方向に移動できる搬送手
段とを備えたことを特徴とする多層薄膜形成装置。
1) A vacuum-tight chamber is equipped with a plasma CVD reaction chamber and a photoCVD reaction chamber that communicate with each other via a closable communication port, and a transfer means that can move the substrate in any direction between the reaction chambers. Multilayer thin film forming equipment.
JP23081384A 1984-11-01 1984-11-01 Multi-layer thin film forming device Pending JPS61110772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23081384A JPS61110772A (en) 1984-11-01 1984-11-01 Multi-layer thin film forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23081384A JPS61110772A (en) 1984-11-01 1984-11-01 Multi-layer thin film forming device

Publications (1)

Publication Number Publication Date
JPS61110772A true JPS61110772A (en) 1986-05-29

Family

ID=16913672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23081384A Pending JPS61110772A (en) 1984-11-01 1984-11-01 Multi-layer thin film forming device

Country Status (1)

Country Link
JP (1) JPS61110772A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4933300A (en) * 1987-02-12 1990-06-12 Hideomi Koinuma Process for forming multilayer thin film
US6520189B1 (en) 1986-09-09 2003-02-18 Semiconductor Energy Laboratory Co., Ltd. CVD apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6520189B1 (en) 1986-09-09 2003-02-18 Semiconductor Energy Laboratory Co., Ltd. CVD apparatus
US4933300A (en) * 1987-02-12 1990-06-12 Hideomi Koinuma Process for forming multilayer thin film

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