JPS61110494A - Manufacture of through hole printed circuit board - Google Patents

Manufacture of through hole printed circuit board

Info

Publication number
JPS61110494A
JPS61110494A JP23206284A JP23206284A JPS61110494A JP S61110494 A JPS61110494 A JP S61110494A JP 23206284 A JP23206284 A JP 23206284A JP 23206284 A JP23206284 A JP 23206284A JP S61110494 A JPS61110494 A JP S61110494A
Authority
JP
Japan
Prior art keywords
solder
board
resist
hole
treated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23206284A
Other languages
Japanese (ja)
Inventor
明渡 晃弘
植田 順治
島本 栄司
雅啓 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP23206284A priority Critical patent/JPS61110494A/en
Publication of JPS61110494A publication Critical patent/JPS61110494A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、スルホールの加工されたプリント配線基板す
なわちスルホール・プリント基板の製造方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board with through-holes, that is, a through-hole printed circuit board.

〔従来技術〕[Prior art]

この種のスルホール・プリント基板の製造方法の一例と
して、第3図(a)に示すように絶縁基板lの表面から
ホール内周面に亘って回i銅箔2を被覆した後、絶縁基
板lの表面の半田被覆不要面域を更にソルダーレジスト
3で被覆し、このレジスト処理済み基板4を半田槽に浸
漬して半田ディップ処理を施し、この後、半田レベラ一
工程に掛けるという手順で行なうものが従来より良く知
られている。
As an example of a method for manufacturing this type of through-hole printed circuit board, as shown in FIG. The surface area that does not need to be covered with solder is further covered with a solder resist 3, and this resist-treated board 4 is immersed in a solder bath to perform a solder dip treatment, and then subjected to a solder leveler step. is better known than before.

上記手順において、半田レベラ一工程では、半田槽より
引き上げられた半田ディップ処理済み基板[第3図(b
)に4′で示す〕に高温のエアーを吹き付け、これによ
り基板ランド上の余剰半田を吹き飛ばす処理を行なって
いる。
In the above procedure, in the first step of the solder leveler, the solder-dipped board [Fig. 3(b)
) and (indicated by 4') are blown with high-temperature air to blow off excess solder on the substrate lands.

ところが、前記従来例の場合、半田レベラ一工程におけ
る余剰半田の吹き飛ばしが不十分で、仕上り半田膜厚が
10μ前後と厚くなるばかりでなく、膜厚が不均一(数
μのばらつきが生じる)となり、基板へのチップ部品の
搭載を困難にするといった問題点を有する。
However, in the case of the conventional example, the excess solder is not sufficiently blown away in the first step of the solder leveler, and not only does the finished solder film thickness become thick, around 10 μm, but also the film thickness becomes uneven (variations of several μm occur). , which has the problem of making it difficult to mount chip components on the board.

又、半田5により第3図(b)に示すようにスルホール
の塞がれた製品が出来易く、そのため組立ての際、スル
ホールヘマウントを子部品のリード線を挿入する等の作
業が滞り、作業能率を低下させる等の不都合を来すこと
になる。
In addition, as shown in Figure 3(b), the solder 5 tends to create a product with the through-holes blocked, which makes it difficult to assemble the mounts and insert the lead wires of the sub-components into the through-holes. This will cause inconveniences such as reduced efficiency.

以上の従来例の外に、半田スルホール法によりスルホー
ル・プリント基板を得る方法も良く知られている。この
方法においては、第4図(a)に示すように回路w4箔
6を絶縁基板7の表面からホール内周面に亘って被覆し
た後、上記回路銅箔6の上にメッキ半田8を被覆するも
のであるため、前記従来例のように半田膜厚が不均一に
なったり、スルホールに半田に起因する穴詰まりが起る
といった不都合を回避することが出来る。
In addition to the conventional examples described above, a method of obtaining a through-hole printed circuit board by the solder through-hole method is also well known. In this method, as shown in FIG. 4(a), the circuit w4 foil 6 is coated from the surface of the insulating substrate 7 to the inner peripheral surface of the hole, and then the plated solder 8 is coated on the circuit copper foil 6. Therefore, it is possible to avoid inconveniences such as non-uniform solder film thickness and clogging of through holes due to solder as in the conventional example.

ところが、この従来例の場合、メッキ半田8の被覆され
た上からソルダーレジスト9が被覆されるので、基板1
0へ部品[第4図(b)には部品のリード線11を示し
ている]を装着する際に行なわれる半田ディップ処理に
おいて、第4図(b)に示すようにメッキ半田8の施さ
れた回路部に沿ってソルダーレジスト9下に溶融半田が
潜り込み、ソルダーレジスト9に浮き、剥離、波打ちな
どが生じるといった不都合を有する。
However, in this conventional example, since the solder resist 9 is coated on top of the plated solder 8, the substrate 1 is coated with the solder resist 9.
In the solder dipping process performed when attaching a component [the lead wire 11 of the component is shown in FIG. 4(b)] to the 0, plating solder 8 is applied as shown in FIG. 4(b). The molten solder sneaks under the solder resist 9 along the circuit parts, causing problems such as floating, peeling, and waving on the solder resist 9.

〔発明の目的〕[Purpose of the invention]

本発明は、従来例に見られる上記問題点を考慮してなさ
れたものであって、仕上り半田の膜厚が薄くかつ均一で
、半田に起因するスルホールの穴詰まりもなく、またソ
ルダーレジストが半田の潜込みにより浮いたり、剥離し
たり波打つといったことのないスルホール・プリント基
板の製造方法の提供を目的とするものである。
The present invention has been made in consideration of the above-mentioned problems seen in the conventional example, and has a thin and uniform finished solder film thickness, no clogging of through-holes caused by solder, and a solder resist that is free from solder. The object of the present invention is to provide a method for manufacturing a through-hole printed circuit board that does not float, peel, or wave due to infiltration.

〔発明の構成〕[Structure of the invention]

本発明のスルホール・プリント基板の製造方法は、銅箔
被覆処理済みの銅スルホール基板を得る銅箔処理工程と
、前記銅スルホール基板の半田被覆不要面域にソルダー
レジストを被覆してレジスト処理基板を得るレジスト処
理工程と、前記レジスト処理基板を半田槽に浸漬して半
田ディップ処理を行なう半田ディップ処理工程と、前記
半田槽から引き上げた半田ディップ処理済み基板に゛高
温、のエアーを吹き付けて基板上の余剰半田を吹き飛ば
す半田レベラー処理工程と、半田レベラー処理済み基板
に同温の液体を吹き付けて基板ランド上およびスルホー
ル内の余剰半田を吹き飛ばすハイドロ・スキージ工程と
を含むことを特徴とするものである。
The method for manufacturing a through-hole printed circuit board of the present invention includes a copper foil processing step for obtaining a copper through-hole board that has been coated with copper foil, and a resist-treated board by covering an area of the copper through-hole board that does not require solder coating with a solder resist. a solder dipping treatment step in which the resist-treated substrate is immersed in a solder bath to perform a solder dip treatment, and a high-temperature air is blown onto the solder-dip-treated substrate pulled out from the solder bath to place the substrate on the substrate. The method is characterized by comprising a solder leveler processing step of blowing away excess solder from the solder leveler-treated board, and a hydro squeegee step of spraying a liquid at the same temperature onto the solder leveler-treated board to blow away excess solder on the board lands and in the through-holes. .

〔実施例] 本発明のスルホール・プリント基板の製造方法の一実施
例を、第1図および第2図に基いて以下に説明する。
[Example] An example of the method for manufacturing a through-hole printed circuit board of the present invention will be described below with reference to FIGS. 1 and 2.

(1)  従来公知の工程により、第1図(a)に示す
ように絶!!基板12の表面12aからホール12bに
亘って回路銅箔13の被覆された銅スルホール基板14
を得る(銅箔処理工程)。
(1) By a conventionally known process, as shown in FIG. ! A copper through-hole board 14 covered with a circuit copper foil 13 from the surface 12a of the board 12 to the holes 12b.
(copper foil treatment process).

(2) 次いで上記銅スルホール基板14の表面の半田
被覆の不要な面域に、第1図(b)に示すようにソルダ
ーレジスト15を被覆してレジスト処理基板16とする
(レジスト処理工程)。
(2) Next, as shown in FIG. 1(b), the area of the surface of the copper through-hole substrate 14 that does not require solder coating is coated with a solder resist 15 to form a resist-treated substrate 16 (resist treatment step).

(3) 上記レジスト処理基板16を、第1図(C)に
示すように半田槽17に浸漬して半田ディップ処理を行
なう(半田ディップ処理工程)。
(3) As shown in FIG. 1C, the resist-treated substrate 16 is immersed in a solder bath 17 to perform a solder dip process (solder dip process).

(4) 上記半田槽17から引き上げた半田ディップ処
理済み基板1Bに対し、第1図(d)に示すように高温
に加熱されたエアー19を吹き付け、基板18上の余剰
の半田20を吹き飛ばす(半田レベラー処理工程)。
(4) As shown in FIG. 1(d), air 19 heated to a high temperature is blown onto the solder-dipped board 1B pulled up from the solder tank 17 to blow away excess solder 20 on the board 18. solder leveler treatment process).

(5)半田レベラー処理済み基板21に対し、第1図(
e)に示すように高温に加熱された液体22を吹き付け
る(ハイドロ・スキージ工程)。
(5) For the solder leveler treated board 21, as shown in Fig. 1 (
As shown in e), a liquid 22 heated to a high temperature is sprayed (hydro squeegee process).

これにより、基板ランド上およびスルホール内に残る余
剰の半田20が溶融して吹き飛ばされ、第1図(f)に
示すように、仕上り半田膜厚が薄く (膜厚1μ弱)か
つ均一なスルホール・プリント基板23に仕上げられる
As a result, the excess solder 20 remaining on the substrate lands and in the through-holes is melted and blown away, and as shown in FIG. A printed circuit board 23 is finished.

また、前記半田レベラー処理を経た時点で、第2図(a
)に示すように基板21のスルホールに半田20による
穴詰まりが生じている場合にも、上記ハイドロ・スキー
ジ工程における高温液体22の吹付けにより、スルホー
ルを詰まらせている半田20が吹き飛ばされるので、第
2図(b)に示すようにスルホールに穴詰まりのないス
ルホール・プリント基板23が得られる。
In addition, at the time of passing through the solder leveler treatment, as shown in FIG.
), even if the through-holes of the board 21 are clogged with solder 20, the solder 20 clogging the through-holes is blown away by the spraying of the high-temperature liquid 22 in the hydro-squeegee process. As shown in FIG. 2(b), a through-hole printed circuit board 23 with no through-hole clogging is obtained.

〔発明の効果〕〔Effect of the invention〕

本発明のスルホール・プリント基板の製造方法は、以上
の構成よりなるから、次に挙げるような優れた諸効果が
得られる。
Since the method for manufacturing a through-hole printed circuit board of the present invention has the above-described configuration, the following excellent effects can be obtained.

(イ) 半田レベラー処理の後も基板ランド上に残る余
剰半田が、ハイドロ・スキージ工程により吹き飛ばされ
るので、仕上がり半田膜厚を非常に薄く、しかも均一に
することが出来、基板へのチップ部品の搭載が容易にな
ると共に、組立作業の能率向上に寄与することが出来る
(b) Excess solder remaining on the board land even after solder leveler processing is blown away by the hydro squeegee process, making it possible to make the finished solder film extremely thin and uniform, making it possible to easily attach chip components to the board. Not only can it be easily installed, but it can also contribute to improving the efficiency of assembly work.

(ロ) 半田レベラー処理済みの時点で、スルホールに
半田による穴詰まりが生じている場合でも、前記ハイド
ロ・スキージ工程によってスルホール内を詰まらせてい
る半田を確実に吹き飛ばすことが出来るので、搭載され
る電子部品などのリード線をスルホールへ挿入出来ない
等の事態の発生を回避でき、基板への部品の搭載を一層
能率良く行なうことが出来る。
(b) Even if the through-holes are clogged with solder after the solder leveler treatment, the solder clogging the through-holes can be reliably blown away by the hydro squeegee process, so the solder can be mounted. It is possible to avoid situations such as not being able to insert lead wires of electronic components into through-holes, and it is possible to more efficiently mount components onto the board.

(ハ) 銅箔被覆処理した半田被覆処理前の銅スルホー
ル基板に対し、その半田被覆不要面域にソルダーレジス
トを被覆するという手順で製造するので、ソルダーレジ
スト下の回路は、この回路を形成する銅箔が直接ソルダ
ーレジストによって被覆されることになり、半田ディッ
プ処理において半田スルホール法により得られる基板の
ようにソルダーレジスト下に半田が潜り込むことがなく
、従ってソルダーレジストの浮き、剥離、波打ちなどの
発生を回避することが出来る。
(c) The copper through-hole board that has been coated with copper foil and has not yet been coated with solder is manufactured by coating solder resist on the surface area that does not require solder coating, so the circuit under the solder resist forms this circuit. Since the copper foil is directly covered with the solder resist, the solder does not get under the solder resist during the solder dip treatment unlike in the case of boards obtained by the solder through-hole method. Occurrence can be avoided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(f)は本発明の一実施例を示す工程説
明図、第2図(a)、  (b)はハイドロ・スキージ
工程によるスルホールの穴詰まり解消作用を示す説明図
、第3図(a)、  (b)は−従来例の問題点を示す
説明図、第4図(a)、  (b)は他の従来例の問題
点を示す説明図である。 12は絶縁基板、13は回路銅箔、14は銅スルホール
基板、15はソルダーレジスト、16はレジスト処理基
板、17は半田槽、18は半田ディップ処理済み基板、
19は高温エアー、2oは半田、21は半田レベラー処
理済み基板、22は高温液体、23はスルホール・プリ
ン1−aE板である。
FIGS. 1(a) to (f) are process explanatory diagrams showing one embodiment of the present invention, FIGS. 2(a) and (b) are explanatory diagrams showing the effect of eliminating clogging of through holes by the hydro squeegee process, FIGS. 3(a) and 3(b) are explanatory views showing the problems of the conventional example, and FIGS. 4(a) and 4(b) are explanatory views showing the problems of another conventional example. 12 is an insulating substrate, 13 is a circuit copper foil, 14 is a copper through-hole substrate, 15 is a solder resist, 16 is a resist-treated substrate, 17 is a solder bath, 18 is a solder dip-treated substrate,
19 is high-temperature air, 2o is solder, 21 is a board treated with a solder leveler, 22 is a high-temperature liquid, and 23 is a through-hole purine 1-aE board.

Claims (1)

【特許請求の範囲】[Claims] 1、銅箔被覆処理済みの銅スルホール基板を得る銅箔処
理工程と、前記銅スルホール基板の半田被覆不要面域に
ソルダーレジストを被覆してレジスト処理基板を得るレ
ジスト処理工程と、前記レジスト処理基板を半田槽に浸
漬して半田ディップ処理を行なう半田ディップ処理工程
と、前記半田槽から引き上げた半田ディップ処理済み基
板に高温のエアーを吹き付けて基板上の余剰半田を吹き
飛ばす半田レベラー処理工程と、半田レベラー処理済み
基板に高温の液体を吹き付けて基板ランド上およびスル
ホール内の余剰半田を溶融し吹き飛ばすハイドロ・スキ
ージ工程とを含むことを特徴とするスルホール・プリン
ト基板の製造方法。
1. A copper foil treatment step for obtaining a copper foil-coated copper through-hole board; a resist treatment step for obtaining a resist-treated board by coating solder resist on the area of the copper through-hole board that does not require solder coating; and the resist-treated board. a solder dip treatment step in which the solder is immersed in a solder bath to perform a solder dip treatment; a solder leveler treatment step in which high temperature air is blown onto the solder dip-treated board pulled up from the solder bath to blow away excess solder on the board; A method for manufacturing a through-hole printed circuit board, comprising a hydro squeegee step of spraying a high-temperature liquid onto a leveler-treated board to melt and blow off excess solder on the board lands and in the through-holes.
JP23206284A 1984-11-02 1984-11-02 Manufacture of through hole printed circuit board Pending JPS61110494A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23206284A JPS61110494A (en) 1984-11-02 1984-11-02 Manufacture of through hole printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23206284A JPS61110494A (en) 1984-11-02 1984-11-02 Manufacture of through hole printed circuit board

Publications (1)

Publication Number Publication Date
JPS61110494A true JPS61110494A (en) 1986-05-28

Family

ID=16933378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23206284A Pending JPS61110494A (en) 1984-11-02 1984-11-02 Manufacture of through hole printed circuit board

Country Status (1)

Country Link
JP (1) JPS61110494A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63503585A (en) * 1986-06-18 1988-12-22 マクダーミッド,インコーポレーテッド Improved methods for printed circuit board manufacturing

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63503585A (en) * 1986-06-18 1988-12-22 マクダーミッド,インコーポレーテッド Improved methods for printed circuit board manufacturing

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