JPS61110427A - Formation of pattern - Google Patents
Formation of patternInfo
- Publication number
- JPS61110427A JPS61110427A JP59230119A JP23011984A JPS61110427A JP S61110427 A JPS61110427 A JP S61110427A JP 59230119 A JP59230119 A JP 59230119A JP 23011984 A JP23011984 A JP 23011984A JP S61110427 A JPS61110427 A JP S61110427A
- Authority
- JP
- Japan
- Prior art keywords
- film
- processed
- pattern
- substrate
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明はX線を用いた微細パターンの形成方法に係り、
特にX線の露光に伴なう被加工基板からの二次電子を低
減することにより高精度なパターン形成を行なう方法に
関する。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method of forming a fine pattern using X-rays,
In particular, the present invention relates to a method of forming highly accurate patterns by reducing secondary electrons from a substrate to be processed due to X-ray exposure.
放射線リングラフィ内、特にXaリソグラフィにおいて
、X線マスクの吸収体から発生する二次電子が広がって
レジストに作用し、レジストパタ−ンの寸法精度を低下
せしめることは知られており、その対策法の一例はJa
pan J、of Appl、Phys。It is known that in radiation lithography, especially in Xa lithography, secondary electrons generated from the absorber of the X-ray mask spread and act on the resist, reducing the dimensional accuracy of the resist pattern. An example is Ja
pan J, of Appl, Phys.
Vol、20(1981)P、L20−24に記載され
ている。Vol. 20 (1981) P, L20-24.
しかしながら、XjIA露光に伴なう被加工基板からの
二次電子の影響についての報告は見当らなかった。However, no report has been found regarding the influence of secondary electrons from the substrate to be processed due to XjIA exposure.
本発明の目的は、放射線リソグラフィにおける高精度レ
ジストパターン形成方法を提供することにある。An object of the present invention is to provide a highly accurate resist pattern forming method in radiation lithography.
発明者は、放射線リソグラフィにおいて半導体基板上に
設けられた金(Au)、タングステン(W)等の重金属
のような二次電子を発生しゃすい物質の膜(被加工膜)
を加工する場合、これら重金属等の物質tこ放射線が照
射されることによって発生する二次電子が拡がってレジ
スト膜を照射してレジストパターンの精度を低下させる
ことを見出した。さらにその二次電子がレジスト膜に侵
入するη
深さく脱出深さ)は最大1 、000人であるこべがわ
かった。In radiation lithography, the inventor developed a film (workpiece film) of a substance that easily generates secondary electrons, such as heavy metals such as gold (Au) and tungsten (W), which is provided on a semiconductor substrate.
It has been found that when processing materials such as heavy metals, secondary electrons generated by irradiation with radiation spread and irradiate the resist film, reducing the precision of the resist pattern. Furthermore, it was found that the maximum penetration depth of the secondary electrons into the resist film (η (escape depth)) was 1,000.
続いてこの対策を検討し、このような基板の上に被加工
膜を有する被加工基板の上に、被加工膜に較べて放射線
露光に伴なう二次電子放出量の少ない物質、云い換えれ
ば被加工膜を構成する元素より原子番号が小さい元素で
構成される物質の薄膜(以下保護膜という)を設けてか
らレジスト膜を設ける方法を発明した。この保1119
の膜厚は材質によって若干具なるが最大1 、000人
で、!&小は成膜技術の限界である50人程度でも効果
があることがわかった。しかし、成膜技術の向上によっ
てはこれ以下の膜厚でも本発明が適用できることが容易
に推察できる。Next, we considered this countermeasure and added a material, in other words, a material that emits less secondary electrons when exposed to radiation than the film to be processed, on a workpiece substrate that has a film to be processed on such a substrate. For example, we have invented a method of forming a resist film after forming a thin film of a substance (hereinafter referred to as a protective film) composed of an element with a lower atomic number than the elements constituting the film to be processed. Konoho 1119
The film thickness varies slightly depending on the material, but the maximum is 1,000 people. It was found that &Small was effective even with about 50 people, which is the limit of film-forming technology. However, it can be easily inferred that the present invention can be applied to a film having a thickness smaller than this depending on improvements in film forming technology.
また、元素から二次電子を放出せしめる放射線の主なも
のはXmおよび紫外線であり、リングラフィによく用い
られる放射線もX線および紫外線であな−ごとば−る。Furthermore, the main types of radiation that cause secondary electrons to be emitted from elements are X-rays and ultraviolet rays, and the radiation that is often used in phosphorography is also X-rays and ultraviolet rays.
以下、本発明の詳細な説明する。 The present invention will be explained in detail below.
実施例1 第1図を用いて説明する。Example 1 This will be explained using FIG.
まず、被加工基板10として、シリコンウェハ1の上に
膜厚0.2 μmのW膜(被加工膜)2を設けたもの
を準備した。その上に保護膜として多結晶シリコン膜3
をCVD法により形成した。このCVD反応は反応ガス
にモノシラン(S i H,)を用い、基板温度を60
0℃にして行なった。膜厚は200人である1次に多結
晶シリコン膜3の上にX線レジストとしてNPR(日立
化成製)を用いて、膜厚1μmのXaレジスト膜4を被
着し、80℃にて10分間のベーキングを行なった。続
いてX線マスク5を介してX線6でX線しジス1−膜4
を露光する。X線6はM。、α線で、露光量は100m
J/aJである。First, a substrate 10 to be processed was prepared in which a W film (film to be processed) 2 having a thickness of 0.2 μm was provided on a silicon wafer 1 . On top of that is a polycrystalline silicon film 3 as a protective film.
was formed by CVD method. This CVD reaction uses monosilane (S i H,) as a reaction gas and the substrate temperature is 60°C.
The temperature was 0°C. A Xa resist film 4 with a thickness of 1 μm was deposited on the primary polycrystalline silicon film 3 with a film thickness of 200 μm using NPR (manufactured by Hitachi Chemical) as an X-ray resist. Baking was performed for 1 minute. Next, X-rays 6 are applied to the film 1 through the X-ray mask 5.
to expose. X-ray 6 is M. , alpha rays, exposure amount is 100m
J/aJ.
次に現像液NMD−3(東京応化製)を用いて3分間の
現像処理を行なってレジストパターン4′を形成し、そ
の後80℃にて20分間のボストベーキングを行なった
。続いてこのレジストパターン4′をマスクにして六フ
ッ化硫黄(SF、)を用いた反応性イオンエツチングに
より保諾膜およびW膜をエッチした。SF、のガス圧は
20Paでエツチング時間は2分間である1次に残存し
たレジスト膜を除去してパターンの形成を完了した。Next, a developing process was performed for 3 minutes using developer NMD-3 (manufactured by Tokyo Ohka) to form a resist pattern 4', and then post baking was performed at 80° C. for 20 minutes. Subsequently, using this resist pattern 4' as a mask, the protective film and W film were etched by reactive ion etching using sulfur hexafluoride (SF). The SF gas pressure was 20 Pa and the etching time was 2 minutes.The remaining resist film was removed after the first step, and the pattern formation was completed.
この結果0.3 μmのパターンをW膜に形成するこ
とができた。なお保護膜を用いない場合は0.5μmの
パターンの形成が限度であった。As a result, a 0.3 μm pattern could be formed on the W film. In addition, when a protective film was not used, the formation of a pattern of 0.5 μm was the limit.
このエツチングにおいて、ポリシリコンIPJ3のエツ
チング速度はwgのエツチング速度の約6倍であるので
、保護膜を導入したことによるエツチング時間の増加は
ほとんど実施上の問題とならない。In this etching, since the etching rate of polysilicon IPJ3 is about six times the etching rate of wg, the increase in etching time due to the introduction of the protective film hardly poses a practical problem.
また残存した保護膜は必要に応じて除去してもしなくて
もよい。Further, the remaining protective film may or may not be removed as necessary.
本発明において、被加工基板が半導体基土の全面に被加
工膜が形成されている必要はなく、また被加工膜が2層
以上存在する場合でも本発明を適用できたことは云うま
でもない、また保護膜も必ずしも一層である必要はなく
、2層以上で形成してもよく、かつ層間に保護膜の働き
をしない膜を設けても本発明を実施できた。In the present invention, it is not necessary for the substrate to be processed to have a film to be processed formed on the entire surface of the semiconductor base, and it goes without saying that the present invention can be applied even when there are two or more layers of films to be processed. Further, the protective film does not necessarily have to be one layer, but may be formed of two or more layers, and the present invention could be carried out even if a film that does not function as a protective film is provided between the layers.
本実施例では、保護膜の材料としてポリシリコンを用い
たが、S i O,、S ilN、やその他原子番号の
小さい元素またはそれらからなる化合物。In this embodiment, polysilicon was used as the material for the protective film, but SiO, SilN, and other elements with small atomic numbers or compounds made of these may also be used.
もしくは各種の有機物が用いられることは云うまでもな
い。It goes without saying that various organic substances can also be used.
実施例2
被加工基板に実施例1と同様にして保護膜を設け、その
上にホトレジスト(Δzt3so、I:ヘキスト社製)
を膜厚が0.7 μmになるように塗布した。Example 2 A protective film was provided on the substrate to be processed in the same manner as in Example 1, and a photoresist (Δzt3so, I: manufactured by Hoechst) was applied thereon.
was applied to a film thickness of 0.7 μm.
次に超高圧水銀灯を用いて45IIIJ/aJの露光を
行ってパターンを形成した。保護膜を設けない場合には
2μm以下のパターンは形成できなかったが保護膜を設
けた場合には1.5 μmのパターンが形成できた。Next, a pattern was formed by performing exposure of 45IIIJ/aJ using an ultra-high pressure mercury lamp. When no protective film was provided, a pattern of 2 μm or less could not be formed, but when a protective film was provided, a 1.5 μm pattern could be formed.
本発明によれば、x、wtn先に伴なう被加工基板から
放出される二次電子のx纏しジスト膜におよぼす影響を
低減できるのでパターン形成の精度を向上させる効果が
ある。According to the present invention, it is possible to reduce the influence of secondary electrons emitted from the substrate to be processed along with the x and wtn tips on the resist film surrounding the x, thereby improving the accuracy of pattern formation.
第1図は実施例1を説明する図である。
1・・・シリコンウェハ、2・・・タングステン(被加
工葛 1FIG. 1 is a diagram illustrating the first embodiment. 1... Silicon wafer, 2... Tungsten (workpiece) 1
Claims (1)
のパターンを形成するパターン形成方法において、前記
被加工基板上に、放射線露光に伴なつて前記被加工基板
から発生する2次電子の強度を低減する保護膜を設けて
からレジスト膜を設けることを特徴とするパターン形成
方法。 2、上記放射線をX線とすることを特徴とする特許請求
の範囲第1項記載のパターン形成方法。 3、上記放射線を紫外線とすることを特徴とする特許請
求の範囲第1項記載のパターン形成方法。 4、上記保護膜が、上記被加工基板上に被加工膜を構成
する元素より小さい原子番号の元素から構成されること
を特徴とする特許請求の範囲第1項記載のパターン形成
方法。 5、上記保護膜が、上記被加工膜の表面を酸化したもの
であることを特徴とする特許請求の範囲第4項記載のパ
ターン形成方法。 6、上記保護膜を多結晶シリコンで形成することを特徴
とする特許請求の範囲第1項記載のパターン形成方法。 7、上記保護膜の膜厚が1,000Å以下であることを
特徴とする特許請求の範囲第1項から第4項のいずれか
に記載のパターン形成方法。 8、上記保護膜が1層もしくは2層以上で構成されてい
ることを特徴とする特許請求の範囲第1項もしくは第4
項から第7項のいずれかに記載のパターン形成方法。[Scope of Claims] 1. In a pattern forming method in which a resist pattern is formed on a substrate to be processed by radiation lithography, secondary electrons generated from the substrate to be processed due to radiation exposure are placed on the substrate to be processed. A pattern forming method characterized in that a resist film is provided after a protective film is provided to reduce the strength of the pattern. 2. The pattern forming method according to claim 1, wherein the radiation is an X-ray. 3. The pattern forming method according to claim 1, wherein the radiation is ultraviolet rays. 4. The pattern forming method according to claim 1, wherein the protective film is composed of an element having an atomic number smaller than an element constituting the film to be processed on the substrate to be processed. 5. The pattern forming method according to claim 4, wherein the protective film is obtained by oxidizing the surface of the film to be processed. 6. The pattern forming method according to claim 1, wherein the protective film is formed of polycrystalline silicon. 7. The pattern forming method according to any one of claims 1 to 4, wherein the protective film has a thickness of 1,000 Å or less. 8. Claim 1 or 4, characterized in that the protective film is composed of one layer or two or more layers.
8. The pattern forming method according to any one of Items 7 to 7.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59230119A JPS61110427A (en) | 1984-11-02 | 1984-11-02 | Formation of pattern |
US07/309,026 US4981771A (en) | 1984-11-02 | 1989-02-07 | Pattern fabricating method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59230119A JPS61110427A (en) | 1984-11-02 | 1984-11-02 | Formation of pattern |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61110427A true JPS61110427A (en) | 1986-05-28 |
Family
ID=16902864
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59230119A Pending JPS61110427A (en) | 1984-11-02 | 1984-11-02 | Formation of pattern |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61110427A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007069742A (en) * | 2005-09-07 | 2007-03-22 | Yamashita Rubber Co Ltd | Torque rod |
JP2007261529A (en) * | 2006-03-29 | 2007-10-11 | Fuji Heavy Ind Ltd | Power unit support bracket and power unit support structure using the same |
JP2007302084A (en) * | 2006-05-10 | 2007-11-22 | Hosei Brake Ind Ltd | Torque rod |
-
1984
- 1984-11-02 JP JP59230119A patent/JPS61110427A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007069742A (en) * | 2005-09-07 | 2007-03-22 | Yamashita Rubber Co Ltd | Torque rod |
JP2007261529A (en) * | 2006-03-29 | 2007-10-11 | Fuji Heavy Ind Ltd | Power unit support bracket and power unit support structure using the same |
JP2007302084A (en) * | 2006-05-10 | 2007-11-22 | Hosei Brake Ind Ltd | Torque rod |
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