JPS61110278A - Binary coding method of video signal - Google Patents

Abstract

PURPOSE:To narrow down an effective visual field by holding a value extracted right before a video level drops below a reference value only when the video level falls below the reference value and converting the video signal which is delayed by a specific time into a binary signal on the basis of the held signal. CONSTITUTION:The video signal S1 inputted from a camera is delayed by the specific time tau through a delay circuit 12 and applied to the uninverted input terminal of a comparator 9. The video signal S1, on the other hand, is integrated by an integration circuit 11 having a small time constant and inputted to a sample holding circuit 13. Further, the video signal S1 is inputted to the uninverted input terminal of a comparator 14 as well and the reference level Sr obtained by dividing the voltage of the output signal S4 of the sample holding circuit 13 through a variable resistance VR2 is inputted to the inverted input terminal. The sample holding circuit 13 enters a holding state only when the video level of the video signal S1 falls abruptly unit S1<=Sr, and outputs its hold signal S4, but outputs an integration signal which varies according to the video signal S1 as its output signal S4 when not, i.e. S1>Sr.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a binarization method for binarizing a video signal from a camera.

[Conventional technology]

These days, when performing visual inspections of workpieces, a video camera is used instead of human vision to image the workpiece, and the resulting video signal is digitally processed to enable visual inspection of the workpiece within the camera's field of view. The size and number of scratches, dirt, etc. on the contained workpieces are identified in each location.

An example of such a visual recognition device will be described with reference to FIGS. 4 to 8. First, a line sensor camera (hereinafter simply referred to as a camera) 1 captures an image of a workpiece 2 illuminated by illumination (not shown) as indicated by a broken line. Range (imaging field of view)
When scanning 3.

For example, if there is a scratch 4 that creates a shadow within the imaging range 3, the camera 1 will only detect the image level (signal level) of the pixel corresponding to the scratch 4, as shown in FIG. 5, depending on its size and shape. Accordingly, a video signal S1 that has suddenly dropped is output.

In the visual recognition device 5 that receives this video signal S1, the binarization circuit 6 compares the video level of the video signal S1 with a predetermined threshold level (binarization level), and the video level is determined to be the threshold level. 1 if higher
"Conversely, if the video level is lower than the threshold level, it is converted to a 0" logic signal (binarized video signal), and the logic signal S which is the inverted logic signal is converted.
2 is processed by the next-stage recognition logic 7, the size and position of the scratch 4, or the number of scratches 4 if there are multiple scratches 4, etc. are recognized, and the recognition result is outputted to the outside as a signal S3. .

Here, conventional examples of the binarization circuit 6 include a fixed threshold type (fixed binarization type) and a threshold integral type (floating binarization type).

In the case of the fixed threshold type, as shown in FIG. 6, the video signal S1 coming from the camera 1 connected to the connector 8 is input to the non-inverting input terminal of the comparator S via the terminating resistor R1.

A required fixed threshold level Src is applied to the inverting input terminal of the comparator 9.
Further, its output side is connected to a DC type g+sv via a pull-up resistor R2.

Therefore, the video signal S1 is at the threshold level S
It is compared with rc and converted into a logic signal that becomes 0'' only during the period when the video level of the video signal S rapidly drops, and the converted logic signal is inverted by the inverter 10 and sent to the next stage recognition logic 7 as a logic signal. It is output as S2.

The threshold level Src in this case is formed by dividing the voltage of the DC power supply E using a variable resistor VR, and is used by adjusting it according to the video level of the video signal S1, and its waveform is shown in FIG. As shown, it is a constant voltage and has a fixed threshold waveform.

On the other hand, in the case of the threshold integral type, as shown in FIG. 7, the difference from the fixed threshold type shown in FIG. 11, everything else is the same, and of course the operation of the comparator S is also the same.

The integrator circuit 11 is an integrator circuit with a relatively small time constant consisting of, for example, a resistor R3 and a capacitor C. This output voltage is divided (level adjusted) by a variable resistor VR to set the threshold level Sr of the comparator S. used as

In this case, the waveform of the threshold level Sr■ changes in signal level following the video signal S1 as shown in FIG.

[Problem that the invention seeks to solve]

However, in such a conventional binarization circuit, the threshold level of the comparator S is fixed or integral (floating), and therefore there are the following problems.

In other words, the illuminance within the field of view is not constant.

When the peripheral light intensity of the lens, which is the optical system of camera 1, decreases significantly, parabolic shedding occurs in the video signal S1 as shown in Figure 8. ES1. ES2
There is a problem that the shooting range 3 of the camera 1 is narrower than the shooting range 3 of the camera 1.

Additionally, in the case of a fixed type, there is a risk of false detection when the illuminance within the field of view changes, while in the case of an integral type.

If the scratch 4 to be detected is large, the video signal S1 will change greatly and the threshold level Sr will also change accordingly, but such a large change will make it difficult to correctly recognize the size of the scratch 4. There was a problem that not only was it impossible to do this, but the detection became unstable in general.

This invention attempts to solve such problems.

[Means for Solving the Problems] Therefore, the video signal binarization method according to the present invention delays the video signal output from the camera for a predetermined time, integrates the video signal, and converts the integrated signal or the corresponding signal. At the same time, the reference level based on the sequentially extracted signal is compared with the video level of the video signal or the video signal delayed for a predetermined time, and only when the video level becomes below the reference level. , holds the signal extracted immediately before that, and binarizes the video signal delayed for a predetermined time based on the signal level of the signal thus extracted or held.

[For production]

According to this method, while taking advantage of the advantages of a fixed threshold type that can perform stable detection and the advantages of a threshold integral type that is resistant to changes in illuminance, it is possible to reduce the effective field of view due to parabolic shading etc. can be prevented.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to FIGS. 1 to 3 of the accompanying drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and parts corresponding to those in FIGS. 6 and 7 are given the same reference numerals.

This embodiment is used as a binarization circuit 6 constituting a visual recognition device 5 shown in FIG.

A delay circuit 12 is inserted between the connector 8 and the non-inverting input terminal of the comparator S, and a sample bold circuit 13 and a comparator 14. This is the same as the conventional Threshold integral equation shown in FIG. 7, except that the O1l path 15 and its peripheral circuit consisting of a variable resistor vR2 are inserted.

The video signal sl input from the camera 1 via the connector 8 and the terminating resistor R is delayed by a predetermined time τ by the delay circuit 12 to become a delayed video signal 81', and is added to the non-inverting input terminal of the comparator S. It will be done.

The delay circuit 12 is composed of 5, for example, a delay line as shown in the figure, an ultrasonic delay element, a CCD, a surface acoustic wave element, etc.
The delay time is determined to compensate for the delay caused by the integration circuit 11 with respect to the threshold level video signal s1.

On the other hand, the video signal Sl is integrated by an integrating circuit 11 with a small time constant made up of a resistor R3 and a capacitor C, and the integrated signal is input to a sample and hold circuit 13.

Furthermore, the video signal Sl is also input to the non-inverting input terminal of the comparator 14, and the reference level formed by dividing the output signal S4 of the sample-and-hold circuit 1!1 by the variable resistor vR2 is input to the inverting input terminal of the comparator 14. Sr is input.

Note that the variable resistor vR2 has a threshold level Srx
It is connected in parallel with @Sigetsu's variable resistor VR, and is used to adjust the hold control of the sample and hold circuit 13. 6 The sample and hold circuit 13 enters the sample (extraction) state when the S/H terminal is l". At the same time, the S/H terminal becomes 0”
The hold state is reached when
horizontal synchronization signal) BKL.

First, when the signal level of the video signal Sl becomes equal to or lower than the reference level Sr (S1≦Sr) formed by dividing the output signal S4 of the sample and hold circuit 13 with a variable resistor VR2, the output of the comparator 14 becomes 11. However, by inputting this output to the S/H terminal of the sample and hold circuit 13 via the OR circuit IS, its operating state is switched from the sample state to the hold state.

That is, the sample hold circuit 13 receives the video signal S1
Only when the video level suddenly drops and S1≦Sr, a hold state is entered, and the integral signal sampled just before is held.
The hold signal is output as the output signal S4, and when S+>Sr otherwise, the integral signal that changes according to the video signal S1 is output as is as the output signal S4.

Further, a blanking signal BLK as shown in FIG. 2 is output from the camera 1, and this signal BLK is sent to the OR circuit 15.
Each time a signal is input to the S/H terminal of the sample hold circuit 13 via the , the sample hold circuit 13 enters a sample (extraction) state.

As a result, even if 81≦S is satisfied just before the end of the scan and one scan ends while the integral signal is held, sampling can be started from around waov when starting the second scan.

Therefore, the output signal S4 of the sample and hold circuit 13 that operates in this manner has the property of an integral signal that follows the video signal S1, but is not affected by large fluctuations in the video signal S1 caused by large scratches, etc. If the delayed video signal S!' is binarized by the comparator S using the threshold level Srx formed by dividing this output (:I?y S4 by the variable resistor VR, It is possible to perform binarization processing that takes advantage of the advantages of the fixed threshold method, which allows stable detection while also taking advantage of the strong threshold integral method.

Further, the effects of using the delayed video signal 81' obtained by delaying the video signal S1 by a predetermined time are as follows.

That is, from the waveform of the threshold level Srx, for example, as shown in FIG. The threshold level Sr before termination is the video signal S
Since S+<Srx for a video level of 1, the effective field of view becomes narrow if left as is.

However, if you use the delayed video obtained by delaying the video signal S1 by a predetermined time (No. 81'), there is a possibility that the delayed video exceeds the threshold level Srx. Even if shading occurs, it only occurs for a short time at the start, and the effective field of view ES is almost the same as the imaging range (scanning range) of the camera 1.

In the above embodiment, a signal corresponding to the integral signal obtained by dividing the integral signal into a required value by a variable resistor may be input to the sample and hold circuit 1'5.

In that case, the variable resistor vR2 can be omitted and the signal S
4 may be input directly to the inverting input terminal of the comparator 14. However, in that case, it is of course necessary to change the level adjustment by the variable resistor VR, and depending on the situation, the variable resistor VR may be changed. For short, the output signal S
4 can be used as Srx as is.

Further, in the above embodiment, the case where the video signal S1 from the line sensor camera 1 is binarized is described, but the present invention is applicable to the binarization of the video signal from an area sensor camera.

Of course, it can also be applied.

Furthermore, in the above embodiment, the video signal S1 is compared with the reference level S' by the comparator 14, but when the delayed video signal S,l is compared with the reference level Sr, The S/H of the sample hold circuit 15 may be switched based on the comparison result.

(Effect of invention As explained above, according to the present invention.

While delaying the video signal output from the camera for a predetermined time, integrating the video signal and sequentially extracting the integrated signal or a signal corresponding thereto, the reference level and the video signal or a predetermined signal based on the sequentially extracted signal are Compare the video level of the time-delayed video signal, and only when the video level falls below the reference level, retain the signal extracted immediately before, and set the signal level of the signal extracted or retained in this way. Since the video signal delayed for a predetermined time is binarized based on the following, the following effects are achieved.

(1) Even when detecting scratches or the like in an area where the illuminance or amount of light within the field of view is not constant, the effective field of view does not become narrow.

(2) No malfunctions even if the illuminance changes.

(3) Even if there are large scratches, stable binarization can be performed without being affected by them.

Therefore, by using a visual recognition device equipped with a binarization circuit to which this method is applied, it is possible to always accurately recognize the size, nine positions, and one number of scratches and dirt on a workpiece.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention. Figure 2 is a waveform diagram showing the blanking signal, and Figure 5 is a waveform diagram showing the blanking signal.
FIG. 4 is a block diagram showing a configuration example of a visual recognition device. FIG. 5 is a waveform diagram showing an example of the video signal S1 in FIG. 4. Fig. 6 is a circuit diagram showing a conventional example of a fixed threshold type binarization circuit, Fig. 7 is a circuit diagram showing a conventional example of a threshold integral type binarization circuit, and Fig. 8 is a conventional example. FIG. 2 is a waveform diagram for explaining the problem. 1...Line sensor camera 2...Work 3...
Shooting range 4... Scratch 5... Visual recognition device 6... Binarization circuit S, 14... Comparator 11... Integrating circuit 12... Delay circuit 13
...Sample hold circuit Figure 1 Figure 2 Figure 4 Hea scanning time ← 1-1 Figure 6 Figure 8 Procedure correction? (Self-restraint July 11, 1985, Director General of the Patent Office, Mr. Ka Michibe 1, Indication of the case, Patent Application No. 59-230319, 2, Name of the invention, Method for binarizing video signals 3, Person making the amendment. Related Patent Applicant: 2-2 Takaracho, Kanayō-ku, Yokohama-shi, Kanagawa Prefecture (399) Nissan Motor Co., Ltd. 4, Agent: 5-5, 1-20 Higashiikebukuro, Toshima-ku, Tokyo, Subject of amendment 6, Contents of amendment (1) Specification Correct ``something'' in page 5, line 10 to r or j. (2) Correct ``to rise but'' in page 9, line 15 of the same book to 1 to 1 to fall.

Claims (1)

[Claims] 1 While delaying the video signal output from the camera for a predetermined time, integrating the video signal and sequentially extracting the integrated signal or a signal corresponding to the integrated signal, and setting a reference level based on the sequentially extracted signal. and the video level of the video signal or the video signal delayed for the predetermined time, and only when the video level becomes equal to or lower than the reference level, the signal extracted immediately before is held and the video signal is extracted for the predetermined time. A method for binarizing a video signal, characterized in that the delayed video signal is binarized based on the signal level of the extracted or retained signal.