JPS61110187U - - Google Patents
Info
- Publication number
- JPS61110187U JPS61110187U JP20101484U JP20101484U JPS61110187U JP S61110187 U JPS61110187 U JP S61110187U JP 20101484 U JP20101484 U JP 20101484U JP 20101484 U JP20101484 U JP 20101484U JP S61110187 U JPS61110187 U JP S61110187U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- doppler frequency
- amplitude
- absolute value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000605 extraction Methods 0.000 claims description 2
- 101100536354 Drosophila melanogaster tant gene Proteins 0.000 claims 1
- 230000001629 suppression Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Radar Systems Or Details Thereof (AREA)
Description
第１図は高周波パルス信号を空間へ送信し、そ
の反射信号を受信するパルスレーダー装置におけ
る本件考案のレーダー受信装置の構成を示すブロ
ツク図、第２図は本件考案のレーダー受信装置の
各処理段階における信号波形図で、図ａは各ドツ
プラ周波数成分の出力信号波形図、図ｂは図ａの
信号を対数ＣＦＡＲ処理した出力信号波形図、図
ｃは図ｂの信号に対し消え残り振幅の一定化処理
を行つた出力信号波形図、図ｄは図ｃの信号から
最大値選択を行つた後の信号波形図、第３図は従
来のレーダー受信装置の各処理段階における信号
波形図で、図ａは各ドツプラ周波数成分の出力信
号波形図、図ｂは図ａの信号を対数ＣＦＡＲ処理
した出力信号波形図、図ｃは図ｂの信号を合成し
た後の出力信号波形図である。
３０１……アンテナ、３０２……送受信切り替
え回路、３０３……送信パルス発生回路、３０４
……周波数混合回路、３０５……基準信号発生回
路、３０６……同相成分同期検波回路、３０７…
…直交成分同期検波回路、３０８……ドツプラ周
波数抽出回路、３０９……絶対値算出回路、３１
０……対数ＣＦＡＲ処理回路、３１１……不要信
号消え残り振幅計測回路、３１２……振幅制御回
路、３１３……信号選択回路、Ｔ……目標信号。
Figure 1 is a block diagram showing the configuration of the radar receiving device of the present invention in a pulse radar device that transmits a high-frequency pulse signal into space and receives its reflected signal, and Figure 2 shows each processing stage of the radar receiving device of the present invention. Figure a is an output signal waveform diagram of each Doppler frequency component, Figure b is an output signal waveform diagram obtained by logarithmic CFAR processing of the signal in Figure A, and Figure c is a signal waveform diagram of the signal in Figure B with a constant residual amplitude. Fig. 3 is a signal waveform diagram after the maximum value selection is performed from the signal in Fig. Figure a is an output signal waveform diagram of each Doppler frequency component, Figure b is an output signal waveform diagram obtained by logarithmic CFAR processing of the signal in Figure A, and Figure c is an output signal waveform diagram after combining the signals in Figure b. 301...Antenna, 302...Transmission/reception switching circuit, 303...Transmission pulse generation circuit, 304
...Frequency mixing circuit, 305...Reference signal generation circuit, 306...In-phase component synchronous detection circuit, 307...
... Quadrature component synchronous detection circuit, 308 ... Doppler frequency extraction circuit, 309 ... Absolute value calculation circuit, 31
0... Logarithmic CFAR processing circuit, 311... Unwanted signal remaining amplitude measurement circuit, 312... Amplitude control circuit, 313... Signal selection circuit, T... Target signal.
Claims (1)
を受信するパルスレーダー装置において、同一距
離に係る方位方向の受信信号から予め定められた
複数のドツプラ周波数成分ごとに区分して複素信
号を出力する複数のドツプラ周波数抽出回路と、
前記ドツプラ周波数成分ごとの複素信号の絶対値
を算出する複数の絶対値算出回路と、前記絶対値
算出回路の出力に対して目標信号以外の不要信号
の抑圧処理を行う複数の対数ＣＦＡＲ（Ｃｏｎｓ
ｔａｎｔ Ｆａｌｓｅ Ａｌａｒｍ Ｒａｔｅ）
処理回路と、前記対数ＣＦＡＲ処理回路出力の不
要信号の消え残り振幅を計測する複数の不要信号
消え残り振幅計測回路と、該不要信号消え残り振
幅計測回路の出力により前記各対数ＣＦＡＲ処理
回路出力の信号振幅の制御を行う振幅制御回路と
、前記ドツプラ周波数成分毎に対応した前記各振
幅制御回路の出力を相互に比較して最大値を選択
し出力する信号選択回路とから成ることを特徴と
するレーダー受信装置。 In a pulse radar device that transmits a high-frequency pulse signal into space and receives its reflected signal, a plurality of pulse radar devices that output complex signals are divided into predetermined Doppler frequency components from received signals in the azimuth direction related to the same distance. Doppler frequency extraction circuit,
a plurality of absolute value calculation circuits that calculate the absolute value of the complex signal for each of the Doppler frequency components; and a plurality of logarithmic CFARs (Cons) that perform suppression processing of unnecessary signals other than the target signal on the output of the absolute value calculation circuit.
tant False Alarm Rate)
a processing circuit, a plurality of unnecessary signal remaining amplitude measuring circuits that measure the remaining amplitude of unnecessary signals output from the logarithmic CFAR processing circuit; It is characterized by comprising an amplitude control circuit that controls the signal amplitude, and a signal selection circuit that compares the outputs of the amplitude control circuits corresponding to each of the Doppler frequency components, selects and outputs the maximum value. Radar receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984201014U JPH045033Y2 (en) | 1984-12-25 | 1984-12-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984201014U JPH045033Y2 (en) | 1984-12-25 | 1984-12-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61110187U true JPS61110187U (en) | 1986-07-12 |
| JPH045033Y2 JPH045033Y2 (en) | 1992-02-13 |
Family
ID=30762407
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984201014U Expired JPH045033Y2 (en) | 1984-12-25 | 1984-12-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH045033Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011043291A1 (en) * | 2009-10-09 | 2011-04-14 | 日本電気株式会社 | Radar device, target detecting method, and program |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4137532A (en) * | 1977-04-29 | 1979-01-30 | Westinghouse Electric Corp. | VIP doppler filter bank signal processor for pulse doppler radar |
| JPS5533655A (en) * | 1978-08-31 | 1980-03-08 | Nec Corp | Target detector |
| JPS5831876A (en) * | 1981-08-21 | 1983-02-24 | 株式会社日立製作所 | Operating device for elevator |
-
1984
- 1984-12-25 JP JP1984201014U patent/JPH045033Y2/ja not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4137532A (en) * | 1977-04-29 | 1979-01-30 | Westinghouse Electric Corp. | VIP doppler filter bank signal processor for pulse doppler radar |
| JPS5533655A (en) * | 1978-08-31 | 1980-03-08 | Nec Corp | Target detector |
| JPS5831876A (en) * | 1981-08-21 | 1983-02-24 | 株式会社日立製作所 | Operating device for elevator |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011043291A1 (en) * | 2009-10-09 | 2011-04-14 | 日本電気株式会社 | Radar device, target detecting method, and program |
| JP2011080961A (en) * | 2009-10-09 | 2011-04-21 | Nec Corp | Radar device, target detection method, and program |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH045033Y2 (en) | 1992-02-13 |
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