JPS62124578U - - Google Patents

Info

Publication number
JPS62124578U
JPS62124578U JP1270986U JP1270986U JPS62124578U JP S62124578 U JPS62124578 U JP S62124578U JP 1270986 U JP1270986 U JP 1270986U JP 1270986 U JP1270986 U JP 1270986U JP S62124578 U JPS62124578 U JP S62124578U
Authority
JP
Japan
Prior art keywords
gate
tracking
circuit
waves
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1270986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1270986U priority Critical patent/JPS62124578U/ja
Publication of JPS62124578U publication Critical patent/JPS62124578U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す構成図、第
2図はゲート作成回路、切替回路、ジヤミング検
出回路とゲート位置設定回路の一実施例を示す構
成図、第3図は従来及び捜索モード時のジヤミン
グ検出ゲートのタイムチヤート、第4図は追尾モ
ード時のジヤミング検出ゲートのタイムチヤート
、第5図は従来のレーダ装置の構成図である。 図において1はアンテナ、2は送信機部、3は
TR部、4はミキサ、5はローカル信号発生部、
6は受信機部、7は信号処理部、8はジヤミング
表示部、9はゲート作成回路、10は切替回路、
11はジヤミング検出回路、12はゲート位置設
定回路、13は受信ビデオ入力、14A〜14D
はバツフアアンプ、15はゲート回路、16はス
トレツチ回路、17は比較回路、18は基準電圧
、19はジヤミング検出出力、20は追尾か否か
を知らせるステータス信号、21は送信プリトリ
ガ、22は捕捉(前)ゲート、23はインバータ
、24A〜24Bはアンド回路、25A〜25F
はモノステーブルマルチバイブレータ、26はオ
ア回路、27はセレクタ回路、28は捜索モード
時のジヤミング検出ゲート信号、29は追尾モー
ド時のジヤミング検出ゲート信号、30A〜30
Bはゲート位置設定用可変抵抗器、31は送信ト
リガ、32はRゲート、33は追尾目標、34は
追尾ゲート(前)、35は追尾ゲート(後)、3
6は捕捉(後)ゲートである。なお、図中同一或
いは相当部分には同一符号を付してある。
Fig. 1 is a block diagram showing an embodiment of this invention, Fig. 2 is a block diagram showing an embodiment of a gate creation circuit, a switching circuit, a jamming detection circuit, and a gate position setting circuit. FIG. 4 is a time chart of the jamming detection gate in the tracking mode. FIG. 5 is a configuration diagram of a conventional radar device. In the figure, 1 is an antenna, 2 is a transmitter section, 3 is a TR section, 4 is a mixer, 5 is a local signal generation section,
6 is a receiver section, 7 is a signal processing section, 8 is a jamming display section, 9 is a gate creation circuit, 10 is a switching circuit,
11 is a jamming detection circuit, 12 is a gate position setting circuit, 13 is a receiving video input, 14A to 14D
15 is a buffer amplifier, 15 is a gate circuit, 16 is a stretch circuit, 17 is a comparison circuit, 18 is a reference voltage, 19 is a jamming detection output, 20 is a status signal that indicates whether or not tracking is performed, 21 is a transmission pre-trigger, and 22 is a capture (previous) signal. ) gate, 23 is an inverter, 24A to 24B are AND circuits, 25A to 25F
is a monostable multivibrator, 26 is an OR circuit, 27 is a selector circuit, 28 is a jamming detection gate signal in search mode, 29 is a jamming detection gate signal in tracking mode, 30A to 30
B is a variable resistor for setting the gate position, 31 is a transmission trigger, 32 is an R gate, 33 is a tracking target, 34 is a tracking gate (front), 35 is a tracking gate (rear), 3
6 is the acquisition (post) gate. It should be noted that the same or corresponding parts in the figures are given the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 目標捜索あるいは追尾機能を有するのみならず
、目標からの妨害波をも探知する機能を有するレ
ーダ装置において、送信電波を外部に放射し、目
標からの反射波や妨害波を受信する送受信共用の
アンテナと、高周波電力パルスを作成する送信機
部と、上記送信機部からの電波の送信と上記アン
テナからの受信電波を受信するための切り替えを
行う送受切替部と、上記送受切替部から入力され
る受信電波を中間周波数に周波数変換を行うミキ
サーと、上記受信電波を中間周波数に変換するた
めのローカル信号を作成するローカル信号発生部
と、上記ミキサー出力を増幅した後ビデオ信号と
して出力する受信機部と、上記受信機部出力を受
けて距離追尾や角度追尾の処理や各種ゲートやト
リガーを作成する信号処理部と、上記受信機部の
出力を入力し、その信号の中に存在する妨害波を
検出する妨害波検出回路と、上記信号処理部から
の信号を受けて捜索時と追尾時とに分けて、捜索
モード時は有効受信範囲外に検出ゲートを作成し
、追尾ゲートの前後に検出ゲートを作成し、その
ゲートを上記妨害波検出回路に出力するゲート作
成回路と、追尾モード時と捜索モード時の妨害波
検出ゲートの切替えを行う切替回路と、追尾モー
ド時には追尾目標と共に移動しながら付近に他の
目標やクラツタ等が近づいてきたときは妨害波と
それ等を判別するために妨害波検出ゲートの位置
を任意に移動設定することができる妨害波検出ゲ
ート位置設定回路と、上記妨害波検出回路出力を
受けて妨害波の有無を表示する妨害波表示部とで
構成されていることを特徴とするレーダ装置。
In a radar device that not only has the function of searching or tracking a target, but also has the function of detecting interference waves from the target, an antenna used for both transmission and reception, which radiates the transmitted radio waves to the outside and receives reflected waves and interference waves from the target. a transmitter section that creates high-frequency power pulses, a transmission/reception switching section that performs switching between transmitting radio waves from the transmitter section and receiving radio waves from the antenna, and input from the transmission/reception switching section. A mixer that converts the frequency of received radio waves to an intermediate frequency, a local signal generator that creates a local signal for converting the received radio waves to an intermediate frequency, and a receiver section that amplifies the mixer output and outputs it as a video signal. and a signal processing section that receives the output of the receiver section and processes distance tracking and angle tracking, and creates various gates and triggers; A detection gate is created outside the effective reception range in the search mode by receiving signals from the interference wave detection circuit and the signal processing unit mentioned above for search and tracking, and detection gates are installed before and after the tracking gate. a gate creation circuit that creates a gate and outputs the gate to the interference wave detection circuit, a switching circuit that switches the interference wave detection gate in tracking mode and search mode, and a switching circuit that switches the interference wave detection gate in tracking mode and search mode; A disturbance detection gate position setting circuit that can arbitrarily move and set the position of the disturbance detection gate in order to distinguish between interference waves and other objects when other targets or clutters approach, and What is claimed is: 1. A radar device comprising: an interference wave display unit that receives a detection circuit output and displays the presence or absence of interference waves.
JP1270986U 1986-01-31 1986-01-31 Pending JPS62124578U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1270986U JPS62124578U (en) 1986-01-31 1986-01-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1270986U JPS62124578U (en) 1986-01-31 1986-01-31

Publications (1)

Publication Number Publication Date
JPS62124578U true JPS62124578U (en) 1987-08-07

Family

ID=30801091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1270986U Pending JPS62124578U (en) 1986-01-31 1986-01-31

Country Status (1)

Country Link
JP (1) JPS62124578U (en)

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