JPS61107231U - - Google Patents
Info
- Publication number
- JPS61107231U JPS61107231U JP19196184U JP19196184U JPS61107231U JP S61107231 U JPS61107231 U JP S61107231U JP 19196184 U JP19196184 U JP 19196184U JP 19196184 U JP19196184 U JP 19196184U JP S61107231 U JPS61107231 U JP S61107231U
- Authority
- JP
- Japan
- Prior art keywords
- tuning
- mode
- manual
- circuit
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Circuits Of Receivers In General (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19196184U JPS61107231U (it) | 1984-12-18 | 1984-12-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19196184U JPS61107231U (it) | 1984-12-18 | 1984-12-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61107231U true JPS61107231U (it) | 1986-07-08 |
Family
ID=30749393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19196184U Pending JPS61107231U (it) | 1984-12-18 | 1984-12-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61107231U (it) |
-
1984
- 1984-12-18 JP JP19196184U patent/JPS61107231U/ja active Pending
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