JPS6110359A - Picture reader - Google Patents

Abstract

PURPOSE:To obtain immediately an expanded picture pattern from an output of a CCD photosensor by utilizing an analog shift register incorporated in the CCD photosensor as a buffer memory for processing picture magnification. CONSTITUTION:The CCD photosensor 20 has analog shift registers SRA, SRB storing a read picture signal as a time serial signal. The shift registers SRA, SRB are constituted to be sampled by a sampling signal generated by a photosensor control circuit 10 and have a function magnifying the original picture. In magnifying the picture, while the control circuit 10 transfers one picture element, the sampling signal is applied to plural desired noted picture elements in the unit of a picture element period. Thus, a special buffer memory for magnifying picture is not used and the cost is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image reading device that obtains a variable magnification image that is an enlarged original image, and particularly relates to an image reading device that obtains an enlarged image pattern by electrically interpolating pixels from an original image pattern. Regarding equipment.

[Prior art]

Conventionally, this type of image reading device is composed of a line buffer memory that temporarily stores an original image pattern as an electric signal obtained from a photoelectric conversion section, and a control section for this line buffer memory. Image scaling was performed via memory. Here, an image reading apparatus that generates an enlarged image with a magnification of 372, that is, 1.5 times, in which a photoelectric conversion section generates a line image pattern signal with 1024 effective pixels will be described. This device includes a photoelectric conversion section, a memory control section that operates in synchronization with each pixel of image data output from the photoelectric conversion section, and a memory control section that has a capacity of 1024 pixels and receives data of one pixel from the photoelectric conversion section. address switching control from the memory control unit, and sequentially 1024 addresses starting from address 1.
It has a buffer memory section that stores original image data for one line up to the address. Then, when the original image data that has been stored is read out from this memory again, the memory control unit reads the data to the first address, then to the second address, then again to the second address, and then to the third address.

By performing control to select an even numbered address twice, such as the 4th address, the 4th address again, and so on.

Pixel interpolation is performed from the original image pattern represented by a symbol string of Pn (n-1 to 1024) (Pm-+
, Pm, Pm') (where rn='lt
, t=1~512) in total, I
Image reading devices that obtain an enlarged image pattern of C124x3/2 pixels were common.

[Problem that the invention seeks to solve]

In this way, in the conventional device, since the image scaling process is performed via the line buffer 7 memory, the original image pattern as an electric signal obtained from this photoelectric conversion section is processed in addition to the photoelectric conversion section. This method requires a line buffer memory section for temporary storage, which has the drawback of increasing costs.

The present invention uses a C0D (charge-coupled device) photosensor in the photoelectric conversion section in an image reading device that obtains a variable magnification image that is an enlarged original image, and uses an analog shift register built in the CCD photosensor as a buffer for image scaling processing. It is an object of the present invention to provide an image reading device that eliminates the drawbacks of the conventional image reading device described above and makes it possible to immediately obtain an enlarged image pattern of an original image pattern from a photoelectric conversion section by treating the image reading device as a memory.

[Means for solving problems]

According to the present invention, the photosensitive section is composed of a plurality of light receiving cells that generate signal charges through photoelectric conversion, and the readout section is composed of a shift register that transfers the signal charges of the photosensitive section and outputs them as time-series pixels. CCD photo sensor,
In an image reading device whose main components include the CCD photosensor control circuit and a sampling circuit that receives a sampling clock signal generated from the C'CD photosensor control circuit and samples an output signal of the CCD photosensor, the CCD photosensor control circuit While the circuit is performing a transfer operation of one pixel to the CCD photosensor, the sampling clock signal is applied to the sampling circuit for one or more clocks in units of a certain pixel period or to a plurality of desired pixels of interest. An image reading device is obtained which is characterized by performing the following steps.

〔Example〕

Hereinafter, nine embodiments of the present invention will be described based on the drawings.

FIG. 1 is a block diagram of an embodiment in which an image reading device according to the present invention has a reading unit for reading an original image pattern and a photoelectric conversion unit for obtaining an enlarged image pattern from the original image pattern as the center part. Corresponds to the device. FIG. 2 is a time chart of signals of each part.

In FIG. 1, 10 is a control circuit for a CCD (charge-coupled device) photosensor 20, 11 is a generation circuit for a charge transfer lock signal φCK for control, and 12 is a low level signal when the clock signal φCK is stopped at a certain pixel of interest. 13 is a sampling clock generation circuit; 20 is C
CD photo sensor, 30 is an impedance conversion circuit, 40
50 is a high input impedance video amplifier circuit, and 60 is a sample and hold circuit.

In the CCD photosensor 20, its photosensitive portion (photodiode array) PT has the role of reading each horizontal row of an image of an illuminated object to be imaged, that is, a document, by photoelectric conversion. A group of signal charges generated and accumulated in a group of photosensitive cells in a photosensitive section PT is generated by a scanning clock signal 5CAN.
The transfer pulse of the transfer signal generation circuit 21 is applied to the transfer gate (TG) in synchronization with CK, so that the transfer pulse is applied to the transfer gate (TG) in the CCD analog shift registers constituting the respective readout sections SR^ and SRB arranged above and below the photosensitive section PT. are transferred to each pit at once. These shift registers SRA, S
The signal charge group of R3 is.

By receiving the transfer lock generated by the transfer [E-tutter generation circuit 22], the charges are alternately transferred every clock to the charge detection and output circuit 26, and are outputted as an original image pattern signal, so-called video signal VIDEO. . Here, if the number of cells in the photosensitive section PT is n=1024, then the charge transmission lock signal φCK of 1024 clocks is obtained.
The time series signal V from the first pixel to the nth pixel is synchronized with
You will get IDEO. Charge transfer lock generation circuit 11. The clock stop signal generating circuit 12.sampling clock generating circuit 13 both operate with the clock signal CK1 as a common lock, and the clock stop signal generating circuit 12. The sampling clock generation circuit 16 is initialized each time scanning is performed by the scanning clock signal 5CANCK, and is synchronized with the video signal VIDEO.

Let's take as an example a device that enlarges a pixel pattern signal with 1024 effective pixels by 6/2 times.

The clock stop signal generation circuit 12 generates a clock signal C every six cycles of the clock signal CKI in synchronization with the clock signal CKI, as shown as a clock stop signal CK2 in FIG.
Generates a stop section (L7-level) for one cycle of K1,
Charge transfer lock generation circuit 11 generates clock signal φCK shown in FIG. At this time, the CCD photo sensor 20
The CCD analog shift registers SRA and SRB receive this charge transfer lock signal φCK, and as shown in FIG.
As shown as IDEO, a video signal synchronized with the clock signal φCK is output. sampling clock signal C
The K3 generating circuit 13 generates a continuous pulse waveform as shown by the clock signal CK3 in FIG. 2 in synchronization with the clock signal CK1.

If we pay attention to the period in which the clock signal CK1 is stopped for one cycle, as shown by φCKm in the signal φC in FIG. 2, the video signal VIDEO becomes the output signal a. During this period, the sampling clock signal CK3 is 2 clocks ta.
and ta' are applied, and the output signal PIX of the sample and hold circuit 60 is the video signal VIDI! :O output signal a
Corresponding to this, there are two pixels, signals a and al of the output signal PIX. Here, every time the charge transfer lock signal φCK has a stop period due to the stop signal CK2 to the clock signal φC, 9, for example, 1 denoted by the a° pixel of the output signal PIX between the 8 pixel of the video signal VIDEO and the b pixel. Pixels will be interpolated.

In FIG. 2, a stop signal C of the charge transfer lock signal φCK is shown.
An example has been shown in which K2 is synchronized with clock CK1, and a periodic waveform is shown in which one period of clock CK1 is stopped every three periods of clock CK1, and an image pattern enlarged by 3/2 times the original image pattern signal is obtained. , Pn (where n is an integer)
By performing one-pixel interpolation m times on the original image pattern signal expressed by the symbol ratio sequence, it is possible to obtain an enlarged image pattern signal Pt (1+m/n) times (where t=n0m). Note that if the clock CK2 in FIG. 2 was previously at a high level and the clock φCK is not stopped, it is clear that the sample-and-hold circuit output signal PIX, which is the same as the original image pattern signal, will be obtained. 3o is an impedance conversion circuit consisting of a transistor 61 and a resistor 52; 40 is a capacitor 41. Resistance 42. diode 4
5 and a constant voltage power supply 44, it is a DC regeneration circuit for setting a reference DC level of a high input impedance video amplifier circuit 50.

60 is a sample hold circuit, and analog switch circuit 61. Consists of a 62° hold capacitor and a high input impedance amplifier circuit 63.

When the sampling clock signal CK3 is at a high level, the switch circuit 61 is closed and sampling is performed.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, it is possible to obtain an enlarged image via the shift register that is originally built in the CCD photosensor, which is one component of the image reading device, and the cost can be reduced. The effect obtained in this respect is significant.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
It is a time chart of signals of each part. DESCRIPTION OF SYMBOLS 10... Photo sensor control circuit, 20... CCD photo sensor, 30... Impedance conversion circuit, 40...
DC reproduction circuit, 50... Video amplifier circuit, 60...
Sample and hold circuit. times ~

Claims (1)

[Claims] 1. A CCD photosensor configured with a photosensitive section consisting of a plurality of light receiving cells that generate signal charges through photoelectric conversion, and a readout section consisting of a shift register that transfers the signal charges of the photosensitive section and outputs them as time-series pixels; Upon receiving a sampling clock signal generated from the CCD photosensor control circuit and the CCD photosensor control circuit, the CCD photosensor
In an image reading device whose main component is a sampling circuit that samples the output signal of a photosensor,
The CCD photosensor control circuit applies the sampling clock signal to the sampling circuit for a period or more while performing a transfer operation of one pixel to the CCD photosensor in units of a certain pixel period, or for a plurality of desired points. An image reading device characterized in that it is equipped with a circuit for controlling pixels.