JPS61101093A - Manufacture of thick film circuit board - Google Patents
Manufacture of thick film circuit boardInfo
- Publication number
- JPS61101093A JPS61101093A JP22354384A JP22354384A JPS61101093A JP S61101093 A JPS61101093 A JP S61101093A JP 22354384 A JP22354384 A JP 22354384A JP 22354384 A JP22354384 A JP 22354384A JP S61101093 A JPS61101093 A JP S61101093A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- conductor
- insulating substrate
- thick film
- paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明はテレビジョン受像機やビデオテープレコーダな
どの広範な電子機器に用いられる両面スルーホールタイ
プの厚膜回路基板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a double-sided through-hole type thick film circuit board used in a wide range of electronic equipment such as television receivers and video tape recorders.
従来例の構成とその問題点
近年、電子機器の小型、軽量化や高機能化に対する要求
が高まるにつれ、それらの電子回路をいかに高密度化し
信頼性を高めてゆくかが極めて重要な課題となっている
。Conventional configurations and their problems In recent years, as the demand for smaller, lighter, and more highly functional electronic devices has increased, how to increase the density and reliability of these electronic circuits has become an extremely important issue. ing.
このような中にあって昨今、ノ1イブリッドICと称す
る混成集積回路部品を使用して電子回路を構成する実装
方法が広く行なわれるようになってきた。Under these circumstances, recently, a mounting method of configuring electronic circuits using hybrid integrated circuit components called hybrid ICs has become widely used.
この混成集積回路部品は一般に、アルミナなどのセラミ
ック絶縁基板に銀を主成分としたメタルグレーズ系の導
体回路と酸化ルテニウムから成るメタルグレーズ系の抵
抗回路を形成したいわゆる厚膜回路基板に所望の機能回
路を構成するのに必要な回路素子をはんだ付けすること
によって構成したものである。This hybrid integrated circuit component generally has a desired function on a so-called thick film circuit board in which a metal glaze conductor circuit mainly composed of silver and a metal glaze resistor circuit consisting of ruthenium oxide are formed on a ceramic insulating substrate such as alumina. It is constructed by soldering the circuit elements necessary to construct the circuit.
このような混成集積回路部品は、他の多くの回路素子と
一緒にマザー印刷配線板に実装して電子回路を構成し、
これにより電子回路全体の;J・型化や高信頼化がはか
られるが、反面このような実装方法ではコストが高くつ
ぐため、その利用分野は限られたものであった。Such hybrid integrated circuit components are mounted on a mother printed wiring board together with many other circuit elements to form an electronic circuit.
This makes it possible to make the entire electronic circuit J-shaped and highly reliable, but on the other hand, the cost of this mounting method is high, so its field of use is limited.
その原因としては、混成集積回路部品を構成する厚膜回
路基板とりわけ回路の高密度をはかるだめの両面タイプ
の厚膜回路基板のコストが高くつくことが最も大きな要
因となっていた。The most important reason for this is the high cost of thick film circuit boards constituting hybrid integrated circuit components, especially double-sided thick film circuit boards designed for high circuit density.
従来、両面スルーホールタイプの厚膜回路基板は第1図
のA−Dに示す製造工程を経て作られていた。Conventionally, double-sided through-hole type thick film circuit boards have been manufactured through the manufacturing process shown in A to D in FIG.
即ち、この製造法は丑ず第1図Aに示すようにアルミナ
などのセラミック絶縁基板1を用いてその必要な個所に
貫通孔2をあけ、次いで第1図Bに示すようにこのアル
ミナ絶縁基板の表裏両面に銀や銀−パラジウムから成る
メタルグレーズ系の導体ペーストを用いてスクリーン印
刷法によりそれぞれ所望の配線回路図形状に塗布し、8
00〜860度の高温中で焼成することによって回路導
体層3a、3bを形成する。That is, this manufacturing method uses a ceramic insulating substrate 1 made of alumina, etc., as shown in FIG. A metal glaze type conductive paste made of silver or silver-palladium is applied to both the front and back sides of the board using a screen printing method to form the desired wiring circuit diagram shape.
The circuit conductor layers 3a and 3b are formed by firing at a high temperature of 00 to 860 degrees.
この際、アルミナ絶縁基板10表裏に形成された回路導
体層3a 、3b間の導通をはかる方法と1〜では導体
ペーストを配線回路状に印刷すると同時に貫通孔2の中
にも導体ペーストを充填、あるいは塗布してスルーホー
ル接続をはかっている。At this time, there is a method of establishing electrical continuity between the circuit conductor layers 3a and 3b formed on the front and back sides of the alumina insulating substrate 10, and in steps 1 to 1, printing the conductor paste in the form of a wiring circuit and simultaneously filling the through hole 2 with the conductor paste. Alternatively, it is coated to make through-hole connections.
そして第1図Cに示すようにセラミック絶縁基板の少な
くとも一方の主面上に酸化ルテニウムから成るメタルグ
レーズ系の抵抗ペーストをスクリーン印刷法により塗布
し、同じく8oo〜850度の高温中で焼成することに
より抵抗体層4を形成する。Then, as shown in FIG. 1C, a metal glaze-based resistance paste made of ruthenium oxide is applied on at least one main surface of the ceramic insulating substrate by a screen printing method, and the same is fired at a high temperature of 80 to 850 degrees. A resistor layer 4 is formed.
それから、第1図りに示すようにこの抵抗体層4の表面
にガラス系の絶縁保護層5を形成し、しかる後にレーザ
ートリミング技術を用いてガラス絶縁保護層6を通して
抵抗体層4の表面をカッティングして所定の抵抗値にな
るように調整し、複数の抵抗体素子を有する両面スルー
ホールタイプの厚膜回路基板を作るものである。Then, as shown in the first diagram, a glass-based insulating protective layer 5 is formed on the surface of this resistor layer 4, and then the surface of the resistor layer 4 is cut through the glass insulating protective layer 6 using laser trimming technology. The resistance value is adjusted to a predetermined value to produce a double-sided through-hole type thick film circuit board having a plurality of resistor elements.
ところがこのような方法による両面スルーホール厚膜回
路基板は、導体回路が全て銀や、銀−パラジウムなどの
極めて高価な貴金属によって構成されるので経済性に欠
けることはもとより、銀糸導体回路特有の問題点として
高温高湿負荷による導体回路間の銀のマイグレーション
や、ハA、、fr3け作業における銀くわれ現象が発生
し、このために回路導体層の短絡不良や断線不良による
信頼性や歩留りの低下を招き、高密度で信頼性の高い両
面厚膜回路基板が得られにくい問題があった。However, double-sided through-hole thick-film circuit boards made using this method are not only uneconomical because the conductor circuits are all made of silver or extremely expensive precious metals such as silver-palladium, but also have problems specific to silver thread conductor circuits. As a point of view, silver migration between conductor circuits due to high temperature and high humidity loads, and the phenomenon of silver crinkling occurring during 3A, 3, fr3 bonding work, lead to short circuits and disconnections in the circuit conductor layer, resulting in reduced reliability and yield. This causes a problem in that it is difficult to obtain a double-sided thick film circuit board with high density and high reliability.
発明の目的
本発明の目的は、上述した従来例の欠点を解消すると共
に、スルーホール接続を確実に行なうことが可能で、か
つマイグレーションやはんだ付は作業による断線不良や
短絡不良の生じない信頼性にすぐれた回路導体層を有す
る高密度両面スルーホール厚膜回路基板の製造方法を提
供することである。Purpose of the Invention The purpose of the present invention is to solve the above-mentioned drawbacks of the conventional example, and to make it possible to perform through-hole connections reliably, and to ensure reliability that migration and soldering do not cause disconnection or short-circuit defects during work. An object of the present invention is to provide a method for manufacturing a high-density double-sided through-hole thick film circuit board having a circuit conductor layer with excellent properties.
発明の構成
本発明による厚膜回路基板は、セラミック絶縁基板の所
定の位置に貫通孔をあけ、前記セラミック絶縁基板の表
裏両面の必要個所にメタルグレーズ系の貴金属導体ペー
ストを選択的に塗布し、高温焼成により接続端子用導体
層を形成する工程、前記セラミック絶縁基板の少なくと
も一方の主面上に形成した接続端子用導体層間の必要個
所にメタルグレーズ系の抵抗体層を形成する工程、前記
抵抗体層の表面に絶縁保護層を形成する工程、前記接続
端子用導体層に連続する所望の配線図形状に無電解めっ
き用の活性ペーストを印刷、焼成して活性層を形成する
工程、前記活性層表面に無電解めっき法により導電金属
層を析出させる工程を経て作られるものであり、これに
より、信頼性にすぐれた両面厚膜回路基板が得られ、さ
らに断線不良や短絡不良のない導体回路層を備えたロー
コスト両面厚膜回路基板が実現できるものである。Structure of the Invention The thick film circuit board according to the present invention has a through hole formed in a predetermined position of a ceramic insulating substrate, and a metal glaze-based noble metal conductor paste is selectively applied to required locations on both the front and back surfaces of the ceramic insulating substrate, a step of forming a conductor layer for connection terminals by high-temperature firing; a step of forming a metal glaze-based resistor layer at necessary locations between the conductor layers for connection terminals formed on at least one main surface of the ceramic insulating substrate; a step of forming an insulating protective layer on the surface of the body layer, a step of printing an active paste for electroless plating in a desired wiring diagram shape continuous with the connection terminal conductor layer and baking it to form an active layer; It is made through a process of depositing a conductive metal layer on the surface of the layer by electroless plating, and as a result, a double-sided thick film circuit board with excellent reliability can be obtained, and a conductor circuit with no disconnection or short circuit defects can be obtained. A low cost double-sided thick film circuit board with layers can be realized.
する。do.
第2図A−Eは本発明の一実施例に於ける両面厚膜回路
基板の製造方法を説明するだめの各製造工程に於ける要
部断面図である。FIGS. 2A to 2E are cross-sectional views of essential parts in each manufacturing process for explaining a method for manufacturing a double-sided thick film circuit board according to an embodiment of the present invention.
第2図において6はセラミック絶縁基板、7は貫通孔、
8a、8bはメタルグレーズ系の接続用導体層、9は抵
抗体層、10は抵抗体絶縁保護層、11は活性層、12
は導電金属層である。In FIG. 2, 6 is a ceramic insulating substrate, 7 is a through hole,
8a and 8b are metal glaze-based connecting conductor layers, 9 is a resistor layer, 10 is a resistor insulation protection layer, 11 is an active layer, 12
is a conductive metal layer.
以上のように構成された本実施例による厚膜回路基板の
製造方法について以下その詳細を説明する0
本実施例による厚膜回路基板はまず第2図Aに示すよう
にアルミナなどのセラミック絶縁基板6の所定の位置に
レーザー光を用いてスルーホール接続を行うだめの貫通
孔7をあけるか、または焼成前のアルミナ絶縁シート即
ちグリーンシートに金型を用いて貫通孔7をあけ、この
グリーンシートを14oO〜1600度の高温で焼成し
て作ったアルミナ基板を用いる。The details of the method for manufacturing the thick film circuit board according to this embodiment configured as described above will be explained below. 6, use a laser beam to make a through hole 7 for through-hole connection, or use a mold to make a through hole 7 in an alumina insulating sheet, i.e., a green sheet, before firing. An alumina substrate made by firing at a high temperature of 14°C to 1,600°C is used.
次いで第2図Bに示すようにこのアルミナ絶縁基板6の
表裏両面の所定の位置に銀の微粉末をガ゛′・ニラスフ
リットと樹脂バインダーに分散混合してつくったいわゆ
る通常のメタルグレーズ系の導体ペーストを用い、スク
リーン印刷法等の公知の方法により所望の形状になるよ
うに選択的に塗布してこの導体ペーストを800〜85
0度の空気中で高温焼成することによりメタルグレーズ
系の接続用導体層sa、sbをそれぞれ形成する。この
場合、導体ペーストはアルミナ絶縁基板との密着性に優
れていることは勿論のこと、酸やアルカリなどの化学薬
品に対し優れた耐性を有することが必要であり、この目
的に合致する導体ペーストとして本実施例では硼珪酸系
ガラスフリットと銀の微粉末を樹脂バインダーで混合し
た導体ペーストを使用した。Next, as shown in FIG. 2B, a so-called ordinary metal glaze conductor made by dispersing and mixing fine silver powder into a glass frit and a resin binder is placed at predetermined positions on both the front and back surfaces of this alumina insulating substrate 6. Using a conductor paste, the conductor paste is selectively applied to a desired shape by a known method such as screen printing, and the conductor paste is coated with an 800 to 85
Metal glaze-based connection conductor layers sa and sb are formed by high-temperature firing in air at 0 degrees Celsius. In this case, the conductive paste must not only have excellent adhesion to the alumina insulating substrate, but also have excellent resistance to chemicals such as acids and alkalis, and the conductive paste that meets this purpose must be In this example, a conductive paste made by mixing borosilicate glass frit and fine silver powder with a resin binder was used.
また、この工程において導体材料として銀糸の材料を使
用する理由は次工程で形成する抵抗体層の電極端子とし
て良好な接続状態を得ることができると共に回路素子を
はんだ付けするのにアルミナ絶縁基板との良好な接着性
をもたせるためであら成るメタルグレーズ系の導体ペー
ストが使用できるが、本実施例では経済性を考慮にいれ
銀のみから成る導体ペーストを使用した。In addition, the reason why silver thread material is used as a conductor material in this process is that it can obtain a good connection state as an electrode terminal for the resistor layer formed in the next process, and it can also be used as an alumina insulating substrate for soldering circuit elements. Although any metal glaze type conductor paste can be used to provide good adhesion, in this embodiment, a conductor paste consisting only of silver was used in consideration of economic efficiency.
つぎに、第2図Cに示すように接続端子用の導体層8a
、abを形成したアルミナ絶縁基板6の少なくとも一
方の主面上に酸化ルテニウムの微粉法によシ所定の図形
状に塗布し、導体ペーストと同じく8oO〜850度の
高温中で焼成することにより抵抗体層9を形成し前記抵
抗体層の表面に抵抗体絶縁保護層10を形成する。それ
から第2図りに示すようにこのセラミック絶縁基板6の
表裏両面に接続端子用導体層の一部を含む配線図形状に
無電解めっき用の活性ペーストを印刷、焼成して活性層
11を形成し、しかる後にこのセラミック基板を銅やニ
ッケルなどの無電解めっき液に浸漬して第2図Eに示す
ように露出した接続端子用導体層8a、8bの一部と、
セラミック絶縁基板の表面及び貫通孔7の内壁部に付着
した活性化10ベー/
層8に銅やニッケルなどの導電金属層12を析出させ、
回路導体層を形成した。Next, as shown in FIG. 2C, the conductor layer 8a for the connection terminal is
, ab is formed on at least one main surface of the alumina insulating substrate 6 by applying ruthenium oxide in a predetermined shape using a fine powder method, and baking it at a high temperature of 8oO to 850 degrees Celsius like the conductor paste. A resistor layer 9 is formed, and a resistor insulation protection layer 10 is formed on the surface of the resistor layer. Then, as shown in the second diagram, an active paste for electroless plating is printed on both the front and back sides of this ceramic insulating substrate 6 in the shape of a wiring diagram including a part of the conductor layer for connection terminals, and is fired to form an active layer 11. , After that, this ceramic substrate is immersed in an electroless plating solution such as copper or nickel to expose a portion of the connecting terminal conductor layers 8a and 8b as shown in FIG. 2E.
A conductive metal layer 12 such as copper or nickel is deposited on the activated 10B layer 8 attached to the surface of the ceramic insulating substrate and the inner wall of the through hole 7,
A circuit conductor layer was formed.
さらに所定の抵抗値を得るためにこの抵抗体層9をレー
ザー光やサンドブラスト法を用いて抵抗体絶縁保護層1
0上よりカッティングし、所定の抵抗値に調整した。Furthermore, in order to obtain a predetermined resistance value, this resistor layer 9 is coated with a resistor insulating protective layer 1 using a laser beam or sandblasting method.
It was cut from above 0 and adjusted to a predetermined resistance value.
本実施例では、無電解めっき用活性ペーストとしてメタ
ルグレーズ系の活性ペーストを印刷し、460〜600
℃で焼成した。1だ、無電群めっきとしてニッケルめっ
きを行なったが、このニッケルめっき浴としては硫酸ニ
ッケル、エチレンジアミン、次亜リン酸ナトリウムから
成るp H6〜7の無電解ニッケルめっき液を用い、浴
温度66〜70℃でめっきをして金属ニッケルを5〜2
0μの厚さに析出させた。In this example, a metal glaze type active paste was printed as an active paste for electroless plating, and
Calcined at ℃. 1. Nickel plating was performed as electroless group plating, and the nickel plating bath used was an electroless nickel plating solution with a pH of 6 to 7 consisting of nickel sulfate, ethylenediamine, and sodium hypophosphite, and the bath temperature was 66 to 70. Metallic nickel is plated at 5 to 2 degrees Celsius.
It was deposited to a thickness of 0μ.
尚、抵抗体表面の耐めっき用保護膜を兼ねてガラス系の
絶縁ペーストを使用するものであり、耐薬品性や耐環境
性にすぐハると共に、低融点でセラミック基板やメタル
グレーズ系の抵抗体層と熱膨張係数が類似し、抵抗体層
への影響が少なく、しかもレーザー光の吸収性の高い性
質を有するガラス絶縁ペーストとして硼珪酸鉛ガラスを
用いて、このガラスペーストをスクリーン印刷法により
セラミック絶縁基板の両面に塗布して400〜500℃
の温度で焼成することによシ耐めっき性の抵抗体絶縁保
護層10を形成した。In addition, a glass-based insulating paste is used that also serves as a plating-resistant protective film on the surface of the resistor, which quickly improves chemical and environmental resistance, and has a low melting point that makes it suitable for ceramic substrates and metal glaze-based resistors. Borosilicate lead glass is used as a glass insulation paste that has a similar coefficient of thermal expansion to the resistor layer, has little effect on the resistor layer, and is highly absorbent to laser light.This glass paste is then printed using a screen printing method. Apply to both sides of ceramic insulating substrate and heat to 400-500℃
A plating-resistant resistor insulating protective layer 10 was formed by firing at a temperature of .
発明の効果
以上の説明から明らかなように本発明によるへ膜回路基
板は、所定の個所に貫通孔をあけたセラミック絶縁基板
を用いて捷ずその表裏両面の必要個所に銀糸のメタルグ
レーズ導体ペーストを選択的に塗布して、高温焼成する
ことにより接続端子用導体層を形成し、次いでこのセラ
ミック絶縁基板の少なくとも一方の面にメタルグレーズ
系の抵抗体層を形成してから、この抵抗体層が完全に保
護されるように抵抗体層表面に耐めっき性を有する絶縁
保護層を形成し、前記接続端子用導体層に連続する所望
の配線形状に無電解めっき用の活性ペーストを印刷、焼
成して活性層を形成した、しかる後、無電解めっきを行
なって露出したセラミック基板の表面と貫通孔内壁面に
導電金属層を析出させることにより作られたものである
。Effects of the Invention As is clear from the above explanation, the membrane circuit board according to the present invention uses a ceramic insulating substrate with through holes in predetermined locations, and injects silver thread metal glaze conductor paste into necessary locations on both the front and back surfaces of the substrate. A conductor layer for connection terminals is formed by selectively applying and firing at a high temperature, and then a metal glaze-based resistor layer is formed on at least one surface of this ceramic insulating substrate, and then this resistor layer is formed. An insulating protective layer with plating resistance is formed on the surface of the resistor layer so that the resistor layer is completely protected, and an active paste for electroless plating is printed and fired in the desired wiring shape continuous with the conductor layer for the connection terminal. After that, electroless plating is performed to deposit a conductive metal layer on the exposed surface of the ceramic substrate and the inner wall surface of the through hole.
従って、本発明による厚膜回路基板上のはんだ付けを行
う回路導体層はメタルグレーズ系の導体層上に無電解め
っきが施され、はんだ付けを必要としないその他の回路
導体層は無電解めっきによる導電金属層で形成された構
造となるため、従来例のような銀糸のメタルグレーズ導
体層の問題点である回路導体間のマイグレーションによ
る短絡不良や、回路素子のはんだ付は作業に於ける回路
導体層の断線不良が皆無になり、なおかつセラミック基
板の両面に形成された回路導体層のスルーホール接続が
無電解めっきにより補償的に行なわれるため、スルーホ
ールの接続がより確実にでき信頼性と歩留りの向上がは
かれるなど、従来例にない多くの効果が得られるもので
ある。Therefore, the circuit conductor layer to be soldered on the thick film circuit board according to the present invention is electroless plated on the metal glaze conductor layer, and the other circuit conductor layers that do not require soldering are electroless plated. Since the structure is made of a conductive metal layer, short circuit failure due to migration between circuit conductors, which is a problem with conventional silver thread metal glaze conductor layers, and circuit conductors during soldering of circuit elements can be avoided. There are no layer disconnections, and the through-hole connections of the circuit conductor layers formed on both sides of the ceramic substrate are compensated by electroless plating, making the through-hole connections more reliable and improving reliability and yield. Many effects not found in conventional examples can be obtained, such as improved performance.
第1図A〜Dは従来例による厚膜回路基板の製造工程を
説明するための製部断面図、第2図A〜Eは本発明の一
実施例におけるh膜回路基板の製13 ′・−
造工程を説明するための要部断面図=抽ホ≠桂奉。
血溝である。
6・・・・・・セラミック絶縁基板、7・・・・・・貫
通孔、8a8b・・・・・・接続端子用導体層、9・・
・・・・抵抗体層、1゜・・・・・・抵抗体絶縁保護層
、11・・・・・・活性層、12・・・・・・導電金属
層。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図FIGS. 1A to 1D are cross-sectional views of the manufacturing part for explaining the manufacturing process of a thick film circuit board according to a conventional example, and FIGS. − A cross-sectional view of the main parts to explain the construction process = Zakuho≠Gyebong. It is a blood groove. 6...Ceramic insulating substrate, 7...Through hole, 8a8b...Conductor layer for connection terminal, 9...
...Resistor layer, 1°...Resistor insulating protective layer, 11...Active layer, 12...Conductive metal layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure
Claims (1)
記セラミック絶縁基板の表裏両面の必要個所にメタルグ
レーズ系の貴金属導体ペーストを選択的に塗布し、高温
焼成により接続端子用導体層を形成する工程、前記セラ
ミック絶縁基板の少なくとも一方の主面上に形成した接
続端子用導体層間の必要個所にメタルグレーズ系の抵抗
体層を形成する工程、前記抵抗体層の表面に絶縁保護層
を形成する工程、前記接続端子用導体層に連続する所望
の配線図形状に無電解めっき用活性ペーストを印刷、焼
成して活性層を形成する工程前記活性層表面に無電解め
っき法により導電金属層を選択的に析出させる工程から
成る厚膜回路基板の製造方法。A step of drilling a through hole at a predetermined position in a ceramic insulating substrate, selectively applying a metal glaze-based noble metal conductor paste to required locations on both the front and back surfaces of the ceramic insulating substrate, and forming a conductor layer for a connecting terminal by high-temperature firing. , a step of forming a metal glaze-based resistor layer at necessary locations between the connection terminal conductor layers formed on at least one main surface of the ceramic insulating substrate, and a step of forming an insulating protective layer on the surface of the resistor layer. , a step of printing an active paste for electroless plating in a desired wiring diagram shape that is continuous with the conductor layer for the connection terminal, and baking it to form an active layer; selectively forming a conductive metal layer on the surface of the active layer by electroless plating; A method for manufacturing a thick film circuit board comprising the step of depositing
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22354384A JPS61101093A (en) | 1984-10-24 | 1984-10-24 | Manufacture of thick film circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22354384A JPS61101093A (en) | 1984-10-24 | 1984-10-24 | Manufacture of thick film circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61101093A true JPS61101093A (en) | 1986-05-19 |
Family
ID=16799804
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22354384A Pending JPS61101093A (en) | 1984-10-24 | 1984-10-24 | Manufacture of thick film circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61101093A (en) |
-
1984
- 1984-10-24 JP JP22354384A patent/JPS61101093A/en active Pending
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