JPS6099557U - Multicolor light emitting semiconductor device - Google Patents

Multicolor light emitting semiconductor device

Info

Publication number
JPS6099557U
JPS6099557U JP19030383U JP19030383U JPS6099557U JP S6099557 U JPS6099557 U JP S6099557U JP 19030383 U JP19030383 U JP 19030383U JP 19030383 U JP19030383 U JP 19030383U JP S6099557 U JPS6099557 U JP S6099557U
Authority
JP
Japan
Prior art keywords
light emitting
lead frame
chips
emitting semiconductor
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19030383U
Other languages
Japanese (ja)
Inventor
根来　立彦
進 武田
Original Assignee
スタンレー電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by スタンレー電気株式会社 filed Critical スタンレー電気株式会社
Priority to JP19030383U priority Critical patent/JPS6099557U/en
Publication of JPS6099557U publication Critical patent/JPS6099557U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来の二色発光半導体装置の側面図、第２図
は第１図の装置の結線回路図、第３図乃至第７図はいず
れもこの考案の一実施例を示し、第３図は発光チップを
マウントした第１、第２のリードフレームを２層に重ね
て４種類の発光色のチップ毎にレンズ部をモールドした
状態を示す一部側面図、第４図は同じくレンズ部を省略
した平面図、第５図は４色発光半導体装置を示す側　゛
面図、第６図は同じく平面図、第７図は第５図の装置の
結線回路図である。 ８・・・第１のリードフレーム、９・・・第２のリード
フレーム、１０，１１，１２．１３・・・リード端子、
１０ｂ、ｌｌｂ、１２ｂ、１３ｂ・・・先端台部、１４
．　１５．　１６．　１７・・・発光半導体チップ（発
光チップ）、１４ａｔ　　１５ａ＊　　１６ａ＊　　１
７ａ・・・表面電極、２３・・・レンズ部。FIG. 1 is a side view of a conventional two-color light emitting semiconductor device, FIG. 2 is a wiring circuit diagram of the device shown in FIG. Figure 3 is a partial side view showing a state in which the first and second lead frames on which light-emitting chips are mounted are stacked in two layers, and lens parts are molded for each of the four types of chips with light-emitting colors, and Figure 4 is a side view of the same lenses. 5 is a side view showing a four-color light emitting semiconductor device, FIG. 6 is a plan view of the same, and FIG. 7 is a wiring circuit diagram of the device shown in FIG. 5. 8... First lead frame, 9... Second lead frame, 10, 11, 12.13... Lead terminal,
10b, llb, 12b, 13b...Tip stand part, 14
．． 15. 16. 17... Light emitting semiconductor chip (light emitting chip), 14at 15a* 16a* 1
7a...Surface electrode, 23...Lens portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 発光色の異なる４種類の発光半導体チップのうち、２種
類のチップを、一対のリード端子の夫々に発光色の異な
るチップを逆並列となるようにマウントした第１のリー
ドフレームと、他の一対のリード端子の夫々に、前記第
１のリードフレーム・　に備えられるチップとは発光色
が異なる２種類のチップを、互に逆並列となるようにマ
ウントした第２のリードフレームと、前記第１のリード
フレームと、第２のリードフレームとを並列して、リー
ド端子上端部分を透光性樹脂にてモールド一体化したこ
とを特徴とする多色発光半導体装置。Out of four types of light emitting semiconductor chips with different light emitting colors, two types of chips are mounted on a first lead frame in which chips with different light emitting colors are mounted in antiparallel to each of a pair of lead terminals, and on the other pair of lead terminals. a second lead frame in which two types of chips having different emission colors from the chips provided in the first lead frame are mounted in antiparallel to each other on each of the lead terminals of the first lead frame; A multicolor light emitting semiconductor device characterized in that a lead frame and a second lead frame are arranged in parallel and the upper end portions of the lead terminals are integrally molded with a translucent resin.
JP19030383U 1983-12-12 1983-12-12 Multicolor light emitting semiconductor device Pending JPS6099557U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19030383U JPS6099557U (en) 1983-12-12 1983-12-12 Multicolor light emitting semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19030383U JPS6099557U (en) 1983-12-12 1983-12-12 Multicolor light emitting semiconductor device

Publications (1)

Publication Number Publication Date
JPS6099557U true JPS6099557U (en) 1985-07-06

Family

ID=30410072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19030383U Pending JPS6099557U (en) 1983-12-12 1983-12-12 Multicolor light emitting semiconductor device

Country Status (1)

Country Link
JP (1) JPS6099557U (en)

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