JPS6098154U - PCM processor - Google Patents
PCM processorInfo
- Publication number
- JPS6098154U JPS6098154U JP18751983U JP18751983U JPS6098154U JP S6098154 U JPS6098154 U JP S6098154U JP 18751983 U JP18751983 U JP 18751983U JP 18751983 U JP18751983 U JP 18751983U JP S6098154 U JPS6098154 U JP S6098154U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization signal
- pcm
- signal
- pcm processor
- horizontal synchronization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はビデオ信号中の垂直同期信号及びその微分波形
を表わす波形図、第2図は本考案のミューディング制御
回路の一実施例を示すブロック図、第3図は本考案の実
施例の説明に供する波形図、第4図は本考案の他の実施
例を示すブロック図、第5図は第4図に示す実施例の説
明に供する波形図である。
符号の説明、1・・・同期分離回路、2・・・識別回路
、3・・・積分回路、4・・・微分回路、5・・・垂直
同期 ゛信号検出器、6・・・水平同期信号検出器、7
・・・アンド回路、8・・・平滑回路、9・・・比較器
。Fig. 1 is a waveform diagram showing a vertical synchronization signal in a video signal and its differential waveform, Fig. 2 is a block diagram showing an embodiment of the muting control circuit of the present invention, and Fig. 3 is a waveform diagram showing an embodiment of the muting control circuit of the present invention. FIG. 4 is a block diagram showing another embodiment of the present invention, and FIG. 5 is a waveform diagram for explaining the embodiment shown in FIG. 4. Explanation of symbols, 1...Synchronization separation circuit, 2...Identification circuit, 3...Integrator circuit, 4...Differentiating circuit, 5...Vertical synchronization ゛Signal detector, 6...Horizontal synchronization signal detector, 7
...AND circuit, 8...Smoothing circuit, 9...Comparator.
Claims (1)
サにおいて、PCM信号中の水平同期信号と垂直同期信
号とを各々識別分離する識別装置と、該識別装置より出
力される各同期信号を入力して垂直同期信号の存在する
期間での水平同期信号の有、無を検出する検出装置と、
該検出装置からの検出信号によってPCMプロセッサの
再生信号伝送系を遮断するミューティング装置とを具備
するPCMプロセッサ。゛ In a PCM processor that uses vTR as a recording/reproducing means, there is an identification device that identifies and separates a horizontal synchronization signal and a vertical synchronization signal in a PCM signal, and a vertical synchronization signal by inputting each synchronization signal output from the identification device. a detection device that detects the presence or absence of a horizontal synchronization signal during the period in which the horizontal synchronization signal exists;
A PCM processor comprising: a muting device that shuts off a reproduction signal transmission system of the PCM processor in response to a detection signal from the detection device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18751983U JPS6098154U (en) | 1983-12-06 | 1983-12-06 | PCM processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18751983U JPS6098154U (en) | 1983-12-06 | 1983-12-06 | PCM processor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6098154U true JPS6098154U (en) | 1985-07-04 |
JPH0356916Y2 JPH0356916Y2 (en) | 1991-12-24 |
Family
ID=30404758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18751983U Granted JPS6098154U (en) | 1983-12-06 | 1983-12-06 | PCM processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6098154U (en) |
-
1983
- 1983-12-06 JP JP18751983U patent/JPS6098154U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0356916Y2 (en) | 1991-12-24 |
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