JPS609808Y2 - Keystroke display device for group performance training equipment - Google Patents

Description

[Detailed description of the invention] This invention is a group performance training device for teaching electronic musical instrument performance techniques to a large group of students. Regarding a correct/incorrect key press display device that determines whether or not a correct key press operation is performed and displays the result, by providing a means for storing the key press state on the main unit side, in particular,
This is designed to minimize the number of key operations that must be performed on the base unit side in order to generate keystroke data to be compared.

In this type of correct/incorrect keystroke display device that has been proposed in the past, in order to display and check whether or not a keystroke on the slave unit is correct, each time the main unit operates the keys of the electronic musical instrument, the keystrokes to be compared are displayed. It is necessary to generate data, and because of key operations, teachers using the main unit cannot concentrate on their original research activities.
Furthermore, there was a drawback that educational activities using the group performance training device were hindered.

The purpose of this invention is to provide a new keystroke display device for a group performance training device that eliminates such drawbacks.

The feature of this invention is that a memory circuit is provided to store keystroke data on the base unit side, and comparison and display operations are performed based on this stored data.

According to these features, the teacher who operates the base unit can perform only one key press data generation operation when repeatedly checking the correctness of key presses for the same student or individually for a large number of students. This makes it possible to carry out detailed investigation activities efficiently, which in turn allows for smoother group performance lessons between teachers and a large number of students.

This invention will be described in detail below with reference to embodiments shown in the accompanying drawings.

FIG. 1 shows a keystroke display device for a group performance training device according to an embodiment of this invention.

In this example of the group performance training device, for convenience of explanation, it is assumed that the electronic musical instruments of the base unit and each slave unit have 8 keys, but in reality, they usually have 37 to 61 keys. It is.

The display device in this example includes a master key switch (SW) circuit 10 provided in the electronic musical instrument of the master unit, a key press state display circuit 12 usually provided in the master unit, and a key press state display circuit 12 usually provided in the master unit and each slave unit. Correct/incorrect keystroke display circuit 14 and first to Nth handset key switch circuits 20-1.2 provided in the first to Nth (N is any integer greater than or equal to 2) handset electronic musical instruments, respectively.
0-2...20-N are provided.

The master key switch circuit 10 has a function of generating a clock signal φ, a synchronization signal SYN, and scanning signals S1 to S8 having a timing relationship as shown in FIG. It has a function of detecting the keystroke states of a large number of keys of the base unit electronic musical instrument based on the base unit and generating a base unit key data signal KDT indicating the keystroke status.For details, refer to FIG. 3 later. explain.

Each handset key switch circuit 20-1.20-2...
20-N receives the clock signal φ and the synchronization signal SYN, respectively, and performs key switch scanning in synchronization with the key switch scanning of the master unit, thereby detecting the key-pressing states of a large number of keys on the electronic musical instrument of each child unit. , first to Nth handset key data signals KDS indicating the respective key-pressing states.

KDS2... Generates KDSn.

These handset key switch circuits 20-1, 20-2...
...20-N have substantially the same configuration and operate in the same way, so we will take up the first handset key switch circuit 20-1 as a representative, and explain its configuration and operation later in the fourth section. The diagram will be explained.

The key press state display circuit 12 receives a master key data signal KDT and a slave key data circuit K, both of which are transmitted in serial format.
DS, -KDSn are selectively received, and the received signals are exchanged in parallel form according to the scanning signals S1 to S8, and are visually displayed on a group of keystroke status indicators.

In addition, the correct/incorrect keystroke display circuit 14 outputs a master key data signal KD.
It compares any of the handset key data signals KDS1 to KDSn with T to determine whether keys with the same pitch name have been pressed, and visually displays the determination result. , and a group of indicators for displaying erroneous keystrokes.

Details of the keystroke status display circuit 12 and the correct/incorrect keystroke display circuit 14 will be explained later with reference to FIG. 5.

FIG. 3 shows a specific circuit configuration of the master key switch circuit 10, where KS is C1.KS in the master electronic musical instrument.
C, #... Represents eight key switches that are respectively linked to the eight keys of G1.

A common resistor R is connected to the movable contact side of these key switches KS.
Voltage ■ through C1.

is applied, and the fixed contacts of each key switch are resistors R□ to R8.
They are each grounded through.

When each key switch is closed in response to the corresponding key being pressed, the key-on signal KON taken out from the fixed contact side of each key switch is transmitted through OR gates OG1 to OG8 provided corresponding to each key switch. is supplied to one input terminal of each.

The other input terminal of each of the OR gates OG1 to OG8 is supplied with a latch output from the key press state storage latch circuit LAT.

The ring counter RCT is composed of an 8-bit shift register that sequentially shifts the synchronizing pulse SYN according to the clock signal φ, and outputs Q1 to Q8 include a scanning signal 81 consisting of parallel pulses that occur sequentially and cyclically. ~S8 is generated.

The NOR gate NOG generates a synchronization signal SYN consisting of a synchronization pulse of "1Hn (r high J) level every time all bits Q1 to Q8 of the output of the ring counter RCT become t=-<r low, ) level. It is something.

When "H" of this synchronization signal SYN is taken into the ring counter RCT as data D, it is shifted by the clock signal φ as a shift signal, so that the outputs Q1 to
Scanning signals S1 to S8 are sequentially outputted to Q8.

Then, these scanning signals S1 to S8 are
The outputs of the OR gates OG1 to OG8 are supplied to the other input terminals of the AND gates AG1 to AG8, respectively.

The signal obtained from the output side of the AND gates AG1 to AG8 is a parallel key data signal indicating which key switch among the key switches KS has been closed, in other words, which key has been pressed. The key data signal in parallel form is on the one hand an OR gate ω.

The key data KDT is converted into serial key data KDT, and is then latched by the latch circuit LAT.

In order to control the latch operation of the latch circuit LAT, a normally open hold switch H5W and an inverter IV1T (
trigger) - flip-flop TF and resistor tA"9.Rl
A circuit including o is provided.

■ Voltage at one end.

The other end of the resistor R9 to which is applied is connected to the input terminal of the inverter IV and one contact of the hold switch H5W, and the resistor R1° is connected between the other contact of the hold switch H3W and the ground point. has been done.

Therefore, the T-flip-flop TF, which receives the output of the inverter IV at the trigger input terminal T, has an output Q of "L" in the initial state where the hold switch H3W is not pressed once, and when the switch H3W is pressed once and released. and output Q='
It becomes "H", and when the switch H3W is pressed and released again, it operates so that the output Q becomes "LSI".

The output Q of the T-flip-flop TF is the latch command signal L
CN is supplied to the latch circuit LAT, and the latch circuit L
The AT latches the key data signal every time this Shinfu LCN goes to the "°H" level.

To explain the overall operation of the circuit shown in FIG. 3, first, an initial clock signal IC is generated (this is generated, for example, when the power is turned on), and this signal
by ring counter RCT.

The latch circuit LAT and the T-flip-flop (2) are reset or cleared.

Therefore, in this state, all bits Q□~q of the output of the ring counter RCT are at the °゛L゛L゛ level, and the latch circuit L
All bits of the output of AT also take the "L" level, and the output Q of the T-flip-flop TF also takes the "L" level.

Then, since the outputs Q1 to Q8 = "L'°, NOR
A synchronizing pulse SYN is generated from the gate NOG and supplied to the input end of the ring counter RCT, and the ring counter RCT takes in the synchronizing pulse SYN in synchronization with the positive progression of the clock signal φ, as shown in FIG. , thereafter, this manual pulse is sequentially shifted to generate scanning signals S1 to S8.
is generated for one cycle.

When the scanning signal in one cycle has been outputted, the synchronizing pulse SYN is generated again, so that the ring counter RCT cyclically generates the scanning signals S1 to S8.

Now, assuming that none of the key switches KS is closed, O in the OR gates OG1 to OG8
Since the R condition is not satisfied, AND gates A01 to AG8
The entire output (that is, the parallel key data signal) is at the "L" level, and the serial time-sharing key data signal KDT also does not contain any "H" level pulses.

On the other hand, if any key switch, for example, the key switch corresponding to the C□ key, is closed, the output of the corresponding OR gate OG1 becomes 64H", and the AND gate AG1 outputs the output of the ring counter Q□ The output becomes "H" at the timing when becomes "H".

In this way, the keystroke status of each key switch is detected,
A parallel key data signal indicating the state of the keystroke is obtained.

This parallel format key data signal is converted to a serial format signal KDT and supplied to the display section (Fig. 5), while being supplied in parallel format to the latch circuit LAT. By pressing and releasing the key twice, the key data signal is latched in the latch circuit LAT, and the keying state is stored.

Once the key data signal is latched in the launch circuit LAT, the OR gate remains open even after the key switch KS is no longer pressed.
The input side of G1 to OG8 will have a signal state according to the previous keystroke state, so for example, C1
A key data signal is obtained indicating the closure of a key switch corresponding to the key.

Note that to release the latched state, the hold switch H3W may be pressed and released one more time.

FIG. 4 shows a specific example of the first slave unit switch circuit 20-1, where KS1 is C0. Key switches corresponding to the eight keys of C0#...G1, respectively, and RCT1 are ring counters for generating scanning signals.

The ring counter RCTl is the ring counter RCT described above.
Similarly, outputs Q1 to Q8 as scanning signals are generated based on the initial clock signal C1 clock signal φ and the synchronization signal SYN, and this output Q1
.about.Q8 are supplied in parallel to the fixed contact side of each key switch KS1 via backflow prevention diodes D1 to D8, respectively.

The movable contact side of the key switch KSI is grounded via a common resistor RC2, and from the commonly connected movable contact side,
A time-sharing key data signal KDS1 in a serial format indicating the keying states of the eight keys of the first slave electronic musical instrument is generated.

This key data signal KDS is also sent to the display section (FIG. 5).

FIG. 5 shows a specific configuration of the display section.
It consists of

In the key press state display circuit 12, a key data selection switch device SSW is provided to appropriately select the key data signals KDT and KDSn to KDSn sent in series from the above-mentioned master unit and slave unit switch circuits, respectively. It is provided.

The serial key data signal SS selected by this switch device SSW is supplied to one input terminal of each of the eight AND gates included in the inversion βP, and the scanning signal is supplied to the other input terminal of each of these AND gates. S□ to S8 are respectively supplied.

As a result, the serial key data signal SS is converted from a serial format to a parallel format in the circuit SP, so that the circuit SP is called a serial-parallel conversion circuit.

Parallel outputs P1 to P8 (parallel key data signals) from the serial-parallel conversion circuit sp are supplied in parallel to the key press state display Ll = Ls via driver circuits DV, ~DV, each having a hold function. be done.

The driver circuits DV1 to Dv8 have the same configuration, and the configuration of DV1 is shown as a representative example.

Here, the driver circuit DV includes an integrating circuit including a resistor R11 and a capacitor C1□ whose time constant is determined to be sufficient to secure information retention time equivalent to at least one scanning cycle, and from this integrating circuit The integrated output of is applied to the base of driver transistor Q11.

A voltage ■ is applied to the collector of the transistor Qll through a load resistor R21.

is applied, and an indicator made of a light emitting diode is connected to the emitter.

- Taking as an example the case where the C1 key is in the pressed state, the output pulse P is input from the serial-parallel conversion circuit sp to the driver circuit DV at the timing of the scanning pulse S1.

This pulse input is held for a period corresponding to at least one scanning cycle by the action of the integrating circuit R,,,C,1, so that during this period, the transistor Q11 is substantially conductive, and the display L1 is turned on. Drive the lighting.

In the same manner as described above, driver circuits DV2 to D
(2) 8 can also drive the corresponding display L-1 to light up.

Therefore, by visually observing the displays L□ to L8, it is possible to easily determine which key is being pressed on the base unit or each slave unit.

On the other hand, in the correct/incorrect keystroke display circuit 14, the slave key data signals KDS□ to KDSn are
A comparison circuit COM is provided which compares the respective keys to determine whether or not the same key has been pressed, and generates a comparison output indicating the respective determination results.

This comparison circuit COM has a number of exclusive ORs equal to the number of slave devices.
A base machine key data signal KDT is supplied to one input terminal of each of these exclusive OR gates, and slave machine key data signals KDS1 to KDSn are supplied to the other input terminal of each of these exclusive OR gates.

The comparison outputs □ to Kn consist of the outputs of such exclusive OR gates.

When the same note name is pressed on the master unit and a certain slave unit, both of the two exclusive OR gates corresponding to the slave unit take the “H” level, so this exclusion causes the ρR agate output to be “L”.゛Level.

On the other hand, if the same key is not pressed between the parent and child devices, the output of the exclusive OR gate becomes "H" level.

In this way, it is determined for each child device whether the keystroke operation matches that of the parent device or not, and 1 to Kn are sent to the erroneous keystroke indicator circuit 14A as a comparison output indicating the determination result. , on the other hand, are respectively supplied to the correct keystroke display circuit 14B.

The erroneous key press indicator circuit 14A is composed of driver circuits BDV1 to BDVn provided corresponding to the number of handsets that receive the comparison output from the comparison circuit COM, and light emitting diodes driven by these driver circuits. It is equipped with displays BLi to BLn.

The driver circuits BDV, ~BDVn have the same configuration and operate in the same manner as the driver circuit DV1 described above, and have the function of extending and holding instantaneous information, and when the comparison output indicates the existence of an erroneously pressed key, The display device corresponding to the corresponding slave unit is configured to be driven to light up by the corresponding driver circuit that receives the “H゛°° level input.

Therefore, by looking at the displays BL1 to BLn, it is possible to easily know in which handset the wrong key was pressed.

In addition, the correct keystroke display device 14B has inverters IV1 to IVn provided corresponding to the number of handsets to receive the comparison output from the comparison circuit COM, and receives the outputs of these inverters at one input terminal, respectively. AND gates A0□1 to AG1n which receive handset key data signals KDS1 to KDSn at the other input terminals, and these AN
Driver circuit GDV that receives the output of each D gate
□~GDVn and a normal keystroke indicator GL consisting of light emitting diodes driven by these driver circuits, respectively.
1 to GLn.

AND gates AG11 to AG1n are provided so that the main unit key data KDT does not take the level < 44W9 and is displayed in a state where no keys are pressed on any of the slave units.
, ~GLn are not driven to turn on.

The driver circuits GDV1 to GDVn have the same configuration and operate in the same way as the driver circuit DV□ described above, and have the function of extending and holding instantaneous status information, and when the comparison output indicates the presence of a correctly pressed key, The display corresponding to the handset on which the key has been pressed is driven to turn on by the corresponding driver circuit that receives the 44H99 level input.

Therefore, by looking at the displays GL, 1 to GLn, it is possible to easily know which handset the key was pressed correctly.

As is clear from the detailed explanation above, according to this invention, the keystroke status of the base unit is stored as necessary, and the correct and incorrect keystrokes are displayed based on the stored data. As a teacher, this is convenient because you can concentrate on your actual research activities without being bothered by key operations, and group performance lessons between the teacher and a large number of students can be carried out smoothly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a keystroke display device of a group performance training device according to an embodiment of the invention, and FIG. 3 is a circuit diagram showing details of the master key switch circuit in the display device of FIG. 1, and FIG. 4 is a time chart showing the timing relationship of the first slave key switch in the display device of FIG. 1. Circuit diagram showing details of the circuit, No. 5
1. The figure is a circuit diagram showing details of the display section in the display device of FIG. 1. RCT, RCTl...Ring counter for scanning signal generation, LAT...Latch circuit for storing key press state, COM...Key data comparison circuit, 14...
・Correct or incorrect keystroke display circuit.

Claims (1)

[Scope of utility model registration request] (a) The keystrokes of the first group of keys are detected by detecting the keystrokes of the first group of keys on the base electronic musical instrument and the second group of keys on the child electronic musical instrument, respectively. (b) a key press state detection circuit that generates a first key data signal indicating a state and a second key data signal indicating a key press state of the second group of keys; and (b) the first and second key data. a comparison circuit that compares signals to determine whether or not keys with the same pitch name are pressed, and generates a comparison output indicating the determination result;
(C) storing the first key data signal in response to a storage command in a keystroke display device of a group performance training device including a display circuit that displays correct keystrokes or incorrect keystrokes based on the comparison output; 1. A keystroke display device, comprising a storage circuit, and the comparison and the display operation of the comparison result are performed based on the stored key data signal.