JPS6095635A - Timer interruption processing method in microcomputer - Google Patents

Abstract

PURPOSE:To generate a timer interruption at an exact time interval by generating a timer interruption when a counter for counting a pulse of a constant period has overflowed. CONSTITUTION:A clock pulse outputted at a prescribed time interval from a pulse generating means A is counted by a pulse counting means B, and when this pulse counting means B is brought to increment to zero from the maximum count number, unless an external interruption is applied to a timer interruption generating means C, a timer interruption is generated immediately, and if the external interruption is applied, the timer interruption is generated when its external interruption is ended. An initial value calculating means E reads out a count value in that case, transfers it to an initial value setting means F, and corrects a count value of the pulse count means B. Accordingly, even in case the timer interruption is delayed, a delay time portion is corrected, and the timer interruption can be generated at an exact time interval.

Description

[Detailed Description of the Invention] This invention relates to a microcomputer (hereinafter referred to as a "microcomputer").
This invention relates to a timer interrupt processing method in

Generally, printers, copiers, personal computers,
Microcomputers are used as control units for various systems such as floppy disk devices.

Conventionally, such a microcontroller generates a timer interrupt when a counter overflows from a set initial value with pulses of a constant period, and also generates a timer interrupt when the timer interrupt occurs during an external interrupt. There are some devices that perform timer interrupt processing after finishing external interrupt processing (for example, Intel's MC3).
-48 Family Reef.

In this microcontroller, if a timer interrupt occurs during external interrupt processing, the external interrupt processing takes priority.
The initial value of the counter set in the timer interrupt process is slow, and the timer interrupt cycle is short.

By the way, 1. For example, when controlling a printer, a signal from an encoder generated in synchronization with the rotation of a spacer motor that drives a carriage, a selection motor that drives a type wheel, etc. is input to an external interrupt to control the motor speed. At the same time, a timer interrupt is generated at regular intervals, and the number of occurrences of the timer interrupt is counted, and the number of occurrences of the timer interrupt is counted and the number of times the timer interrupt is generated is determined at regular intervals. There may be cases where

In this case, for example, carriage return and line fee 1
-Or, selection, ribbon fee 1-, and wheel shift I- may conflict in operation.

However, at this time, even if a timer interrupt occurs during external interrupt processing, the microcontroller waits for the end of the external interrupt before processing the timer interrupt. The occurrence of is delayed.

As a result, the output of the drive pulse is also delayed, causing a problem that time sequence control with corrective correction 1 cannot be performed.

This invention has been made in view of the above points, and it is an object of this invention to enable timer interrupts to be generated at accurate time intervals in a microcomputer such as a dual-unit microcomputer.

Lecture "J pet" 4 yen Hereinafter, the configuration of the present invention will be explained based on one embodiment.

. First, a timer interrupt processing method according to the present invention will be briefly explained with reference to FIG.

This microcomputer counts the tarok pulses outputted from the pulse generating means Δ at fixed time intervals using the pulse counting means B, and when the pulse count means B is incremented from the maximum force run 1 to the maximum force run number to zero, That is, when an overflow occurs, the timer interrupt generating means C immediately generates a timer interrupt if no external interrupt is applied, and if an external interrupt is applied, generates a timer interrupt when the external interrupt ends. .

When the timer interrupt generation means C generates a timer interrupt, the timer interrupt processing means performs a predetermined timer interrupt processing 1, for example, various drive controls of a printer, and when the processing is completed, the initial value calculation means E Communicate the purpose.

Thereby, the initial value calculation means E reads out the value to the current pulse run 1 of the pulse run 1 and the run 1 of the means B.

Based on this count value, a deviation value from the initial value or a predetermined initial value is calculated and transferred to the initial value setting means F.

The initial value setting means F sets the initial value transferred from the initial value calculating means E as it is, or sets an initial value obtained by adding a deviation value to a predetermined initial value in the pulse counting means B.

In this way, when setting the initial value of the pulse counting means B, the current value of the pulse counting means B is
Correct and set the initial value according to the value.

Therefore, even if the timer interrupt processing is delayed due to a timer interrupt occurring during external interrupt processing, the timer interrupt processing is delayed by the amount corresponding to the 9 hours of delay]υj
Since the value is set, timer interrupts can be generated at regular time intervals.

FIG. 2 and FIG. 6 are a perspective view showing the external appearance of a type wheel type Invakl-printer embodying the present invention, and an exploded perspective view of the outer casing thereof.

The outer casing of this printer includes a main body case 1 that houses a printing mechanism and a printing control section, a cover 2, and a cover plate.

1 is a plan view showing the printing Pa IW section of this printer.

In this printing groove section, first, a platen 11 for winding and feeding paper to be printed on a frame 10 is rotatably attached.

This platen 11 is driven by a paper feed motor (line foot motor) 121C fixed to the frame t110 through a gear train 1! 2 and feeds the white paper.

Further, the platen 11 has horns 14 and 15 fixed to both ends thereof, and can be manually rotated by turning the knobs 14 and 15 when loading or removing paper.

In addition, in front of this single platen, there is provided a paper presser 17 in which two rollers 16 and 16 for pressing the paper against the surface are rotatably inserted, and on that day, the paper presser 17 is brought into pressure contact with the rollers 1G and 1G. There is.

A carriage 21 is mounted on the rod 18 and the stay 1S fixed to the frame 10 so as to be movable in parallel in the axial direction of the platen 11.

This carriage 21 includes a cassette I-wheel 22 in which a type wheel 26 is housed in a case 24, and
It is equipped with a printing hammer 25 that hits the type wheel 23, a selection motor 26 that rotates the type wheel 26, an encoder (selection sensor) 27 that detects the rotational position of the selection motor 26, and the details thereof will be described later. do.

This carriage 21 is equipped with an encoder (space sensor) that is attached to the frame 10 and detects the rotational position.
29 is attached to the motor (space motor) 28, the four pulleys 61 to 3 are fixed to the rotating shaft thereof, and are rotatably fixed to the mink pulley 60 and the frame 10.
4 and is moved via a space wire 65 fixed to the lower part of the carriage 21.

dTf of the cassette wheel 22 in this printing mechanism section
, lll will be explained with reference to FIGS. 5 to 7.

This cassette 1-wheel 22 is the 5121st and the 6th wheel.
As shown in the figure, a type wheel 2B is housed in a cassette 1-case 24 made of an opaque material.

As shown in FIGS. 5 to 7, the type wheel 26 has a central boss portion 41 formed with front teeth 40 that meet the front teeth of a selection motor 26 (described later) on the back side, and a number of spokes 42 radially arranged thereon. The spokes 42 have printed characters 46 at their tips.

As shown in FIG. 7, on the peripheral surface of the central boss portion 41 of the type wheel 2 on the platen side (front side), there is a mark 45 made of a reflective plate on the same circumference as a home position identification mark. and a mark 4S made of a reflective plate for wheel type identification fM (=1).

Note that the mark 45 is closer to the type wheel 23 than the mark 46.
The width in the rotational direction is wide, and the distance between the marks 45 and 46 is predetermined depending on the type of type wheel.

On the other hand, as shown in FIG.
A notch 24 is formed corresponding to the radial position.

Next, details of the carriage 21 in this printing mechanism section will be explained with reference to FIGS. 8 to 10.

Note that in each of these figures, some parts are omitted for the sake of illustrating only one figure.

First, as shown in FIG. 10, the support frame 51 for the cassette 1 of the carriage 21 has a cylindrical bearing part 52 through which the rod 18 passes, and a frame part S6 extending from the bearing part 52.
It consists of

The frame portion 53 of the cassette support frame 1151 is provided with threaded holes 53a on both sides of the middle, and the screw holes 5a are inserted into the force cellar 1-boil 22 (see Fig. 5). (See) Force cellar 1-holder 54 for loading
I stopped it and removed it.

Further, this frame portion 53 is provided with another screw hole 561) slightly above each of the screw holes 5Oa, and the hammer bracket 55 is attached to the screw hole 5B with a screw. KJ, hit the type 46 on type wheel 2 (print hammer 25 is attached).

On the other hand, as shown in FIGS. 8 and 9, the bearing portion 52 of the cassette support frame 51 is provided with a hook 52b approximately in the center for fixing the space wire 35, and a hook 52b made of resin is formed at both ends. The caps 56 are fitted on the carrier frame 115.
The lower end of 7 on the 01j side is placed.

This carrier frame 57 consists of a corner frame 58, a side frame 5B, and a rear frame 60, and the stay 19 is placed on the rear frame 60 and the stay 19 is placed on the rear frame 60.
A roller 61 that rolls on S is rotatably attached.

Furthermore, on the 5th day of the side frame of the carrier frame 57,
Each has an arcuate hole 59 centered on the rod 18 at the front and upper side.
The circular arc hole 59a, the through hole 53c drilled at the tip of the frame portion 53 of the cassette support frame 51, and the connecting holes 63a drilled on both sides of the motor bracket 6B.
are connected by one connecting shaft 64.

The motor bracket 63 is integrally formed with an arm 65 extending rearward from one side, and an engagement pin 66 is implanted on the outside of the tip of the arm 6S. The circular arc hole 59 of the side frame 5S.
It engages with a long hole 59b that is straightly bored in the horizontal direction slightly rearward of the hole 59b.

In this way, the motor bracket l-63 is suspended from the carrier frame 57 by the connecting shaft 64 and the engagement pin 66, and
The platen 1 is guided through the circular arc hole 59a and the long hole 5Sb.
It is mounted so that it can move in a direction perpendicular to 1.

Then, as shown in FIG. 8, one end of a toggle spring 69, which is hung on a pin 68 whose other end is fixed to the carrier frame 57, is hung on both ends of the connecting shaft 54, and the motor bracket 1 is attached.
66 can be pressed against either the front or rear of the circular arc hole 59a and the elongated hole 59b. Note that FIGS. 8 and 9 show a state in which it is pressed forward.

The motor bracket 1-66 is provided with a plurality of holes 63b, and the selection motor 26, which includes the selection sensor 27, is screwed into the motor bracket 1-66.

A crown gear 71 is fixed to the tip of the rotating shaft 26a of the selection motor 26, and the motor bracket 1-63
When located in the front (the state shown in FIGS. 8 and 9), its crown gear 71 meshes with the crown surface 41 of the type wheel 2.

Further, as shown in FIG. 10, two mounting holes 59C are provided in front of the frame 5 on both sides of the carrier frame 57, respectively.
59d, and the front frame 72 (
(not shown in Fig. 8) is attached.

In front of this front frame 72, there is a type wheel 2.
As shown in FIG. 11, a sensor (wheel sensor) 75 is attached to the first reflective wheel consisting of a light-emitting element 73 and a light-receiving element 74. .

In addition, a cassette 24 is provided in front of the front frame 22.
A leaf spring 76 that urges the inner type wheel 23 toward the selection motor 26 side and a card holder 77 are attached. In addition, in FIG. 8, P is paper, and in FIGS. 8 and 9, R is an ink ribbon.

When the carriage 21 configured in this manner is in the state shown in FIG.
, are connected to the type wheel 2, so that the desired type can be selected by rotating the type wheel 23 and printed on the paper P by striking it with the printing hammer 25.

From the printing state shown in FIG.
2, as shown in FIG. 1-63 is moved back and the distance from lot 18 to the crown surface 41 of type wheel 273 and lot 1-63 are calculated.
The connection between the type wheel 23 and the selection motor 26 is released depending on the lever ratio of the distance from 8 to the connection shaft 64.

At this time, the cassette 1-support frame 51 falls backward around the rod 18 by the force of the 1-glue 69, and the upper part of the cassette boulder 54 separates from the platen 11, allowing the cassette 1 to wheel 22 to be replaced. .

FIG. 13 is a block diagram showing the control section of this printer.

The printer control circuit 80 of this control unit controls the entire printer, and includes a CIIU (central processing unit),
Program memory (ROM), data memory (RAM)
and ■10 (input/output device) two microcomputers 8 consisting of a cap.
1.82, I10 baud 1-83.84, 1/4 frequency divider 85.86, etc.

The microcontroller 81.82 is Intel's r8048
J, and I10 boat 8 and 84 are the company's r82
I am using L 2J.

The microcomputer 81.82 then inputs a pulse obtained by dividing the clock pulse from the address latch strobe cycle clock terminal ALE by a ]/4 frequency divider 85.86 to the Nast terminal TI.

The microcomputers 81 and 82 also receive print character data, spaces (carriage movement) from a host system such as a computer or word processor that is input to the printer control circuit 80 via a printer interface circuit 87 consisting of a blockrammable communication interface or the like. !IIIJ f) data, line feed data, and other various data.

The signals are input to the input/output port 1 (PL) via the ■/○ ports 83 and 84 or the I10 ports 1-86, respectively.

Then, based on the processing results of the various input data, the microcomputer 81 generates a new line (because of the line feed force).
A drive pulse DL is output from the baud h2 (P2) to the drive circuit SO to drive and control the line foot motor 12 to rotate the platen 11 and feed the paper.

The microcomputer 81 also drives the space motor 28 from the board 1-2 in order to designate the print position based on the processing results of various data and the position signal PA input from the space sensor 29 to the external interrupt terminal INT. Drive signal 1) Command speed data VDC that commands the speed of RV C, space motor 28, and rotation direction signal DIR that designates the rotation direction of space motor 28
C is output to the space servo drive circuit 91, the space motor 28 is moved to rotation 11, and the carriage 21 is moved by the required amount in a predetermined direction.

On the other hand, the microcomputer 82 outputs the live pulse DH from the boat 2 to the drive circuit 9B to drive the hammer net S4 of the printing hammer 25 for the IJ character.
Control I and have the hammer 95 hit the type on type wheel 2.

In addition, in order to feed the ink ribbon, the microcomputer 82 outputs drive pulses DR from baud 1 to 2 to the drive circuit S6, and controls the ribbon foot motor 97 (not shown in FIG. 4) by 1 rA to send the ink ribbon. Send ribbon 98.

Further, the microcomputer 82 generates a drive signal DRVS for instructing the selection motor 26 to drive for character selection based on the print character data and the position signal PB input from the selection sensor 27 to the external interrupt terminal INT. The command speed data VDAS, which commands the speed of The printer is rotated by the required amount in the direction to bring the required type into a position where it is struck by the printing hammer 25.

Furthermore, the microcomputer 82 determines the type of the wheel 23 based on the Hall pulse PH from the wheel sensor 75 input to the boat 1.

Next, the [804°8] manufactured by Intel Corporation and used by Tagawa as one of these microcontrollers 81.82 will be briefly explained.

First, the block configuration of this microcomputer is shown in FIG. 14, its f(0M blockram memory map is shown in FIG. 15, and the same <RAM data memory map is shown in FIG. 16.

The following 30 cases (addresses) are specially allocated in the program memory.

(1) Address 0: Reset 1 - If you add human power, Procla 1
Address 0 is assigned as the 1 starting address.

(2) Address 3: When an interrupt is generated by external interrupt (INT) request No. 111, program b from address 3 is executed in the previous article 1'1.

(3) Address 7: When an internal interrupt occurs due to a timer/counter overflow, the block from address 7 is executed as a precondition.

Next, the data memory is configured as follows.

(1) Addresses O to 7: Designated as working registers O to 7 (RO to 7) by the SEL RBO instruction, and can be directly addressed. This register group is called Punk 0. All addresses in the data memory are specified by the RAIv1 pointer. It can be specified indirectly by register RO or R1.

(2) Used as an 8-level blockram counter stack where addresses 8 to 23 = address - 2 words. Stuffer 1 Jerez is a brochure during a subroutine call.
The address is determined by the stack pointer of status word 1-' (PSW).

(3) 24~3Iffi ground: 0~ with SEL RBI command
They are designated as working registers 0 to 7 instead of address 7, allowing direct addressing. This register J
Ir is called bank 1 and is used in the interrupt subroutine. When specifying Punk 1, all addresses of data memory are
It can be specified indirectly by RAM pointer register RO' or 1'.

(4) Addresses 32 to 63: Normal RAM area.

(5) θ~255th address: 12. This is the A M area.

Next, the block graph 1 counter (1) c) and the block graph 1
Let's talk about counter stacks and blockrum status words.

The program counter is an independent counter, while the program counter is composed of several sets of registers 4 in the data memory.

As shown in Fig. 17, the block counter has a 12-hit configuration, of which 10 pips 1-Au-Δ9.
- is used to read 1024 words of internal program memory, and 2 bits of ΔlO+AB are used for external memory fetches. Initialized to zero.

The contents of this program counter are changed depending on the occurrence of an interrupt or a subroutine call.
Stack pointer So, S2. S3
The block diagram counter shown in FIG.
It is stored in one of eight register pairs on the stack (data memory addresses 8-23).

As shown in FIG. 19, the block counter stack includes program counters PC0 to PC.

and the 4 bits of the program status word.

Stack pointers S□, S2 . S3 is initially set to 1'0,0,
0'', indicating addresses 8 and 9 of the data memory.

Then, by the first subroutine call or internal interrupt, the current block rough counter is transferred to addresses 8 and 9 of the data memory.

The stack pointer then increments from 1 to (-1
-],), next subroutine call Z jiii
7- indicates addresses 10 and 11.

Also, the stack pointer is decremented by executing a return instruction (R1゛E or RTER).
), and the contents of the register column indicated by the stack pointer are transferred to the block graph 1 counter.

Next, let's talk about interrupts. The interrupt controller is the second
It is constructed as shown in Figure 0.

Interrupt (INT) input is ΔL for each machine sensor/r group.
When the E signal is detected, an interrupt is detected, and the cycle currently being executed is completed, and a subroutine is executed at location 3nv in the program memory.

The number of interrupt levels is 1, and once an interrupt is accepted, the next interrupt request will be enabled again by executing the RIETR instruction 117. It's invisible. This interrupt enable is
This is done to prevent the second cycle of the RETR command. The interrupt enable timing is the same for internal interrupts caused by timer overflow.

As can be seen from FIG. 20, when the interrupt in progress flip-flop circuit (FIi) is set, all subsequent interrupts are handled by the interrupt enable F of the chair, lt.
Regardless of the state of F, lock alert 1 is performed. In other words,
- When an interrupt request is accepted, processing of other interrupt requests is not started until the accepted interrupt processing is completed.

Next, the timer/counter is configured as shown in FIG.

The counter of this timer/counter is an 8-pin binary up counter that can be used for brissera 1-, and is MOV
E A, T (read timer counter) and MOVE
Contents can be exchanged with the achievator (ACC) using the T and A (load timer counter) instructions.

The contents of the counter are affected by the reset, M
OV ET, 'A command sets the initial value.

And the counter is S'l"RT 1' (star 1
-・As a timer with the timer J command, S T II T
With the CNT (star 1-counter) command, each of the counters starts counting from 1 to 1.

Once the counter reaches 1 star, ST 01)T
When the CN"r (run 1~stop) command is issued, count 1 until it is stopped by Sera 1-. Increment l-(+1) until the maximum count!-number (FF II).
') and overflows in OOII.

This α large count 1-number (F F II ) is ldiA-
When the flow (OOn) occurs, the overflow fluff F l? is set, a C1 interrupt request is generated.

For other detailed explanations of this microcomputer R8048J, please refer to the [My') Computer User's Manual MC5-48J published by Intel Japan Co., Ltd.
I leave it to you.

Next, we will discuss the operation of the actual IN example configured in this way in the second section.
This will be explained with reference to Figure 2 and subsequent figures.

First, with reference to FIG. 22, an outline of the printer system a-11 executed by the printer controller 1-roll circuit 80 will be explained.

The printer controller I/roll circuit 8o performs a restore operation upon power-on, and then performs a wheel type determination operation to determine the type of type wheel 26 and the position of the hoe 11.

Thereafter, data from the printer interface circuit 87 is received, and if the data is print character data, the selection motor 26 is driven to move the type wheel 26.
is rotated to select desired characters (selection operation), drive the print hammer 25, and perform a printing operation to feed the ink ribbon S8.

Also, if the data is for the carriage moving claw (space), the space motor 28 is driven to move the carriage 28.
is moved to a required position, and if the data is a line feed (line feed), a line feed motor 12 is driven to rotate the platen 11.

Next, the wheel discrimination operation will be explained with reference to FIGS. 23 and 24.

First, to explain the abbreviations shown in each figure, step
The error step SES is the rotation amount of the selection motor 2 when one step is the amount of rotation at which one position signal PB necessary for searching the home position of the type wheel 23 is generated.
The number of steps has been revised to be greater than the number of steps required for one rotation of the type wheel 23 plus the number of steps corresponding to the width of the home position identification mark 45.

The step/stop/step SSS is the number of steps of the selection motor 26 from the mark 45 to the type E until the eel 26 is stopped at f'7, and is set to a number of steps greater than the maximum allowable interval between the mark 4S and the mark 46. are doing.

Count 1 Naokawa is the number of steps for determining whether the home pulse PH is a Bohr (vertical pulse PHM), and the pulse width of the Ho 11 pulse PH corresponding to mark 45 is the step number MII, The pulse width of the home pulse P H corresponding to the mark 46 is determined by the number of steps MD (MD
<When Mlln, Mll≧Ill> Set so that the condition of MD is satisfied. Here, 1r1-M f-
It is set to I.

In FIGS. 23 and 24, ST[E[' l,
Step error step SES in counter CNTl
Set the counter CNT2 and counter CNT3 to reset 1 ("o
).

Then, at 5TEP 3 to 5, the selection motor 26
1-step rotational drive is started, and it is determined whether or not a predetermined time has elapsed since the start of the drive. When the predetermined time has elapsed, an error process is performed as a selection error. If the predetermined time has not elapsed, the position signal PB ( Determine whether the pulse (pulse) was made manually or by a cup.

Then, when a pulse is input within a predetermined time, S
At 1'EP6, the counter CNTl is decremented by 1-(-
1) At L, it is determined in S1'EI37 whether or not the home pulse PH is input.

If this judgment result or home position Lus PH is present, 5TE
Increment counter CNT2 at P 8 (+1)
After that, proceed to 5TEP], O, and then t) Pulse I
) I (If there is no counter CN at 5TIEP9
After resetting T2, proceed to 5TIEP 11.

Then, at 5TEP 10, it is determined whether or not the count value n1 of the counter CN T 2 is greater than or equal to the predetermined count value n1.
12 and enters the home position and wheel type discrimination operation, and if the count value I11 or more falls, ST
l: Pll determines whether the counter CNT is 1 or 0'', that is, the type wheel 23 is set to step error step SE.
Check whether it has rotated by S minutes, and if it is 0', enter the error processing routine, and if it is not "o", proceed to 5TEP.
Return to 3.

That is, here, the pulse width of the home pulse P H is counted and it is determined whether the home pulse pH is the home position pulse P LI M corresponding to the mark 45 or not.

Next, when the 5TEP 10 counter CN'r 2's 1-value is between 1 and 2 and the home position pulse P I-I M can be detected,
5TIEP I 2 steps the counter CNT1.
Set stop step SSS to Sera 1.

After Sono, S1'EP] 3-15 Te, S1'[EP
3-5 Process step 1i71rn, rotate the selection motor 26 by 1 step, and increase the counter CN Tl +-<-1) at 5TEP16.
At step 17, when the home position jα pulse PHM is detected, it is determined whether the flag F is set to F20 or not.

If this determination result is not F=O, ST[EP
Jump to 21, ) 720 is S1'EP I
After incrementing the counter CNT3 by l-(+1) at step 8, check whether the home pulse IBM is input at 5TE131.9, and if there is no Baum pulse PM, return to 5TIEI)l and return to home pulse l)
If M exists, I set the flag F (make it "l").

Then, check whether the counter CNTl has become O'' in Sl'lmiP21, and if it is not 0'', 5 TEP
Returning to step 13, the rotation operation for the next one step is started.

That is, here, after detecting the wheel position pulse PHM, the type wheel 26 is moved by a predetermined number of steps r.
It is determined whether the type wheel has rotated by I or is distorted, and when the type wheel has rotated by the number of steps n, that position is set as the home position of the type wheel 23.

After that, in S1'EP22, the count value of the counter CN T 3 is referred to, and the type wheel 26 is determined according to the interval between the home position mark 45 and the wheel type mark 46.
The type of space is determined, and the space pitch is set according to the result of this determination, and the process ends.

Next, the timing of printing operation and carriage return will be explained with reference to FIG. 25.

First, at time [1 in FIG. 25], in order to select the printed character corresponding to the printed character take, the microcomputer 82 sends the drive signal D I't V S shown in FIG.
DC8 and rotational direction signals L) and RS are outputted to the selection servo drive circuit 99 to rotate the type wheel 2 in a predetermined direction.

Then, at time t3, when a predetermined selection elbow time SLB shown in FIG. 3(B) has elapsed from time t2 when the type selection is completed, the microcomputer 82 sends the hammer drive pulse I)H shown in FIG. At the same time, the ribbon drive pulse DR shown in FIG.
Start feeding 8.

Thereafter, the microcomputer 81 prints at a time t4 after printing is completed.
Then, the drive signal D RV C, commanded speed take VDAC and rotational direction in number DIRC shown in FIG.
Move to the next print position.

On the other hand, at time t5, when a predetermined hammer busy time HM B shown in FIG. Furthermore, the ribbon feeding ends at a predetermined time point t6.

Then, if the space has not ended at the time L7 when this selection ends, the time when the space ends [
8 to the predetermined space busy time SP shown in the figure (to)
At time t9 when B has elapsed, the microcomputer 82 activates the printing hammer 25.
Start driving.

After that, if the next space is the gear carriage return at time t to, the microcomputer 81 controls the carriage 21.
At the same time, the output of the line feed drive pulse DI- shown in FIG.

Note that the ribbon foot drive pulse DR and line feed drive pulse DL are actually output at predetermined time intervals, or are shown continuously in FIG. 25 to indicate that they are being driven.

Further, the microcomputer 81 controls the speed of the space motor 2B to be changed in accordance with the distance m1 between the current position of the carriage 21 and the 1'' target position (space operation +1i).

Similarly, the microcomputer 82 performs a selection operation (i: If
, 'r indicates the current position of the type wheel 26 and 1' target position 1i.
j) Control is performed to change the speed of the selection motor 26 according to which distance mf.

In this way, the microcomputers 81 and 82 of the printer controller 1-roll circuit 80 perform various controls.

In this case, the microcontroller 81.82 is in the main routine,
As shown in No. 260, the internal timer (timer/counter) is set to 1, the take is set to t, and an operation corresponding to the take is started.

Further, in the evening 17 interrupt routine, the microcomputers 81 and 82 perform timer interrupt start processing, which will be described later, as shown in FIG.

In the drive and busy control processing, the number of overflows of the timer is counted, and the drive pulse DR for ribbon feeding described above is output at a predetermined time interval, and the drive pulse DL for line foot is output at a predetermined time interval. (See Figure 25).

Also, in the same way, when driving selection.

Space drive 11S turns busy off when each busy time (SLB, HMB, 5PB) elapses during hammer 1 live, ribbon 1 live, and line foot drive (see Figure 25).

Furthermore, in the same way, when driving selection.

A position signal is input within a predetermined time during space drive.
When I didn't, a selection error (see Figure 23) occurred.
A space error occurs.

In addition, the microcontroller 81.82 has an external interrupt routine.
As shown in FIG. 28, the speed of the servo motor is controlled. In this process, selection sensor 2G
, the position signal 1] from the space sensor 29, Δ, PB, and change the speed every predetermined number of times.

In this way, the microcomputers 81 and 82 perform various types of 1-live, bi-r control using timer interrupts, and control the speed of the servo motor using external interrupts.

In this case, as mentioned above, for example, carriage return control and line foot control, or selection control and ribbon fee control may conflict (No. 25).
121). In other words, space sensor 29. Selection Sen → No 26 r? 1 digit 117I “signal PA, P
External interrupt processing (7-1 speed control) by I3 and timer interrupt processing (1-live, HISHII control) may conflict with each other.

However, as mentioned above, in the R3048J, which uses a microcomputer 81.82 and 1.14, when an external interrupt and a timer interrupt conflict, the C1 interrupt is required and 1 (received).
The other process cannot be started until the other process is finished.

Therefore, if left as is, the time interval between timer interrupts will be extended, and external interrupt processing will be delayed. Therefore, the timer interrupt start process and timer interrupt end process shown in FIG. 27 are performed.

FIG. 29 is a flow diagram showing this timer interrupt start processing and timer interrupt end processing.

First, to explain the part that enables external interrupt processing during timer interrupt processing, the timer interrupt routine (T
INT) and enters the timer interrupt start process shown in FIG. 27. Referring also to FIG. 30 and FIG. 3 and R again.
Change the values of AM pointer registers RO and R1 to normal RA!
14 area, 5AVEO,].

Since the bank switch BS=0 is used even during timer processing, the accumulator AC in the main routine is
c, RAM pointer register RO.

This is to protect the value L of R1.

and the current stack pointer S,,S,.

The start address (T, ]MP O) for timer processing (1-live, busy control) is stored in the register (data memory) of the program counter stack indicated by S3.
Execute step 1.

By doing so, the block counter/stutter PC
8-1) Start of timer processing indicated by S. Jumps to 71-Res (T JMI) O), so timer processing 1-R, busy control is started.

At this time, is it already 1? ,■Σ']'R command is executed (C
Therefore, the interrupt progress '(jIf' Fl
' is reset, and it becomes possible to process external interrupts.

After the timer processing is finished, the 271st"4 timer interrupt jJ, g, B child processing is started, external interrupts are prohibited, and the accumulator ACC and RAM pointer registers used in the main routine are Yku0, R1
(7) 5AVE3. O, I to person/7 Row 1-
do.

After that, external interrupt and timer interrupt k fF −i'
After reading the count value and setting the timer value, which will be described later, the RETR command is executed.

This exits the timer interrupt processing routine and returns to the main routine.

Next, to explain this process in detail, first, the program counter (PC6 to PC11) immediately before the timer interrupt,
The stack pointer 5Irb2rS3 of the block status word (PSW) and the state of the bank switch BS, PCo~PCII-Xll,S,,S2. s3
=:ooo, BS=O.

When a timer interrupt occurs in this state, the program counter P Co-P Cn becomes (X+1)If, and the upper 4 pins 1- of the blockrum status word 1-I)SW and the blockrum counter PCg-PC++ at this time
is the stack pointer l'oo, as shown in FIG.
OJ (address 8 of data memory.

9), and the stack pointer is incremented to "001" h (+1).

Then, the timer interrupt routine (T I
NT) and start the accumulator AC as described above.
C and RAM pointer registers RO, R1 (7) values 5AVE3,0 . Store in I.

After that, the register of the program counter stack indicated by the current stack pointer ro01J, that is, the store 1 rear of the program counters PCo to PC++ at addresses 10 and 11 of the data memory, is set to the start address of the timer process. When (T, J~IPO) is stored and the stack pointer is incremented by h(+l), the stack pointer indicates [002J.

Then, disable timer interrupts and write R[E 71' R
When the instruction is executed, the stack pointer is transferred from ro02J to rooIJ by 1 to (-1).

Therefore, 1, brocrum counter p Co ~ ■) 31
The start address of timer processing indicated by 1 (I゛J M
)) Since the program jumps to O), timer interrupt processing is started, and at this time, since the RETR instruction is actually executed, it becomes possible to receive and process an external interrupt.

After the timer processing is completed, external interrupts are disabled, the values of RAM pointer registers RO and R1 are loaded into the accumulator from 5AVE3 and 0°1, respectively, and external interrupts and timer interrupts are enabled. Karan 1-
After reading the value and setting the timer value, RET
Execute R command.

By executing this RETR instruction, the stack pointer changes to r o (i) +-(-1, >
The program returns to the main routine.

In this way, if an external interrupt occurs during timer interrupt processing, the external interrupt can be received and processed.

Therefore, in order to perform the above-mentioned processing, it takes 20 bar + - to start the timer interrupt and 7 bar r1 to finish it, and external interrupts are prohibited only during this period. It is thought that there is almost no external interrupt processing during the week.

Next, a description will be given of the processing for making the timer interrupt occurrence interval accurate.

First, in this printer, as shown in FIG. 16, the microcontroller 81. ．． A signal obtained by frequency-dividing the signal at the JE terminal (I-) by 174, that is, a 10 μsec external clock pulse, is input to the terminal T1 and input to the counter shown in the WS21 diagram.

Also, G as a crystal for microcomputer 81 and '82.
Since M l-[Z is used, the microcomputer executes a one-person step in 2.5 μsec.

As mentioned above, the counter of the timer/counter (hereinafter referred to as "timer") (FIG. 21, 9, as shown in FIG. 31, υJ period value X1 (0011≦X≦F"
I ), the clock pulse is manually increased by 71 times σ.
I J KAIEJ r When 0QIIJ overflows, an interrupt occurs and the counter rolls.
'' is subtracted by IjL and incremented by l-(+1).

For example, if a timer interrupt is generated every I m5ec, then l m5ec/ l Oμ5ec = l OO, so the initial value X is X = 25 G + 1-100 = 157 (9D
[1] becomes.

Therefore, if this initial value r 9 D II J is preset, as shown in FIG.
7 interrupt occurs, and as mentioned above, address 7 (ADD7)
Starting from 1-, the next timer value is set at address A. At that point, 10 μsec has already elapsed, so at this point, r 9 L) It j is set, then the next timer interrupt is set to l+n5ec. It is 10 μsec longer.

Therefore, the initial value X from the second time onwards is 9 D n +
1 = 9 EIf and 9 can generate a timer interrupt every 1 m5ec.

However, while an external interrupt is in progress, timer interrupt processing cannot be started until that processing is completed.

Therefore, as shown in FIG. 36, the count value is r O
When OLI J is activated and a timer interrupt occurs, if an external interrupt is in progress, the time until the first timer interrupt occurs if the callan 1-value is rxllJL when the external interrupt processing is completed. is 1'Oμ5ecXx= L Oxμsec min 1m5e
Therefore, as shown in FIG. 29, when the timer interrupt ends, the counter starts running 1-( A process is performed in which a value of 1 (timer value) corresponding to the count 1 at that time is output to the counter of the timer.

That is, to explain using the above-mentioned example, as shown in FIG.
Karan 1 - value ro] IIJ) and the necessary place Jqj lf
i end (x II -1-I II <1) II'
,'j,+,'',j), "α11" (processing time/10 μsec) is required for reading the count value,
If we set the vJ 1tJI value at the end of the αlth period, then A is 9 D II + x II + I II + a
Set II as the initial value.

As a result, the time until the next timer interrupt occurs becomes r
9 DH x II + I II x αHJ, so the next timer interrupt occurs when 1 m5ec has elapsed since the previous interrupt occurred.

Therefore, timer interrupts can be generated at accurate time intervals.

FIG. 65 is a flow diagram showing the process flow of the microcomputer when the speed control of the servo motor and the drive (ribbon driver/r drive 9 control conflict), and a timing chart showing the state of the speed change of the servo motor.

Note that this diagram only shows the time point at which a timer interrupt occurs that requires the output of a drive pulse, and the time point at which an external interrupt that requires a speed change occurs; Furthermore, an external interrupt occurs every time the position signal P A or F B is input.

To explain this simply, after starting the 1-live (speed V3) of the servo motor with mail-chin, at time point [0,
When a timer interrupt occurs and ribbon drive pulse generation processing is being performed, if an external interrupt occurs at time t], the timer interrupt is interrupted, external interrupt processing is executed, and the speed is set to 1 and speed v2. After performing the deceleration process, the process returns to the suspended timer interrupt process, and when the timer interrupt process is completed, the process returns to the main routine.

From then on, when there is a conflict between an internal (timer) interrupt and an external interrupt, the external interrupt is executed with priority, and when there is only an internal interrupt, the internal interrupt is set to zero.For example, at time L2, the speed is set to 1; At time [3], the drive pulse output process is started, and at time E4, the motor is stopped. Then, the process returns to the drive pulse output process, and at time [5], the motor is confirmed to have stopped, and then At t6, drive pulse output processing is performed.

Incidentally, the motor II precision; 18 is performed by checking a signal different from the position signal output from the selection sensor 27 f when the motor is stopped.

In this way, the timer interrupt processing C also receives the evening interrupt, and the timer interrupts occur at accurate time intervals tx as described above.

In this way, when the microcomputer that makes up the control unit of this printer sets the initial value of the counter for generating a timer interrupt, it sets the initial value based on the count at that time. Even if an internal interrupt request occurs at any time, the internal interrupt can be generated at accurate time intervals.

By doing so, time sequence control of drive, busy, etc. can be performed accurately.

In addition, as in the example, by manipulating the stack pointer in internal interrupt processing, when an internal (timer) interrupt is originally being processed, the internal External interrupts can be received and processed even during interrupt processing.In addition, it is also possible to similarly enable internal interrupt processing during internal interrupt processing, internal interrupt processing during external interrupt processing, and external interrupt processing.

Further, the microcontroller implementing the present invention is not limited to the one of the above embodiments, but may also be used with other McS-48 families (8748) and (8041), for example.

(8741), (8021), (8035j.

(8039), and can also be implemented for other mark-cons.

In addition, when using a double type wheel in which type is formed double on the outer and inner peripheries as the type wheel of the printer, there is a shifter 1-1 that selects either the outer or inner periphery of the type wheel. However, shift drive control can be performed in the same manner as described above.

Furthermore, in Embodiment 2, an example was described in which the present invention was implemented in a microcomputer that constitutes a control unit of a printer, but the present invention is not limited to this, and the present invention is not limited to this. It can be applied to all microcontrollers used in

As explained above, according to the present invention, when a timer interrupt occurs while executing external interrupt processing, even if the microcontroller performs timer interrupt processing after the external interrupt processing is completed, , it is possible to generate timer interrupts at precise time intervals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram functionally showing an embodiment of the invention; FIGS. 2 and 3 are an external perspective view and an exploded perspective view of the outer casing of an example of a printer embodying the invention; FIG. FIG. 4 is a plan view showing an example of the printing mechanism, and FIGS. 5 and 6 are front views showing an example of the cassette 1 to boiler shown in FIG. 7 is a front view showing an example of the type wheel of FIG. 5; FIG. Figures 8 to 12 are a side view of the JLLi2O carriage, a side sectional view, an exploded perspective view, an enlarged view of the main parts, and a side view showing the state when replacing the cassette i. Figure 13 is the printer control. Block diagram showing parts, 1st
4V: 21 to 21 show the block 11 configuration diagram, block diagram memory map diagram, data memory map diagram, and block diagram 11 counter take (I~! configuration diagram), respectively, which serve to explain the microcomputer shown in FIG. Figure 22 is a data configuration diagram of a programmer status word, an explanatory diagram of a block counter stack, a block diagram of an interrupt logic, and a block diagram of a timer/counter. Flowchart 1 for explanation: FIGS. 23 and 24 are flowcharts showing an example of the Baume position and hole type discrimination operation executed by the microcomputer in FIG. 13; FIG. Timing charts 1 to 14, FIGS. 26, 27, and 28 showing examples of operation timing are shown at 4°C and 1st.
6 is a flowchart showing the main routine, timer interrupt routine and external interrupt routine of the microcomputer; FIG. 29 is a flowchart showing details of the timer interrupt start process and timer interrupt end process of FIG. FIG. 60 is a data memory map diagram for explaining FIG. 29, and FIGS. 31 to 64 are timing charts 1 and 1 for explaining the timer value setting process, respectively. FIG. 35 is a flowchart showing an example of the flow 4t of drive, busy processing, and motor speed control processing executed by the microcomputer in FIG.
It is a diagram. 11...Platen 21...Carriage 22...Cassette wheel 23...Type wheel 25...Printing hammer 26...Selection mode 928...Space motor 80...Printer controller 1-roll circuit 81.82...
・Microcomputer Fig. 2 Fig. 3... Fig. 4, Tsuj Fig. 5 Air treatment i/Fig. 26 Main routine flow Fig. 29

Claims (1)

[Scope of Claims] A timer interrupt is generated when a counter that counts pulses of one fixed period overflows, and when the timer interrupt occurs during external interrupt processing, a timer interrupt is generated after the external interrupt processing is completed. A microcomputer that performs interrupt processing, wherein when setting the initial value of the counter in the timer interrupt processing, the initial value of the counter is set based on the power run 1-value of the counter at this time. A method for handling timer interrupts in computers. 2. The timer interrupt processing method in a microcomputer according to claim 1, wherein the timer interrupt processing is printer drive control, and the external interrupt processing is printer motor speed control.