JPS6095620U - Semiconductor device for power control - Google Patents

Semiconductor device for power control

Info

Publication number
JPS6095620U
JPS6095620U JP18562483U JP18562483U JPS6095620U JP S6095620 U JPS6095620 U JP S6095620U JP 18562483 U JP18562483 U JP 18562483U JP 18562483 U JP18562483 U JP 18562483U JP S6095620 U JPS6095620 U JP S6095620U
Authority
JP
Japan
Prior art keywords
m03fet
load
driving
semiconductor device
power control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18562483U
Other languages
Japanese (ja)
Inventor
雅博 石川
Original Assignee
日産自動車株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日産自動車株式会社 filed Critical 日産自動車株式会社
Priority to JP18562483U priority Critical patent/JPS6095620U/en
Publication of JPS6095620U publication Critical patent/JPS6095620U/en
Pending legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Control Of Electrical Variables (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は電力制御用半導体装置の従来例の概略図、第2
図はその動作波形図、第3図は本考案の一実施例を示す
回路図、第4図は本装置の正常時の動作波形図、第5図
は本装置の負荷短絡時の動作波形図である。 10:負荷、1.1:負荷駆動用MO3FET、  1
2:第2M03FET、 l 3 :第3M03FET
、 l 4 :第4M03FET、15:可変抵抗、1
6:第1比較器、17:電流検出回路、18:平滑コン
デンサ、19:第2比較器、2θ:三角波発生回路。
Figure 1 is a schematic diagram of a conventional example of a semiconductor device for power control;
Figure 3 is a circuit diagram showing an embodiment of the present invention; Figure 4 is a diagram of the operating waveforms of this device during normal operation; Figure 5 is a diagram of the operating waveforms of this equipment when the load is short-circuited. It is. 10: Load, 1.1: MO3FET for load drive, 1
2: 2nd M03FET, l 3: 3rd M03FET
, l 4: 4th M03FET, 15: Variable resistance, 1
6: first comparator, 17: current detection circuit, 18: smoothing capacitor, 19: second comparator, 2θ: triangular wave generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] MOSFETにより負荷電流をデユーティ制御する電力
制御用半導体装置において、負荷駆動用MO8FETと
同じ導電型の第2M0SFETと、負荷駆動用MO3F
ETとは反対の導電型の第3M03FETおよび第4M
O3FMTを備え、負荷駆動用MO3FETと負荷との
直列回路に、−第2M03FETと第3M03FETと
の直列回路および第4M03FETと可変抵抗との直列
回路を並列に接続し、負荷駆動用MO3FETと負荷と
の接続点の電位を一方の入力とし第2M03FETと第
3M03FETとの接続点の電位を他方の入力とする第
1比較器の出力ニヨり第3M03FETおよび第4M0
3FET(7)ゲート電圧を制御し、て、負荷駆動用M
O8FETと第2M03FETおよび第3M03FET
と第4M03FET、をそれぞれカレントミラーとする
電流検出回路を構成し、前記可変抵抗の発生電圧を平滑
化した電圧と三角波発生回路からの三角波電圧と第2比
較器に入力し、第2比較器の出力により負荷駆動用MO
5FETおよび第2M03FETのゲート電圧を制御し
て、負荷が短絡状態となった場合には負荷駆動用MO3
FETをオフにし負荷への通電を停止するようにしたこ
とを特徴とする電力制御用半導体装置。
In a power control semiconductor device that duty-controls a load current using a MOSFET, a second MOSFET of the same conductivity type as the load driving MO8FET and a load driving MO3F are used.
3rd M03FET and 4th M03FET of opposite conductivity type to ET
A series circuit of a second M03FET and a third M03FET and a series circuit of a fourth M03FET and a variable resistor are connected in parallel to a series circuit of a load driving MO3FET and a load. The output of the first comparator, which has the potential at the connection point as one input and the potential at the connection point between the second M03FET and the third M03FET as the other input, is the third M03FET and the fourth M03FET.
Controls the gate voltage of 3FET (7) and connects M for load driving.
O8FET, 2nd M03FET and 3rd M03FET
and a fourth M03FET as current mirrors, and input the voltage generated by the variable resistor into a smoothed voltage and the triangular wave voltage from the triangular wave generating circuit to a second comparator. MO for driving load by output
By controlling the gate voltage of the 5FET and the second M03FET, when the load is short-circuited, the load driving MO3
A semiconductor device for power control, characterized in that a FET is turned off to stop power supply to a load.
JP18562483U 1983-12-02 1983-12-02 Semiconductor device for power control Pending JPS6095620U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18562483U JPS6095620U (en) 1983-12-02 1983-12-02 Semiconductor device for power control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18562483U JPS6095620U (en) 1983-12-02 1983-12-02 Semiconductor device for power control

Publications (1)

Publication Number Publication Date
JPS6095620U true JPS6095620U (en) 1985-06-29

Family

ID=30401164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18562483U Pending JPS6095620U (en) 1983-12-02 1983-12-02 Semiconductor device for power control

Country Status (1)

Country Link
JP (1) JPS6095620U (en)

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