JPS58156388U - Gate circuit of gate turn-off thyristor - Google Patents
Gate circuit of gate turn-off thyristorInfo
- Publication number
- JPS58156388U JPS58156388U JP5329782U JP5329782U JPS58156388U JP S58156388 U JPS58156388 U JP S58156388U JP 5329782 U JP5329782 U JP 5329782U JP 5329782 U JP5329782 U JP 5329782U JP S58156388 U JPS58156388 U JP S58156388U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- thyristor
- circuit
- turn
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Conversion In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のゲート回路を示す具体的な回路構成図、
第２図は本考案による一実施例を示すゲート回路の具体
的な回路構成図。
１はＧＴｏ、２はスナバ−回路、６は電圧検出回路、７
はＡＮＤゲート、Ｔｒｌ−Ｔｒ２ハトランジスタ、Ｒニ
ーＲ２は電流制限抵抗、Ｅｌ−Ｅ２は直流電源、ｐｃは
フォトカプラ。Figure 1 is a specific circuit configuration diagram showing a conventional gate circuit.
FIG. 2 is a specific circuit configuration diagram of a gate circuit showing one embodiment of the present invention. 1 is GTo, 2 is a snubber circuit, 6 is a voltage detection circuit, 7
is an AND gate, Trl-Tr2 is a transistor, R knee R2 is a current limiting resistor, El-E2 is a DC power supply, and pc is a photocoupler.
Claims (1)
、第２のスイッチング素子を通してＯＦＦゲート指令信
号をそれぞれ与えることによって、ゲートターンオフサ
イリスタを０Ｎ−ＯＦＦ制御するようにしたものに於て
、ゲートターンオフサイリスタに並列接続されるスナバ
−回路のコンデンサ電圧を検出する検出回路と、コンデ
ンサ電圧が無電圧である旨の検出信号とＯＦＦゲート指
令信号との論理積条件をとって、前記第２のスイッチン
グ素子にＯＦＦ指令を与える回路とて構成したことを特
徴とするゲートターンオフサイリスタのゲート回路。Parallel to the gate turn-off thyristor in which the gate turn-off thyristor is controlled ON-OFF by applying an ON gate command signal through the first switching element and an OFF gate command signal through the second switching element. A detection circuit that detects the capacitor voltage of the connected snubber circuit takes an AND condition of a detection signal indicating that the capacitor voltage is no voltage and an OFF gate command signal, and issues an OFF command to the second switching element. A gate circuit for a gate turn-off thyristor, characterized in that it is configured as a circuit that provides the following.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5329782U JPS58156388U (en) | 1982-04-13 | 1982-04-13 | Gate circuit of gate turn-off thyristor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5329782U JPS58156388U (en) | 1982-04-13 | 1982-04-13 | Gate circuit of gate turn-off thyristor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58156388U true JPS58156388U (en) | 1983-10-19 |
Family
ID=30063971
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5329782U Pending JPS58156388U (en) | 1982-04-13 | 1982-04-13 | Gate circuit of gate turn-off thyristor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58156388U (en) |
-
1982
- 1982-04-13 JP JP5329782U patent/JPS58156388U/en active Pending
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