JPS6095603U - digital output circuit - Google Patents

digital output circuit

Info

Publication number
JPS6095603U
JPS6095603U JP18811583U JP18811583U JPS6095603U JP S6095603 U JPS6095603 U JP S6095603U JP 18811583 U JP18811583 U JP 18811583U JP 18811583 U JP18811583 U JP 18811583U JP S6095603 U JPS6095603 U JP S6095603U
Authority
JP
Japan
Prior art keywords
output circuit
digital output
command
state
maintains
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18811583U
Other languages
Japanese (ja)
Inventor
哲夫 山川
Original Assignee
富士電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社 filed Critical 富士電機株式会社
Priority to JP18811583U priority Critical patent/JPS6095603U/en
Publication of JPS6095603U publication Critical patent/JPS6095603U/en
Pending legal-status Critical Current

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  • Safety Devices In Control Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図はこの考案の実施例を示す構成図である。 符号説明、1・・・・・・プログラムコントローラ、2
.3□〜3n・・・・、・・リレー、21・・・・・・
リレー2の接点、31□、3□2・・・・・・リレー3
□の接点、3□□。 322・・・・・・リレー3□の接、穴、3n□、3n
2・・・・・・リレー3nの接点、11□〜lln、1
2・・・・・・出力接点、4・・・・・・母線、51〜
5n・・・・・・ダイオード。
The figure is a configuration diagram showing an embodiment of this invention. Code explanation, 1...Program controller, 2
.. 3□~3n...,...Relay, 21...
Relay 2 contacts, 31□, 3□2...Relay 3
□ contact, 3□□. 322...Relay 3□ contact, hole, 3n□, 3n
2...Relay 3n contact, 11□~lln, 1
2... Output contact, 4... Bus bar, 51~
5n...Diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定の出力機器に対応して設けられディジタル処理装置
からのオン指令を受けて該機器を駆動する機器駆動手段
と、該駆動手段の動作を保持する保持回路とを備え、前
記オン指令が消失しても該保持回路にて機器の1ン状態
を保持するディジタル出力回路において、前記各保持回
路を同時に開放するリセット手段を全機器共通に設け、
該リセット手段と前記処理装置から選択的に与えられる
オフ指令とによって所望の機器をオフにすることを特徴
とするディジタル出力回路。
A device driving device is provided corresponding to a predetermined output device and drives the device in response to an ON command from a digital processing device, and a holding circuit maintains the operation of the driving device, so that the ON command disappears. In a digital output circuit that maintains the 1-state of the device in the holding circuit even when the device is in the 1-state state, a reset means for simultaneously opening each of the holding circuits is provided in common to all the devices,
A digital output circuit characterized in that a desired device is turned off by the reset means and an off command selectively given from the processing device.
JP18811583U 1983-12-07 1983-12-07 digital output circuit Pending JPS6095603U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18811583U JPS6095603U (en) 1983-12-07 1983-12-07 digital output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18811583U JPS6095603U (en) 1983-12-07 1983-12-07 digital output circuit

Publications (1)

Publication Number Publication Date
JPS6095603U true JPS6095603U (en) 1985-06-29

Family

ID=30405898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18811583U Pending JPS6095603U (en) 1983-12-07 1983-12-07 digital output circuit

Country Status (1)

Country Link
JP (1) JPS6095603U (en)

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