JPS609131A - Method for resin sealing of semiconductor device and apparatus thereof - Google Patents
Method for resin sealing of semiconductor device and apparatus thereofInfo
- Publication number
- JPS609131A JPS609131A JP11588383A JP11588383A JPS609131A JP S609131 A JPS609131 A JP S609131A JP 11588383 A JP11588383 A JP 11588383A JP 11588383 A JP11588383 A JP 11588383A JP S609131 A JPS609131 A JP S609131A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- cavity
- sealing
- lead frame
- mold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
(イ)発明の技術分野
本発明は半導体の製造方法及びその製造装置に関し、特
に、半導体チップとデンディングワイヤが組付けられた
リードフレームを、合せ金型を用いて樹脂封止を行う半
導体装置の樹脂封止方法及び樹脂封止装置に関するもの
である。Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor and an apparatus for manufacturing the same, and in particular, it relates to a method for manufacturing a semiconductor and a manufacturing apparatus for the same. The present invention relates to a method and apparatus for resin-sealing a semiconductor device.
幹)技術の背景
一般に、半導体製造工程において、半導体チップ(IC
Cチックを封入するパッケージ(容器)としては、密閉
空間内に封入するもの(金ハパッケージ、セラミック・
母、ケージ等)と、半導体チツブを直接埋設して封入す
るもの(樹脂封止パッケージ等)がある。後者の直接埋
設方法としては1、金型を用い、この金型に樹脂を加圧
注入して封止樹脂を成形する方法と、液状の樹脂中にリ
ード付の半導体を直接浸漬して封止樹脂を形成する方法
がある。Background of the technology In general, in the semiconductor manufacturing process, semiconductor chips (IC)
Packages (containers) for enclosing C-tic include those that are enclosed in a closed space (metallic packages, ceramic packages, etc.).
There are two types: motherboards, cages, etc.) and packages in which semiconductor chips are directly buried and sealed (resin-sealed packages, etc.). The latter direct embedding methods include: 1, using a mold and injecting resin under pressure into the mold to form the sealing resin; and 2) directly immersing the semiconductor with leads in liquid resin for sealing. There are ways to form resin.
この金型を用いて半導体チップを直接埋設して封入する
樹脂封止パッケージは、通常、金属製のリードフレーム
上に半導体チ、fをダイボンドしてからワイヤボンディ
ンダを施した後、このリードフレームを所定の金型に収
容配置して、金型内に熱硬化性樹脂を加圧注入して成形
される。そして、この金型には、通常、前述の如きリー
ドフレームを収容配置するだめのキャビティと呼ばれる
空間部(成形物の形状をした空間)が複数個配列して形
成され、このキャビティに直接連通して注入口としての
役目を果すダートと呼ばれる細い通路が形成され、この
ダートに連通するランナーと呼ばれる通路が形成され、
さらにこのランナーに連通する穴部が形成されている場
合が多い。この穴部(以下、ポットと呼ぶ)に予備加熱
した封止用の樹脂材料(熱硬化性樹脂)を供給し、この
供給樹脂をプランジャーによりて前記ランナー及びダー
トを介してキャビティ内に加圧注入することによシ、封
止樹脂が成形される。しかし、この種の封止樹脂成形に
おいては、金型の各通路に残留した樹脂が無駄になシ、
またキャビティ内に流入した樹脂がリードフレームに組
付けられた細いボンディングワイヤに直接接触するので
、ワイヤを変形して悪影響を及ばず場合がある。従って
、このような封止樹脂の成形工程における半導体装置の
樹脂封止方法及びその装置としては、樹脂材料の歩留シ
が良好で、かつデンディングワイヤに対し悪影響を与え
ない方法及び装置が要望されている。Resin-sealed packages in which semiconductor chips are directly embedded and encapsulated using this mold are usually made by die-bonding semiconductor chips and f onto a metal lead frame, then applying wire bonding to the lead frame. is placed in a predetermined mold, and a thermosetting resin is injected into the mold under pressure to be molded. This mold is usually formed with a plurality of spaces (spaces in the shape of a molded product) called hollow cavities (spaces in the shape of a molded product) for accommodating and arranging the lead frame as described above, and these cavities are directly connected to each other. A narrow passage called a dart is formed to serve as an injection port, and a passage called a runner is formed that communicates with this dart.
Furthermore, a hole communicating with the runner is often formed. A preheated sealing resin material (thermosetting resin) is supplied to this hole (hereinafter referred to as a pot), and the supplied resin is pressurized into the cavity via the runner and dart by a plunger. The sealing resin is molded by injection. However, in this type of sealing resin molding, the resin remaining in each passage of the mold is wasted, and
Furthermore, since the resin that has flowed into the cavity directly contacts the thin bonding wire assembled to the lead frame, the wire may be deformed without causing any adverse effects. Therefore, there is a need for a method and device for resin-sealing semiconductor devices in the molding process of such a sealing resin, which has a good yield of resin material and does not have an adverse effect on the denting wire. has been done.
(ハ)従来技術と問題点
第1図から第4図は従来の半導体装置の樹脂封止方法及
び樹脂封止装置を説明するだめの図である。第1図は第
1の従来例における金型(下型)の部分平面図、第2図
は第1図のA−A’線断面図(但し、上型を衝合配置し
た状態)、第3図は第2の従来例における金型(下型〕
の部分平面図、第4図は第3図のB −B’線断面図(
但し、上型を衝合配置した状態ンである・
第1図と第2図において、符号10は金型を示し、11
は下型、12は上型、13は供給ポット(成形物のカル
部に相当)、14はランナー、15は注入ダート、16
はキャビティ、17はリードフレーム1.17aはリー
ドフレーム(17)と一体状に形成されたダイスステー
ジ、18は半導体チップ、19はボンディングワイヤを
それぞれ示す。この従来例の場合は、第1図に示すよう
に、ポット13に連通ずる複数本のランナー14(この
場合は4本構成)が設けられ、これら各ランナー14の
両側に複数個(この場合、1本のランナーに対して10
個ンのキャビティ16が配置形成され、かつランナー1
4とキャビティ16は注入グー)15を介して連通され
ている。尚、下型11に設けられたポット13に対応し
て上型」2にもポット(図示なし)が形成されている。(c) Prior Art and Problems FIGS. 1 to 4 are diagrams for explaining a conventional resin sealing method and resin sealing apparatus for a semiconductor device. Fig. 1 is a partial plan view of the mold (lower mold) in the first conventional example, Fig. 2 is a cross-sectional view taken along the line A-A' in Fig. Figure 3 shows the mold (lower mold) in the second conventional example.
FIG. 4 is a sectional view taken along the line B-B' in FIG. 3 (
However, the state in which the upper molds are placed abutting each other is shown. In Figures 1 and 2, numeral 10 indicates the mold, and 11
12 is the lower mold, 12 is the upper mold, 13 is the supply pot (corresponding to the cull part of the molded product), 14 is the runner, 15 is the injection dart, 16
17 is a cavity, 17 is a lead frame 1.17a is a die stage formed integrally with the lead frame (17), 18 is a semiconductor chip, and 19 is a bonding wire. In the case of this conventional example, as shown in FIG. 10 for one runner
The individual cavities 16 are arranged and formed, and the runner 1
4 and the cavity 16 are communicated via an injection goose 15. Note that a pot (not shown) is also formed on the upper mold 2 in correspondence with the pot 13 provided on the lower mold 11.
キャビティ16は下型11と上ff112の型面にそれ
ぞれ凹所を設けることによシ形成されている。リードフ
レーム17は、そのダイスステージ1 ’7 a上に半
導体チップ18が予め組付けられかつワイヤ19がボン
ディングされている。さて、この従来例における樹脂封
止手順としては、先づ金型lOを型開きして、下型11
の各キャビティ16にそれぞれリードフレーム16を収
容配置し、次いで下型11上に上型12を衝合配置する
。そして、その後、予備加熱した樹脂材料(熱硬化性樹
脂)を供給ポット13内に供給し、プランジャー(図示
なし)によって前記樹脂材料を押圧してランナー14及
びグー)15を経由して各キャビティ16内に加圧注入
する。このようにして、各キャビティ16において半導
体チッflB及びボンディングワイヤ19を直接埋設し
た封止樹脂が成形される。しかしながらこの従来例には
次のような問題点がある。The cavity 16 is formed by providing recesses in the mold surfaces of the lower mold 11 and the upper ff 112, respectively. The lead frame 17 has a semiconductor chip 18 assembled thereon in advance and a wire 19 bonded thereto. Now, as a resin sealing procedure in this conventional example, first, the mold lO is opened, and the lower mold 11 is
A lead frame 16 is accommodated in each cavity 16, and then an upper mold 12 is placed against the lower mold 11. Thereafter, a preheated resin material (thermosetting resin) is supplied into the supply pot 13, and the resin material is pressed by a plunger (not shown) to pass through the runner 14 and goo 15 into each cavity. Inject under pressure into 16. In this way, the sealing resin in which the semiconductor chip flB and the bonding wire 19 are directly embedded is molded in each cavity 16. However, this conventional example has the following problems.
■ 供給ボッ)13に近接して形成されたキャビティ1
6と末端部のキャビティ16との間における樹脂材料の
充填時差が太きいため、充*樹脂の粘反差が生じ、不完
全充填のキャビティが生ずる場合があシ、不良製品が発
生する場合が多い。■ Cavity 1 formed close to supply bottle) 13
Due to the large difference in filling time of the resin material between the resin material 6 and the cavity 16 at the end, a difference in viscosity of the filled resin occurs, which may result in incompletely filled cavities and often result in defective products. .
■ 供給ボッ)13(成形物のカルに相尚)及びランナ
ー14に残留した樹脂が無駄になるので、樹脂材料(原
料ンの歩留シが非常に低い(悪い9゜■ キャビティ1
6内に流入する樹脂の流れが、第2図に示すように、ワ
イヤ19の横方向(矢印C方向)からワイヤ19に対し
て流入するため、ワイヤ19が押し流されて、点線19
′で示すように、変形され、この結果、ワイヤ19同士
、又はワイヤ19と半導体チップ18が接触してショー
ト(短絡〕する場合がある(いわゆるワイヤンローと呼
はれる現象が発生する場合があるン。■ Since the resin remaining in the supply bottle) 13 (comparable to the molded material) and the runner 14 is wasted, the yield of the resin material (raw material is very low (bad 9°) ■ Cavity 1
As shown in FIG. 2, the flow of resin flowing into the wire 19 flows into the wire 19 from the lateral direction (direction of arrow C), so the wire 19 is swept away and the resin flows along the dotted line 19.
As a result, the wires 19 or the wires 19 and the semiconductor chip 18 may come into contact with each other and cause a short circuit (a phenomenon called wire unrow may occur). .
次に、第3図と第4図に示す第2の従来例について説明
する。この従来例はマルチプランジャ一方式の樹脂封止
方法である。尚、これら両図において、前出の第1及び
第2図と同一部分には同一符号が付されている。従りて
、符号2oは金型を示し、21は下型、22は上型、2
3は供蛤ポ。Next, a second conventional example shown in FIGS. 3 and 4 will be explained. This conventional example is a multi-plunger one-type resin sealing method. In both of these figures, the same parts as in the above-mentioned FIGS. 1 and 2 are given the same reference numerals. Therefore, the symbol 2o indicates a mold, 21 is a lower mold, 22 is an upper mold, 2
3 is a clam pot.
ト、24はシランジャーをそれぞれ示し、他の符号は第
1図及び第2図と同一部分を示す。この従来例の場合は
、ポット23を多数個設け、それぞれのポット23に対
応してプランジャー24が配設され、いわゆるマルチプ
シンジャ一方式に形成されている。そして、各供給ポッ
ト23に対し注入グー)15を介して両側に1個づつ計
2個のキャビティ16が設けられている(尚、1個のポ
ット23に対しキャビティ16が4個数シの場合もある
)。従って、この従来例は前出の第1の従来例(第1図
、第2図)と比較して、ランナー14が省略され、かつ
第1の従来例における一対の供給・J?ノット3とシラ
ンジャーの代シに多数対の供給プツト23とプランジャ
ー24が設けられている点が異なっている。尚、樹脂封
止手順としては、前出の従来例と略同様に行われる。し
かしながら、この従来例は、第1の従来例(第1図、第
2図ンの■及び0項の問題点を解消できるという利点を
有しているが、まだなお、■項の問題点を解消すること
ができないという欠点がある。Reference numerals 2 and 24 indicate silangers, and other symbols indicate the same parts as in FIGS. 1 and 2. In the case of this conventional example, a large number of pots 23 are provided, and a plunger 24 is disposed corresponding to each pot 23, forming a so-called multiple plunger type. For each supply pot 23, a total of two cavities 16 are provided, one on each side via the injection goo 15 (in addition, there may be cases where there are four cavities 16 for one pot 23). be). Therefore, in this conventional example, the runner 14 is omitted compared to the first conventional example (FIGS. 1 and 2), and the runner 14 in the first conventional example is omitted. The difference is that multiple pairs of supply ports 23 and plungers 24 are provided in place of the knot 3 and the silanger. Incidentally, the resin sealing procedure is performed in substantially the same manner as in the conventional example described above. However, although this conventional example has the advantage of being able to solve the problems in section 2 and section 0 of the first conventional example (Figs. 1 and 2), it still has the problem The drawback is that it cannot be resolved.
に)発明の目的
本発明の目的は、前記従来技術の問題点に鑑み、側止用
樹脂を各キャビティすべてに完全充填することができ、
樹脂材料の歩留シをきわめて向上することができ、かつ
ボンrインダワイヤ同士、又はポンディングワイヤと半
導体チップが互に接触させられて短絡することを防止で
き、さらにはキャビティの取シ数をよシ増大化できる半
導体装置の樹脂封止方法及び樹脂封止装置を提供するこ
とにある。B) Purpose of the Invention In view of the problems of the prior art, the purpose of the present invention is to completely fill all the cavities with the resin for the side stop;
It is possible to greatly improve the yield of resin materials, prevent short circuits caused by bonding wires or bonding wires and semiconductor chips coming into contact with each other, and further reduce the number of cavities. An object of the present invention is to provide a resin sealing method and a resin sealing apparatus for semiconductor devices that can increase the number of semiconductor devices.
(ホ)発りjの構成
そして、この目的を達成するために、本発明に依れば、
半導体チップが取付けられ、ワイヤボンディングが成さ
れたリードフレームを樹脂封止するに際し、前記リード
フレームを収容するための複数個のキャビディが配列形
成されると共にこれら各キャビティそれぞれに注入ダー
トを介して連通する供給ポットが個別に形成された合せ
金型を準備し、前記各キャビティ内にリードフレームを
収容配置し、次いで前記各供給ポット内に封止用樹脂を
供給し、その後、該封止用樹脂を該キャビティ内に加圧
注入して樹脂封止するようにしたことを特徴とする半導
体装置の樹脂封止方法が提供される。(e) Configuration of starting j And in order to achieve this objective, according to the present invention,
When a lead frame to which a semiconductor chip is attached and wire bonding has been performed is sealed with resin, a plurality of cavities for accommodating the lead frame are formed in an array, and these cavities are connected to each other via injection darts. A matching mold is prepared in which supply pots are individually formed, a lead frame is housed and arranged in each cavity, a sealing resin is supplied into each supply pot, and then the sealing resin is There is provided a method for resin-sealing a semiconductor device, characterized in that resin-sealing is carried out by injecting a semiconductor device under pressure into the cavity.
また、本発明に依れば、上下に衝合配置した金型に多数
個のキャビティが配設形成され、該各キャビティ内に、
半導体チップが取付けられ、ワイヤボンディングが成さ
れたリードフレームを収容し、前記キャビティに連通ず
るポット内に供給した封止用樹脂をプランジャーによシ
キャビティ内に加圧注入して半導体装置の樹脂封止工程
を行うように構成された半導体装置の樹脂封止装置にお
いて、前記各キャビティそれぞれに注入ダートを設ける
と共に該注入ダートに直接連通する供給ポットを個々に
配設形成し、該各ポットに対応させてそれぞれプランジ
ャーを配設したことを特徴とする半導体装置の樹脂封止
装置が提供される。Further, according to the present invention, a large number of cavities are arranged and formed in the molds arranged vertically against each other, and in each cavity,
A lead frame with a semiconductor chip mounted thereon and wire bonded thereon is accommodated, and the sealing resin supplied into the pot communicating with the cavity is injected under pressure into the cavity by a plunger to seal the resin of the semiconductor device. In a resin sealing apparatus for a semiconductor device configured to perform a sealing process, each of the cavities is provided with an injection dart, and a supply pot that directly communicates with the injection dart is individually arranged and formed, and each of the cavities is provided with an injection dart. A resin sealing device for a semiconductor device is provided, which is characterized in that plungers are arranged in correspondence with each other.
(へ)発明の実施例
以下、本発明の実施例を図面に基づいて詳細に説明する
。(F) Embodiments of the Invention Hereinafter, embodiments of the present invention will be described in detail based on the drawings.
第5図から第7図は本発明の詳細な説明するための図で
ある。第5図は本発明による半導体装置の樹脂封止装置
における金型(下型ンの概i的平面図、第6図は第5図
のD −D’線断面図(但し上型を近接配置した状態)
、第7図は第6図の部分拡大詳細図(但し、上型を一合
配置した状態)である。尚、これらの図において、前出
の第2図、第4図(共に従来例)と同一部分には同一符
号が付されている。従って、符号17はリードフレーム
、17aはダイスステーソ、18は半導体チップ、19
は?ンrイングワイヤ、そして符号30は本発明の樹脂
封止装置における金型、31は下型、32は上型、33
は供給ポット(成形品のカルに相当する部分)、34は
プランジャー、35は注入ダート、36はキャビティ、
37はベント(空気抜き用隙間)をそれぞれ示す。尚、
リードフレーム17は、この場合、第5図におけるキャ
ビティ36の左半分10個分と、右半分10個分(一点
鎖線部分)とをそれぞれ1枚で同時に含むように形成さ
れておシ、合計2枚構成になっている。本実施例は、図
示のように、下型31の型面にキャビティ36の下側部
が複数個(この場合、合計20 m )配列形成され、
このキャビティ36の水平方向と直交する方向に注入ゲ
ート35がキャビティ36と連通して形成され、さらに
この注入ダート36に連通ずると共に同軸状に供給ポッ
ト33が形成されている。すなわち、各キャビティ36
にそれぞれ対応して個々に供給ポット33が形成され、
かつこれら各供給ポット33それぞれに対応して個々に
プランジャー34(代表として第6図には1個のみ図示
)が配設されている。5 to 7 are diagrams for explaining the present invention in detail. FIG. 5 is a schematic plan view of a mold (lower mold) in a resin sealing apparatus for a semiconductor device according to the present invention, and FIG. 6 is a sectional view taken along line D-D' of FIG. state)
, FIG. 7 is a partially enlarged detailed view of FIG. 6 (however, the upper molds are arranged together). In these figures, the same parts as in FIGS. 2 and 4 (both conventional examples) are given the same reference numerals. Therefore, numeral 17 is a lead frame, 17a is a die stethoscope, 18 is a semiconductor chip, and 19 is a die stethoscope.
teeth? 30 is a mold in the resin sealing device of the present invention, 31 is a lower mold, 32 is an upper mold, and 33
is the supply pot (the part corresponding to the cull of the molded product), 34 is the plunger, 35 is the injection dart, 36 is the cavity,
Reference numeral 37 indicates a vent (air vent gap). still,
In this case, the lead frame 17 is formed so as to simultaneously include 10 left half cavities and 10 right half cavities (dotted chain line portion) in FIG. It consists of two sheets. In this embodiment, as shown in the figure, a plurality of lower cavities 36 (in this case, a total of 20 m) are formed in an array on the mold surface of the lower mold 31.
An injection gate 35 is formed in communication with the cavity 36 in a direction perpendicular to the horizontal direction of the cavity 36, and a supply pot 33 is formed coaxially with and in communication with the injection dart 36. That is, each cavity 36
Supply pots 33 are formed individually corresponding to each of the
A plunger 34 (only one plunger is shown in FIG. 6 as a representative) is provided corresponding to each of these supply pots 33.
このように、キャビティ36に対し、実質的に直接連通
する供給ポット33を配設することにょシ、同一面積に
おける金型に対してキャビティ36の取多数を増大化す
ることができる。尚、キャビティ36は下型31と上型
32の型面それぞれに凹所を設けて形成されている。ま
た、プランジャー34の先端部(抑圧面)は、第7図に
明示するように、供給ポット33の底面形状に合致する
ように形成されている。このためポット33内に供給さ
れた樹脂材料は略100%ノランジャー34によりて押
し出される。また、注入ゲート35は、同じく第7図に
明示するように、通路長さが非常に短く形成されている
。これは、このダート35部に残留する樹脂材がきわめ
て少量になるように考慮されているものである。さて、
本実施例における樹脂封止工程の手順は、前出の第3図
に示す第2の従来例の場合と略同様にして行われる。す
なわち、金m30の下型31と上型32を型開きして、
リードフレーム17を第7図に示すように、ワイヤ19
がゲート35の反対側に位置するように、下型31に収
容配置し、次いで下型31と上型を衝合配置する。その
後、各供給ポット33それぞれに予備加熱した所定量の
樹脂材料を供給しくこの時プランジャー34はポット3
3から抜出され退避されている)、その後プランジャー
34によりて供給された樹脂材料がキャビティ36に加
圧注入され、封止樹脂が成形される。このように本実施
例は、キャビティ36内に注入するr−ト35を、第7
図に示すように、リードフレーム17の下側、すなわち
、デンディングワイヤ19組付側の反対側に設け、ワイ
ヤ19の下側から樹脂材料を加圧注入するように構成し
たものである。In this way, by arranging the supply pot 33 that communicates substantially directly with the cavities 36, it is possible to increase the number of cavities 36 for the mold in the same area. Incidentally, the cavity 36 is formed by providing a recess in each of the mold surfaces of the lower mold 31 and the upper mold 32. Further, the tip end (suppressing surface) of the plunger 34 is formed to match the bottom shape of the supply pot 33, as clearly shown in FIG. Therefore, approximately 100% of the resin material supplied into the pot 33 is extruded by the Noranger 34. Furthermore, the injection gate 35 is formed to have a very short path length, as also clearly shown in FIG. This is designed to ensure that the amount of resin material remaining in the dart 35 is extremely small. Now,
The procedure of the resin sealing process in this embodiment is performed in substantially the same manner as in the case of the second conventional example shown in FIG. 3 mentioned above. That is, the lower mold 31 and upper mold 32 of gold m30 are opened,
The lead frame 17 is connected to the wire 19 as shown in FIG.
is housed in the lower die 31 so that it is located on the opposite side of the gate 35, and then the lower die 31 and the upper die are placed against each other. Thereafter, a predetermined amount of the preheated resin material is supplied to each supply pot 33. At this time, the plunger 34
3), then the resin material supplied by the plunger 34 is injected into the cavity 36 under pressure to form a sealing resin. In this way, in this embodiment, the r-t 35 injected into the cavity 36 is
As shown in the figure, it is provided on the lower side of the lead frame 17, that is, on the opposite side to the side where the ending wire 19 is assembled, and is configured such that the resin material is injected under pressure from the lower side of the wire 19.
従って、注入された樹脂材料がワイヤ19を緊張させる
方向(矢印E方向)に流れるので、ワイヤ19が変形さ
れてワイヤ19同士又はワイヤ19と半導体チップが接
触して短絡(ジョートノする危険性が完全に防止される
。また、前述したように、個々のキャビティ36に対応
させて供給ポット33とプランジャー34を個別に配設
し、かつプランジャー34の先端部とポット33の底面
部との形状が完全に合致するように考慮されているので
、本実施例は、樹脂材料のポット33内における残留量
を最少限にすることが可能であシ、また各キャビティ3
6に対する樹脂材料の充填時差を完全に除去することが
できる。尚、本発明は、上記実施例に限定されるもので
はなく、例えば、供給ポット33とグランジャー34の
配置を上記実施例と逆に上型32に配設することも容易
に可能であシ、また、発明の主旨を逸脱しない範囲内で
、さらに別の髪形例にも適用することができる。Therefore, since the injected resin material flows in the direction of tensing the wires 19 (in the direction of arrow E), the wires 19 are deformed and the wires 19 or the wires 19 and the semiconductor chip come into contact, completely eliminating the risk of short circuit (jaw torn). Furthermore, as described above, the supply pot 33 and the plunger 34 are arranged individually corresponding to each cavity 36, and the shape of the tip of the plunger 34 and the bottom of the pot 33 is In this embodiment, the amount of resin material remaining in the pot 33 can be minimized, and each cavity 3
It is possible to completely eliminate the difference in filling time of the resin material with respect to No. 6. It should be noted that the present invention is not limited to the above embodiment, and for example, it is easily possible to arrange the supply pot 33 and the granger 34 on the upper mold 32 in the opposite manner to the above embodiment. Furthermore, the present invention may be applied to other hairstyle examples without departing from the spirit of the invention.
(ト)発明の効果
以上、詳細に説明したように、本発明に依る半導体装置
の樹脂封止方法及び樹脂止装置は、個々のキャビティに
対応する供給ポットとプランジャーを個々に配設し、か
つキャビティ内に収容配置された、半導体チップとポン
ディングワイヤが組付けられたリードフレームに対して
、デンディングワイヤ組付側の反対側方向から樹脂材料
を流入させるように注入ダートを配置形成することによ
シ、樹脂材料を各キャビティすべてに均一に完全充填す
ることができ、樹脂材料の歩留シをきわめて向上させる
ことができ、樹脂材料充填時におけるボンディングワイ
ヤの変形(ワイヤフロー)を完全に防止することができ
、かつ同一面積における金型に対しキャビティの取シ数
を増大化させることができるといつた効果大なるものが
あり、さらには、製品の歩留シと信頼性の向上をもたら
し得るものである。(g) Effects of the Invention As explained in detail above, the resin sealing method and resin sealing apparatus for a semiconductor device according to the present invention individually disposes a supply pot and a plunger corresponding to each cavity, In addition, an injection dart is arranged and formed so that the resin material flows into the lead frame, which is housed in the cavity and has the semiconductor chip and the bonding wire assembled thereto, from the direction opposite to the side where the bonding wire is attached. In particular, the resin material can be filled uniformly and completely into all cavities, greatly improving the yield of the resin material, and completely preventing deformation of the bonding wire (wire flow) when filling the resin material. This has great effects, such as being able to prevent this from occurring and increasing the number of cavities for a mold with the same area.Furthermore, it improves product yield and reliability. It can bring about
第1図は第1の従来例を説明するための金型(下型)の
部分平面図、第2図は第1図のA−A’線断面図(但し
、上型を衝合配置した状態)、第3図は第2の従来例を
説明するための金型(下型)の部分平面図、第4図は第
3図のB−B’線断面図(但し、上型を衝合配置した状
態へ第5図は本発明による半導体装置の樹脂封止装置に
おける金型(下型)の概略的平面図、舘6図は第5図の
D−D’線断面図(但し、上型を近接配置した状態)、
第7図は第6囚の部分拡大詳細図(但し、上型を衝合配
置した状態〕である。
17・・・リードフレーム、17a・・・リードフレー
ム(17)と一体状に形成されたダイスステージ、18
・・・半導体チップ、19・・・ポンディングワイヤ、
30・・・金型、−31・・・下型、32・・・上型、
33・・・樹脂材料の供給ポット、34・・・グランジ
ャー、35・・・注入ダート、36・・・キャビティ、
37・・・ベント(空気抜き用隙間)。Fig. 1 is a partial plan view of a mold (lower mold) for explaining the first conventional example, and Fig. 2 is a cross-sectional view taken along the line A-A' in Fig. 1 (however, the upper mold is placed abutting Figure 3 is a partial plan view of the mold (lower mold) for explaining the second conventional example, and Figure 4 is a sectional view taken along line BB' in Figure 3 (however, the upper mold is FIG. 5 is a schematic plan view of the mold (lower mold) in the resin sealing apparatus for semiconductor devices according to the present invention, and FIG. 6 is a sectional view taken along the line DD' in FIG. upper mold placed close together),
Fig. 7 is a partially enlarged detailed view of the 6th prisoner (however, the upper mold is arranged in abutment). 17... lead frame, 17a... formed integrally with the lead frame (17) Dice stage, 18
... semiconductor chip, 19... bonding wire,
30...Mold, -31...Lower mold, 32...Upper mold,
33... Resin material supply pot, 34... Granger, 35... Injection dart, 36... Cavity,
37...Vent (air vent gap).
Claims (1)
成されたリードフレームを樹脂封止するに際し、前記リ
ードフレームを収容するための複数個のキャビティが配
列形成されると共にこれら各キャビティそれぞれに注入
ダートを介して連通する供給ポットが個別に形成された
合せ金型を準備し、前記各キャビティ内にリードフレー
ムを収容配置し、次いで前記各供給ポット内に封止用樹
脂を供給し、その後、該封止用樹脂を該キャビティ内に
加圧注入して樹脂封止するようにしたことを特徴とする
半導体装置の樹脂封止方法。 2、上下に衝合配置した金型に多数個のキャビティが配
設形成され、該各キャビティ内に、半導体チップが取付
けられ、ワイヤポンディングが成されたリードフレーム
を収容し、前記キャビティに連通ずるポット内に供給し
た封止用樹脂をプランジャーによシキャはイ内に加圧注
入して半導体装置の樹脂封止工程を行うように構成され
た半導体装置の樹脂封止装置において、前記各キャビテ
ィそれぞれに注入ダートを設けると共に該注入ダートに
直接連通する供給ポットを個々に配設形成し、該各ポ、
トに対応させてそれぞれプランジャーを配設したことを
%徴とする半導体装置の樹脂封止装置。[Claims] 1. When sealing with resin a lead frame to which a semiconductor chip is attached and wire endings are formed, a plurality of cavities for accommodating the lead frame are arranged and formed, and each of these cavities is Prepare a mating mold in which supply pots communicating with each cavity via injection darts are individually formed, a lead frame is housed and arranged in each cavity, and then a sealing resin is supplied into each supply pot. A method for resin-sealing a semiconductor device, characterized in that the sealing resin is then injected into the cavity under pressure to perform resin-sealing. 2. A plurality of cavities are arranged and formed in a mold that is arranged vertically against each other, each cavity houses a lead frame on which a semiconductor chip is attached and wire bonding is performed, and is connected to the cavity. In a resin sealing apparatus for a semiconductor device configured to carry out a resin sealing process of a semiconductor device by injecting a sealing resin supplied into a pot that communicates with the plunger into a pot under pressure, each of the above-mentioned An injection dart is provided in each cavity, and a supply pot that communicates directly with the injection dart is individually arranged and formed, and each of the cavities is provided with an injection dart.
A resin sealing device for semiconductor devices characterized by the fact that plungers are arranged corresponding to the respective positions.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11588383A JPS609131A (en) | 1983-06-29 | 1983-06-29 | Method for resin sealing of semiconductor device and apparatus thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11588383A JPS609131A (en) | 1983-06-29 | 1983-06-29 | Method for resin sealing of semiconductor device and apparatus thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS609131A true JPS609131A (en) | 1985-01-18 |
JPH0342495B2 JPH0342495B2 (en) | 1991-06-27 |
Family
ID=14673536
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11588383A Granted JPS609131A (en) | 1983-06-29 | 1983-06-29 | Method for resin sealing of semiconductor device and apparatus thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS609131A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6298733A (en) * | 1985-10-25 | 1987-05-08 | Rhythm Watch Co Ltd | Resin sealing metallic mold for semiconductor device |
US5018003A (en) * | 1988-10-20 | 1991-05-21 | Mitsubishi Denki Kabushiki Kaisha | Lead frame and semiconductor device |
US5064706A (en) * | 1987-12-11 | 1991-11-12 | Mitsubishi Denki Kabushiki Kaisha | Carrier tape including molten resin flow path element for resin packaged semiconductor devices |
US5200366A (en) * | 1990-04-27 | 1993-04-06 | Hitachi, Ltd. | Semiconductor device, its fabrication method and molding apparatus used therefor |
KR100423140B1 (en) * | 2001-04-18 | 2004-03-18 | (주)에이치디세미테크 | semi-conductor molding manufacturing device |
JP2007307769A (en) * | 2006-05-17 | 2007-11-29 | Kitagawa Ind Co Ltd | Package of synthetic resin molded product and its manufacturing method |
JP2013120914A (en) * | 2011-12-09 | 2013-06-17 | Semiconductor Components Industries Llc | Manufacturing method of circuit device |
-
1983
- 1983-06-29 JP JP11588383A patent/JPS609131A/en active Granted
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6298733A (en) * | 1985-10-25 | 1987-05-08 | Rhythm Watch Co Ltd | Resin sealing metallic mold for semiconductor device |
US5064706A (en) * | 1987-12-11 | 1991-11-12 | Mitsubishi Denki Kabushiki Kaisha | Carrier tape including molten resin flow path element for resin packaged semiconductor devices |
US5018003A (en) * | 1988-10-20 | 1991-05-21 | Mitsubishi Denki Kabushiki Kaisha | Lead frame and semiconductor device |
US5096853A (en) * | 1988-10-20 | 1992-03-17 | Mitsubishi Denki Kabushiki Kaisha | Method for manufacturing a resin encapsulated semiconductor device |
US5200366A (en) * | 1990-04-27 | 1993-04-06 | Hitachi, Ltd. | Semiconductor device, its fabrication method and molding apparatus used therefor |
KR100423140B1 (en) * | 2001-04-18 | 2004-03-18 | (주)에이치디세미테크 | semi-conductor molding manufacturing device |
JP2007307769A (en) * | 2006-05-17 | 2007-11-29 | Kitagawa Ind Co Ltd | Package of synthetic resin molded product and its manufacturing method |
JP2013120914A (en) * | 2011-12-09 | 2013-06-17 | Semiconductor Components Industries Llc | Manufacturing method of circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPH0342495B2 (en) | 1991-06-27 |
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