JPS6086601A - Following circuit - Google Patents

Abstract

PURPOSE:To make the operation of a following width setter unnecessary and to improve the operability by storing a good following width during the operation in an automatic following exception mode and executing the following operation in an automatic following use mode in accordance with this stored following width. CONSTITUTION:A designated value set to the first counter 1 of a following circuit is converted to an analog value by the first D/A converter 2, and a command value set manually to the second counter 7 through an automatic following logic circuit 13 is converted to an analog value by the second D/A converter 8. Both analog converted values are compared with each other by a comparator 19, and their difference is applied to the counter through a logic circuit of the circuit 13 to perform the operation in a manual operation mode. A following width of set values of counters 1 and 7 in a good state during this operation is stored in a differential memory 23. When the mode of the circuit 13 is switched to the automatic following use mode, contents of the memory 23 are converted to an analog value by the third D/A converter 24 and is applied to the comparator 19, and the counter 7 is controlled to perform the automatic following operation, thus making the operation of the following width setter of the following circuit unnecessary.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a follow-up circuit, and more particularly to a follow-up circuit that can set an automatic follow-up use mode and an automatic follow-up exclusion mode.

[Prior art]

FIG. 1 is a block diagram showing a conventional device of this type. In the figure, il+ is a first counter, U is an input terminal for up-count pulses, and D is an input terminal for down-count pulses. (2) is the first digital-to-analog conversion circuit (
(Hereinafter, the digital-to-analog conversion circuit will be abbreviated as D/A)
, (3) is a push button for inputting up count pulses, (4) is a push button for inputting down count pulses, (5) is the output of D/A (2), and (6) is the output ( (5) is an indicator indicating the first counter (1
), (8) is the second D/A, (
9) is a push button for inputting up-count pulses, shout is a push button for inputting down-count pulses, α is the output of I)/A (8), and 0 is an instruction for output α force. Total, 03 is automatic tracking logic circuit, (141
is a push button for setting the automatic follow mode, α9 is a push button for setting the automatic follow exclusion mode, αQ#'i is an automatic follow mode signal, 0η is an up count pulse, and DI is a down count pulse. Also, (130) to (132) are OR gates, (133) to (137) are AND gates, and (138
), (139) is a knot gate, a field is a comparator, (
) is the tracking width setting device, Q is the up count pulse, (
b) is a down count pulse.

An arbitrary command value can be set and changed in the first counter (1) by operating the push buttons (31, +41).The set command value is output in the form of an analog signal as an output (5). It is output and instructed by the indicator (6). When pushbutton α9 is pressed, the signal (d of 1G) heavy punishment becomes "0" and becomes automatic follow-up exclusion mode, and the AND gate (134
), (135) is off, and gate (136),
(137) is turned on, so press button (9), tl
(The content of the second counter (7) is changed by the operation of j, and the output αD is controlled to track the output (5).

This tracking error is indicated by the difference between the α indicated values of the indicator (6).

Next, when you press the pushbutton (141), the logic of signal 08 becomes "
1" and becomes automatic tracking use mode, and gate (134) and (135) are on, and gate (1
36).

(137) is turned off and the pushbuttons t9), tll
The pulse input from J is blocked and the up-count pulse from the comparator (to)? υ is the up-count pulse aη, and the down-count pulse (A) is input as the down-count pulse (19) to the counter (7). In the comparator (to), the absolute value of the difference between the output (5) and the output Ql) is If it becomes larger than the value set in the tracking width setting device (A),
Depending on the sign of the difference, an up-count pulse (Q) or a down-count pulse (c) is output, and as a result, the output (a) automatically follows the output (5) (k). When the absolute value of the difference between the output 0η and the 1B force (5) is smaller than the value set by the tracking width setter (A), there is no signal output from the comparator α, and the contents of the counter (7) change. do not. In other words, the value set in the tracking width setting device determines the allowable error of automatic tracking, that is, the tracking width. However, the following width setting device (
If the value set for (b) is too small, hunting may occur in the automatic tracking operation depending on the change in output (5).
ng) may occur, and an appropriate value must be set in the tracking width setting device (a). For this reason,
The value set in the following width setting device (a) should be fixed, or the operator would have to set it every time before starting automatic tracking.
If it is fixed, the following width must be set large enough to prevent hunting in the following operation, and if the setting is made every time, the operation becomes complicated.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above. In this invention, the tracking width in a good tracking state during operation in the automatic tracking exclusion mode is memorized, and the stored tracking width is used to The operating characteristics of the automatic tracking circuit have been improved by executing the tracking operation during the automatic tracking usage mode.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention. In the figure, the same ministry numbers as in FIG.
is the difference number memory, and (iii) Fi is the third D/A.

In the circuit shown in FIG. 2, the operation in the automatic tracking exclusion mode is similar to the operation in the automatic tracking exclusion mode in the circuit shown in FIG. , its tracking status is indicated by the indicator (6).

(It can be observed by the instruction in 10. If the push button (14) is pressed when the tracking condition is good, the logic of the signal o0 becomes "1".
”, and enters the automatic tracking use mode as explained with reference to FIG. 1, but the counter (1) and counter (7
) is written to the difference memory.

In other words, the content of the difference number memory (2) is the tracking width when good tracking is performed. By converting the contents of the difference number memory (I) into an analog signal using the D/A (C) and feeding it to the comparator, it is possible to set a suitable value for the tracking width setter (A) in the circuit shown in Figure 1. The same result is obtained, and good automatic tracking characteristics are obtained.

In addition, in the above embodiment, the case where the contents of the counter (7) is made to follow the contents of the counter (11) has been explained, but the circuit may be configured so that the contents of the counter (11) are made to follow the contents of the counter (7), Alternatively, it is also possible to configure the circuit so that it can have a mode in which they automatically follow each other.

〔Effect of the invention〕

As described above, according to the present invention, there is no need for the operator to operate the tracking width setting device during automatic tracking, and the tracking width in a good tracking operation state immediately before switching to the automatic tracking use mode is memorized. Since the operation is performed to the open side (open side) according to the memorized tracking width, an automatic tracking circuit with excellent driving operability can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional circuit, and FIG. 2 is a block diagram showing an embodiment of the present invention. il+...first counter, (2)...first D/
A, (51...output of first D/A, f6)...
・Output (5) instruction word -1, (7) counter of frame 2,
(8)...Second D/A, (I+)...Second side output, θ...Output 0 minute indicator, (14...
Automatic aji follow logic circuit, θ4...Push button for setting automatic follow use mode, (19...Push button for setting automatic follow exclusion mode, (Jθ...Auto follow mode signal, (
19...Comparator,...Difference number memory, QA...Third D/A 0 In each figure, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa

Claims (1)

[Claims] a 10th counter having a count-up pulse input terminal and a count-down pulse input terminal to which a command value is set; a first digital-to-analog conversion circuit that converts the contents of the first counter into an analog signal; a second counter having a pulse input terminal and a countdown pulse input terminal and to which a follow-up value is set; a second digital-to-analog conversion circuit that converts the contents of the second counter into an analog signal; a comparator that inputs the output of the digital-to-analog conversion circuit and the output of the first digital-to-analog conversion circuit and generates an analog signal of the difference between these two inputs, and sets an automatic tracking use mode and an automatic tracking exclusion mode. In the automatic tracking exclusion mode, a count-up pulse or a count-down pulse is manually input to the second counter to control the output of the first digital-to-analog conversion (b) path. means for tracking the output of the digital-to-analog conversion circuit, and an absolute value of the difference between the contents of the tenth counter and the second counter at the time of switching from the automatic follow-up exclusion mode to the automatic follow use mode is set. a third digital-to-analog converter that converts the contents of the difference number memory into an analog signal; and the output of the third digital-to-analog converter is input to the comparator and generated in the comparator. means for inputting a count-up pulse or a count-down pulse to the second counter according to the polarity of the difference analog signal when the absolute value of the difference analog signal exceeds the output of the third digital-to-analog converter; A follow-up circuit with