JPS6083413A - Variable phase device - Google Patents

Variable phase device

Info

Publication number
JPS6083413A
JPS6083413A JP19297083A JP19297083A JPS6083413A JP S6083413 A JPS6083413 A JP S6083413A JP 19297083 A JP19297083 A JP 19297083A JP 19297083 A JP19297083 A JP 19297083A JP S6083413 A JPS6083413 A JP S6083413A
Authority
JP
Japan
Prior art keywords
phase
signal
supplied
wave signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19297083A
Other languages
Japanese (ja)
Inventor
Tsutomu Kawano
川野 努
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19297083A priority Critical patent/JPS6083413A/en
Publication of JPS6083413A publication Critical patent/JPS6083413A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/16Networks for phase shifting
    • H03H11/18Two-port phase shifters providing a predetermined phase shift, e.g. "all-pass" filters

Abstract

PURPOSE:To obtain a signal which has small variation in amplitude and shifts in phase over a wide range by adding the in-phase component of a phase wave signal to a signal obtained by adding the opposite-phase component of an input signal and the in-phase component of the phase wave signal together. CONSTITUTION:The 1st differential amplifier 17 calculates the difference between the bias voltage of a power source 28 and the phase wave signal Sl supplied from a phase device 15 to the base side of a transistor (TR) 22. The phase wave signal Sl is supplied to the base side of a TR23 of the 2nd differential amplifier 18 and the AC input signal Sm is supplied to the base side of a TR24, so the output of the operational amplifier 18 is the composite signal of the in- phase component of the phase wave signal Sl and the opposite-phase component of the input signal Sm. In this case, said signal obtained by the addition and the output of the operational amplifier 17, i.e. in-phase component of the phase wave signal Sl are supplied to a common resistance 25, so they are added together here and the addition result appears at an output terminal 27 as an output signal SO.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は可変位相装置、特に差動増幅器を用いて、出力
信号の振幅変化を抑えるようにし、かつ出力信号の位相
の変化する範囲を広げるようにした可変位相装置に関す
るものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention uses a variable phase device, particularly a differential amplifier, to suppress changes in the amplitude of an output signal and to widen the range in which the phase of the output signal changes. This invention relates to a variable phase device.

〔従来技術〕[Prior art]

従来、可変位相器は第1図に示すように交流の入力信号
が供給される端子lとアースとの間に直列接続された可
変抵抗2とコンデンサ3とからなり、上記抵抗2とコン
デンサ3との接続点を出力端子4に接続し、この端子4
から位相が所望の値だけ調整された出力信号を得るよう
にしている。
Conventionally, a variable phase shifter consists of a variable resistor 2 and a capacitor 3 connected in series between a terminal l to which an AC input signal is supplied and the ground, as shown in FIG. Connect the connection point to output terminal 4, and connect this terminal 4 to output terminal 4.
An output signal whose phase is adjusted by a desired value is obtained.

この場合、入力信号に対する出力信号の位相θの大きさ
は次式で与えられる。
In this case, the magnitude of the phase θ of the output signal with respect to the input signal is given by the following equation.

θ=jan (−wcR) 但し、Uは入力信号の各周波数、Cはコンデンサ3の容
量、Rは抵抗2の抵抗値。
θ=jan (-wcR) However, U is each frequency of the input signal, C is the capacitance of the capacitor 3, and R is the resistance value of the resistor 2.

従って、抵抗2の大きさを調整することにより上記位相
θの大きさを変化することができ名。
Therefore, by adjusting the magnitude of the resistor 2, the magnitude of the phase θ can be changed.

しかしながら、このような構成の可変位相器を用いると
、位相θの値を変化した時それに伴ってコンデンサの容
量C2抵抗2の抵抗値Rの大きさによって出力信号の振
幅までも変化してしまうという欠点を有していた。また
位相を0〜90°の範囲しか変化できないという欠点を
有していた。
However, when using a variable phase shifter with such a configuration, when the value of the phase θ is changed, the amplitude of the output signal also changes depending on the capacitance C2 of the capacitor and the resistance value R of the resistor 2. It had drawbacks. It also has the disadvantage that the phase can only be changed within a range of 0 to 90 degrees.

〔発明の概要〕[Summary of the invention]

本発明の目的は上記欠点を除去するためになされたもの
で、交流の入力信号と、この入力信号を位相器により位
相を変化することにより得られる位相波信号とを差動増
幅器を用いて処理することにより、入力信号の逆相骨と
位相波信号の正相分とを加算し、更に、この加算して得
られる信号に上記位相波信号の正相分を加算することに
より、この加算結果を出力として得るようにして振幅の
変化があまりなく、かつ位相を広範囲に変化する信号を
得るようにするものであり、以下実施例を用いて詳細に
説明する。
An object of the present invention has been made to eliminate the above-mentioned drawbacks, and uses a differential amplifier to process an AC input signal and a phase wave signal obtained by changing the phase of this input signal using a phase shifter. By adding the negative phase component of the input signal and the positive phase component of the phase wave signal, and further adding the positive phase component of the phase wave signal to the signal obtained by this addition, this addition result can be obtained. This will be explained in detail below using examples.

〔発明の実施例〕[Embodiments of the invention]

第2図は本発明による可変位相装置の一実施例を示す回
路図であり、同図において10は交流の入力信号Smが
信号発生器11から供給される入力端子であり、この入
力端子10に接続される配線12には可変抵抗13とコ
ンデンサ14との直列回路からなる位相器15が接続さ
れ、この位相器15の抵抗13とコンデンサ14との接
続点16より位相波信号SXが出力される。17は第1
差動増幅器、18は第2差動増幅器である。第1作動増
幅器17はエミッタ側がエミッタ抵抗191.192を
介して互いに接続された後、定電流源201を介してア
ースされる一対のトランジスタ21.22から成る。第
2作動増幅器18はエミッタ側がエミッタ抵抗193.
194を介して互いに接続された後、定電流源202を
介してアースされる一対のトランジスタ23,24から
構成される。上記トランジスタ21と 24のコレクタ
側は共通接続された後、負荷抵抗25を介して直流電源
26の正極側に接続され、またトランジスタ22と23
のコレクタ側は共通接続された後、電源26の正極側に
接続される。上記電源26の負極側はアースされる。負
荷抵抗25とトランジスタ21.24のコレクタ側との
接続点は出力端子27に接続され、この出力端子27か
ら出力信号SOが得られる。上記トランジスタ21のベ
ースには直流電源28の正極側が接続され、更に上記電
源28の正極側はバイアス抵抗29を介して上記配線1
2に接続される。従って、トランジスタ21のベースに
は直流バイアスが印加され、またトランジスタ24のベ
ース側には上記バイアス抵抗29を介して直流バイアス
が印加され、更にトランジスタ22.23のベース側に
はバイアス抵抗29.可変抵抗13を介するバイアス電
圧が印加される。
FIG. 2 is a circuit diagram showing an embodiment of the variable phase device according to the present invention. A phase shifter 15 consisting of a series circuit of a variable resistor 13 and a capacitor 14 is connected to the connected wiring 12, and a phase wave signal SX is output from a connection point 16 between the resistor 13 and the capacitor 14 of this phase shifter 15. . 17 is the first
The differential amplifier 18 is a second differential amplifier. The first operational amplifier 17 consists of a pair of transistors 21 and 22 whose emitter sides are connected to each other via emitter resistors 191 and 192 and then grounded via a constant current source 201. The second differential amplifier 18 has an emitter resistor 193.
It is composed of a pair of transistors 23 and 24 that are connected to each other via a constant current source 202 and then grounded via a constant current source 202. The collector sides of the transistors 21 and 24 are connected in common, and then connected to the positive side of a DC power supply 26 via a load resistor 25.
The collector sides of are connected in common and then connected to the positive electrode side of the power supply 26. The negative electrode side of the power source 26 is grounded. A connection point between the load resistor 25 and the collector side of the transistor 21.24 is connected to an output terminal 27, from which an output signal SO is obtained. The base of the transistor 21 is connected to the positive side of a DC power source 28, and the positive side of the power source 28 is connected to the wiring 1 through a bias resistor 29.
Connected to 2. Therefore, a DC bias is applied to the base of the transistor 21, a DC bias is applied to the base side of the transistor 24 via the bias resistor 29, and furthermore, a DC bias is applied to the base side of the transistor 22, 23 via the bias resistor 29. A bias voltage is applied via variable resistor 13.

以上の構成によれば、第1差動増幅器17は電源28の
バイアス電圧と、トランジスタ22のベース側に供給さ
れる位相器15がらの位相波信号Slとの差を演算する
。このとき、トランジスタ22のコレクタ側が抵抗25
の高電位側に接続されており、このトランジスタ22の
ベースに供給される上記位相波信号SXは正相分となっ
て現れる。また、第2差動増幅器18のトランジスタ2
3のベース側に位相波信号Sβが供給されるとともにト
ランジスタ24のベース側に交流の入力信号Smが供給
されるので、第2差動増幅器18の出力は位相波信号s
gの正相分と入力信号Smの逆相骨とを加算した信号と
なる。なお、トランジスタ23のコレクタは抵抗25の
高電位側に接続され、正相分が現れ、トランジスタ24
のコレクタは抵抗25の低電位側に接続され、逆相骨が
現れる。この場合、この加算結果の信号(後述の信号P
)と、上記第1差動増幅器17の出力、すなわぢ位相波
信号SZの正相分と共通の負荷抵抗25に供給されるた
め、ここで加算され、この加算結果が出力端子27から
出力信号SOとして供給される。
According to the above configuration, the first differential amplifier 17 calculates the difference between the bias voltage of the power supply 28 and the phase wave signal Sl from the phase shifter 15 supplied to the base side of the transistor 22. At this time, the collector side of the transistor 22 is connected to the resistor 25.
The phase wave signal SX supplied to the base of this transistor 22 appears as a positive phase component. Also, the transistor 2 of the second differential amplifier 18
Since the phase wave signal Sβ is supplied to the base side of the transistor 3 and the AC input signal Sm is supplied to the base side of the transistor 24, the output of the second differential amplifier 18 is the phase wave signal Sβ.
The signal is the sum of the positive phase component of g and the negative phase component of the input signal Sm. Note that the collector of the transistor 23 is connected to the high potential side of the resistor 25, and a positive phase component appears, and the transistor 24
The collector of is connected to the low potential side of the resistor 25, and an antiphase bone appears. In this case, the signal of this addition result (signal P to be described later)
) and the output of the first differential amplifier 17, that is, the positive phase component of the phase wave signal SZ, are supplied to the common load resistor 25, so they are added here, and this addition result is output from the output terminal 27. Supplied as signal SO.

第3図(al〜fdlは以上の可変位相装置の動作を示
す図であり、同図は入力信号Sm、位相信号s7!、出
力信号SO及び第2差動増幅器の出力信号Pをベクトル
を用いて示した図である。同図から明らかなように、第
2差動増幅器18により入力信号Smの逆相骨と、位相
波信号Sllの正相分とを加算することにより、Pとし
て示すベクトル信号が出力される。また、第1差動増幅
器17から位相波信号Sβの正相分が出力され、この信
号と上記信号Pとが加算された信号が出力端子27から
出力信号SOとして得られることになる。ここで、抵抗
13の抵抗値を0から無限大まで変化すると、各信号が
第3図fa)〜(dlに示すように変化し、出力信号S
Oは抵抗13の抵抗値が大きくなるに従ってその位相角
θが0からほぼ180°まで変化し、しかも、その振幅
(ベクトルの長さ)はほとんど変化しない。振幅の変化
を抑制し得るのは、つぎのとおりである。単に第2増幅
器18からの信号を出力信号として用いたのでは位相の
大幅な変化はある程度得られるものの、第3図から明ら
かなように振幅が変化してしまう。そこで、第1作動増
幅器17から出力される位相波信号Sβの正相分を、第
2作動増幅器18の出力信号に加算することによりこれ
を補償するようにしたものである。
FIG. 3 (al to fdl are diagrams showing the operation of the variable phase device described above, in which the input signal Sm, the phase signal s7!, the output signal SO, and the output signal P of the second differential amplifier are expressed using vectors. As is clear from the figure, by adding the negative phase component of the input signal Sm and the positive phase component of the phase wave signal Sll by the second differential amplifier 18, a vector shown as P is obtained. In addition, the positive phase component of the phase wave signal Sβ is output from the first differential amplifier 17, and a signal obtained by adding this signal and the above signal P is obtained from the output terminal 27 as the output signal SO. Here, when the resistance value of the resistor 13 is changed from 0 to infinity, each signal changes as shown in FIG. 3 fa) to (dl), and the output signal S
As the resistance value of the resistor 13 increases, the phase angle θ of O changes from 0 to approximately 180°, and its amplitude (vector length) hardly changes. The following methods can suppress changes in amplitude. If the signal from the second amplifier 18 is simply used as the output signal, a large change in phase can be obtained to some extent, but as is clear from FIG. 3, the amplitude will change. Therefore, this is compensated for by adding the positive phase component of the phase wave signal Sβ output from the first operational amplifier 17 to the output signal of the second operational amplifier 18.

なお、本実施例においては位相器15として抵抗13の
抵抗値を変化するとして説明したが、コンデンサ14の
容量を変化するものであってもよい。
In this embodiment, the phase shifter 15 has been described as changing the resistance value of the resistor 13, but the phase shifter 15 may change the capacitance of the capacitor 14.

また、第1.第2差動増幅器17.18はバイポーラト
ランジスタから構成することな(FET等の他の増幅素
子から構成してもよい。
Also, 1st. The second differential amplifiers 17 and 18 do not need to be constructed from bipolar transistors (they may be constructed from other amplification elements such as FETs).

また、直流電源28としては電源26の電圧を分圧して
得られる電圧を用いてもよい。
Further, as the DC power source 28, a voltage obtained by dividing the voltage of the power source 26 may be used.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明による可変位相装置によれば
、出力信号の振幅の変化を抑制でき、かつ出力信号の位
相角を広範囲に亘9て変化することができる。また、第
1差動増幅器にもとづきゲインの安定化を図ることがで
きる。
As explained above, according to the variable phase device according to the present invention, it is possible to suppress changes in the amplitude of the output signal and to change the phase angle of the output signal over a wide range. Further, the gain can be stabilized based on the first differential amplifier.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の可変位相器の一例を示す回路図、図であ
る。 10・・・入力端子、13・・・可変抵抗、14・・・
コンデンサ、15・・・位相器、17・・・第1差動増
幅器、1B・・・第2差動増幅器、21〜24・・・ト
ランジスタ、27・・・出力端子。 代理人 大 岩 増 雄(ばか2名) 手続補正書 昭和タ/年ゲ月/Z日 持許庁長宮殿 2、発明の名称 可変位相装置 3、補正をする者 5、補正の対象 明細書の「発明の詳細な説明」の欄。 66補正の内容 (1)明細書第3頁第11行目「あまりなく」とあるの
を「少なく」と補正する。 (2)明細書第5頁第11行目、第12行目「トランジ
スタ22のコレクタ側が−・−接続されており」とある
のを「出力端子27には」と補正する。 (3)明細書第5頁第20行目ないし第6頁第4行目「
なお、トランジスタ23のコレクター−一−−−−逆相
分が現われる。」とあるのを削除する。 (4)明細書第8真第7行目、第8行目「また、第1差
動増幅器にもとづきゲインの安定化を図ることができる
。」とあるのを削除する。 以j二
FIG. 1 is a circuit diagram showing an example of a conventional variable phase shifter. 10...Input terminal, 13...Variable resistor, 14...
Capacitor, 15... Phase shifter, 17... First differential amplifier, 1B... Second differential amplifier, 21-24... Transistor, 27... Output terminal. Agent Masuo Oiwa (2 idiots) Procedural amendment document Showa Ta/Getsu/Z date 2, name of the invention variable phase device 3, person making the amendment 5, description of the specification to be amended "Detailed description of the invention" column. Contents of the 66 Amendment (1) In the 11th line of page 3 of the specification, the phrase "not much" is amended to read "few." (2) In the 11th and 12th lines of page 5 of the specification, "the collector side of the transistor 22 is connected to..." is corrected to "to the output terminal 27." (3) From page 5, line 20 to page 6, line 4 of the specification “
Note that the collector 1 of the transistor 23 appears with an opposite phase. ” will be deleted. (4) In the seventh and eighth lines of the specification, the statement ``In addition, the gain can be stabilized based on the first differential amplifier.'' is deleted. 2

Claims (1)

【特許請求の範囲】[Claims] (11交流の入力信号が供給される位相器と、この位相
器から出力される位相波信号が一方の入力端子に供給さ
れ、直流のバイアスが他方の入力端子に供給されて上記
位相波信号の正相分を出力する第1差動増幅器と、上記
入力信号が一方の入力端子に供給され、上記位相波信号
が他方の入力端子に供給されて上記入力信号の逆相骨と
上記位相波信号の正相分との和を出力する第2差動増幅
器とを備え、上記第1差動増幅器の出力と第2差動増幅
器の出力とを加算して得られる信号を出力するようにし
たことを特徴とする可変位相装置。
(11 A phase shifter to which an AC input signal is supplied, a phase wave signal outputted from this phase shifter is supplied to one input terminal, and a DC bias is supplied to the other input terminal, and the phase wave signal output from the phase shifter is supplied to one input terminal. a first differential amplifier that outputs a positive phase component, the input signal is supplied to one input terminal, the phase wave signal is supplied to the other input terminal, and a negative phase component of the input signal and the phase wave signal are supplied; and a second differential amplifier that outputs the sum of the positive phase component of the differential amplifier, and outputs a signal obtained by adding the output of the first differential amplifier and the output of the second differential amplifier. A variable phase device featuring:
JP19297083A 1983-10-13 1983-10-13 Variable phase device Pending JPS6083413A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19297083A JPS6083413A (en) 1983-10-13 1983-10-13 Variable phase device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19297083A JPS6083413A (en) 1983-10-13 1983-10-13 Variable phase device

Publications (1)

Publication Number Publication Date
JPS6083413A true JPS6083413A (en) 1985-05-11

Family

ID=16300070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19297083A Pending JPS6083413A (en) 1983-10-13 1983-10-13 Variable phase device

Country Status (1)

Country Link
JP (1) JPS6083413A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4806888A (en) * 1986-04-14 1989-02-21 Harris Corp. Monolithic vector modulator/complex weight using all-pass network

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4806888A (en) * 1986-04-14 1989-02-21 Harris Corp. Monolithic vector modulator/complex weight using all-pass network

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