JPS6083299A - Charge coupled semiconductor device - Google Patents

Abstract

PURPOSE:To increase density by distributing charges from a vertical shift register to two horizontal shift registers. CONSTITUTION:Transfer electrodes 38-42 of a horizontal shift register operates as storage electrodes and electrodes 43-47 operate as barrier electrodes. Areas 52-59 are areas for generating a potential barrier at gap parts of the storage electrodes 38-42. Two transfer electrodes are arranged corresponding to one vertical shift register. Further, two transfer gate electrodes 50 and 51 are arranged between two horizontal shift registers 31 and 32. Areas 60 and 61 shown as shaded parts are channel stoppers. One vertical shift register is arranged for every two electrodes of the horizontal shift register, so the horizontal density is made twice as large as that obtained by arranging one vertical shift register for every four electrodes of the horizontal shift register as usual.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge-coupled device, and more particularly to a charge-coupled device having a plurality of vertical shift registers and horizontal shift registers.

Charge-coupled devices (hereinafter referred to as COD) are based on conventional advanced integrated circuit technology, and their development has progressed rapidly along with their development, and in recent years they have been used in various applications such as solid-state imaging, analog delay lines, and memory. It became so. In particular, solid-state imaging devices using COD have many features such as low power consumption, small size, and light weight, and their development has been active in recent years. Generally CO
Solid-state photography] Elements are classified into frame transfer type and interline type, but both types currently have a large number of pixels.

There is a trend toward higher density. These solid-state image sensing devices have a plurality of vertical shift registers and horizontal shift registers, but as the number of pixels and density increases, the element pitch of the horizontal shift registers will be reduced.

Therefore, the horizontal density is usually limited by the minimum element pitch of the horizontal shift register.

Figure 1 shows the vertical shift register of a conventional solid-state image sensor,
A plan view of a connection part with a horizontal shift register is shown.

In the figure, 1 is a signal transfer channel of a horizontal shift register, 2 to 4 is a signal transfer channel of a vertical shift register, 6 to 15 are transfer electrodes constituting a horizontal shift register,
16 is one transfer electrode constituting a vertical shift register; 21
is the transfer gate electrode adjacent to the final transfer electrode 16 of the vertical shift register and the transfer electrodes 6 to 10 of the horizontal shift register 1. Further, in this device, two-phase drive is assumed for driving the horizontal shift register, and transfer electrodes 6 to 10 of the horizontal shift register act as storage electrodes, and electrodes 11 to 15 act as barrier electrodes.

Reference numerals 17 to 18 indicate areas for generating a potential barrier in the gaps between the storage electrodes 6 to 100. In the figure, the pitch of one element of the horizontal shift register is 4
One transfer electrode, for example, the horizontal electrode length of 6.11° and 7.12° is determined, and therefore the horizontal pinch of the vertical shift registers 2 to 4 is also determined by the pitch of one element of the horizontal shift register. That is, the density of the vertical shift register is determined by the minimum processing size of the electrodes of the horizontal shift register. For this reason, it is impossible to achieve a large number of pixels and high density using conventional device structures.

An object of the present invention is to provide a new charge-coupled semiconductor device that eliminates such conventional drawbacks.

According to the present invention, the vertical shift register group includes a plurality of columns of vertical shift registers made of charge-coupled devices, and a horizontal shift register group of M rows arranged in a direction perpendicular to the signal transfer direction of the shift register group, and between the register group and the first horizontal shift register of the horizontal shift register group and the M
Transfer gate electrodes are arranged parallel to the signal transfer direction of the horizontal shift registers between the horizontal shift registers of the rows and between the horizontal shift registers of the M rows. A charge-coupled semiconductor device is obtained which is characterized in that the transfer gate electrodes arranged between the shift registers are constituted by a plurality of electrodes.

The present invention will be explained below using the drawings.

FIG. 2 shows an embodiment according to the present invention, and shows a plan view of a connecting portion between a vertical shift register and a horizontal shift register. In the figure, 31 and 32 are signal transfer channels of the first and second horizontal shift registers, 33 to 37 are (=M transfer channels) of the vertical shift register, 38 to 47 are transfer electrodes of the horizontal shift register, and 48 is a vertical shift register. One transfer electrode of the register, 49 to 51, is the first and second transfer electrode, respectively.
and a third transfer gate electrode. In this device, two-phase drive is assumed for driving a two-channel horizontal shift register, and the transfer electrode 38 of the horizontal shift register
42 act as storage electrodes, and 43 to 47 act as barrier electrodes. Reference numerals 52 to 59 are regions for generating a potential barrier in the gaps between the storage electrodes 38 to 42. This embodiment shows an example in which signal charges sent from a vertical shift register are distributed and transferred to two horizontal shift registers, and two horizontal transfer electrodes are arranged corresponding to one vertical shift register. ing. Further, two transfer gate electrodes 50, 51 are arranged between the two horizontal shift registers 31, 32. Area 6 indicated by diagonal lines
0.61 is the channel stopper. Next, the operation of this device will be explained. FIG. 3 shows an example of the drive waveform used to drive the present device. The charge accumulated in the final transfer electrode 48 (φv4) of the vertical shift register at time t is transferred to the first transfer electrode 49 (φLl) by turning on the first transfer gate electrode 49 (φLl) at the same time that φv4 turns off at time t. Move below the transfer gate electrode No. 1.

Next, at time t, horizontal shift register transfer mi&38
, 43° 40.45, 42.47 (φ,) are turned on, this charge moves below the storage electrodes 38, 40.42 of the transfer electrode to which the pulse φ, is applied. At this time, the other pulse φ1 that drives the horizontal shift register remains off, so the charges under the first transfer gate electrode 49 in the vertical shift registers 34 and 36 corresponding to the pulse φ1 do not move and remain as they are. maintain condition. Then time t
When the pulse φ is turned off at step 4 and the pulse φLt applied to the second transfer gate electrode 50 is turned on, the charges under the storage electrodes 38, 40, 42 move to under the second transfer gate electrode 50. At the same time, the pulse φ is turned on, and the electric wire remaining under the agate electrode 49 of the first transformer 7 is transferred to the storage electrode 3 of the first horizontal shift register.
9, 4] move downward (time ts). This seven φ remains off. Next, at time t6, the charge under the agate electrode of the second transformer 7 of MfJ moves to under the third transformer gate electrode by turning on the pulse φL.

Further, this charge is transferred to the storage electrodes 38 and 4 of the second horizontal shift register by turning on φ at time t7.
Move down by 0.42. At this time, the signal charges accumulated under the storage electrodes 39 and 41 of the first horizontal shift register move to the left and are stored in the storage electrodes 38 and 40 of the first horizontal shift register. (Time to
).

In this state, the signal 1L transferred from the vertical shift registers 34.36 is transferred to the first horizontal shift register, and the signal σj transferred from the vertical shift registers 33, 35.37 is transferred to the second horizontal shift register. This means that it is stored in the register. As a result, e signal charges are distributed to the two horizontal shift registers for each alternate column in the vertical direction of the vertical shift register.

Therefore, with the element configuration shown in this embodiment, the horizontal shift register has 2il! Since one vertical shift register can be arranged for each pole, the density in the horizontal direction can be doubled compared to the conventional device in which one vertical shift register is arranged for every four electrodes of the horizontal shift register. In this embodiment, high density is achieved by distributing the signal charge from the vertical shift register to two horizontal shift registers, but by applying the gist of the present invention, it is possible to It is also possible to distribute the signal charges to a plurality of horizontal shift registers.

As described above, according to the present invention, a horizontally high-density charge-coupled semiconductor device can be realized.

[Brief explanation of drawings]

FIG. 1 shows a connection section between a vertical shift register and a horizontal shift register in a conventional charge-coupled semiconductor device, and FIG. 2 shows an embodiment of a connection section between a vertical shift register and a horizontal shift register in a charge-coupled semiconductor device according to the present invention. , and FIG. 3 shows an example of a driving waveform of a charge-coupled semiconductor device according to the present invention. In the figure, 1°31.32 are signal transfer channels of the horizontal shift register, 2-4, 33-37 are signal transfer channels of the vertical shift register, 6-15.38-47 are transfer electrodes of the horizontal shift register, 16. 48 is a transfer electrode of the vertical shift register, and 21, 49, 50, and 51 are transformer 7 agate electrodes. Figure 1 Figure 2

Claims (1)

[Claims] A group of vertical shift registers with multiple columns using charge-coupled devices,
a horizontal shift register group of M rows arranged perpendicularly to the signal transfer direction of the shift register group, and between the vertical shift register group and a first horizontal shift register of the horizontal shift register group; In the charge-coupled semiconductor device, transfer gate electrodes are arranged between the M rows of horizontal shift registers in parallel to the signal transfer direction of the horizontal shift registers, wherein the transfer gate electrodes are arranged between the M rows of horizontal shift registers. A charge-coupled semiconductor device comprising a plurality of electrodes.