JPS6082821U - Differential amplifier bias circuit - Google Patents

Differential amplifier bias circuit

Info

Publication number
JPS6082821U
JPS6082821U JP17404783U JP17404783U JPS6082821U JP S6082821 U JPS6082821 U JP S6082821U JP 17404783 U JP17404783 U JP 17404783U JP 17404783 U JP17404783 U JP 17404783U JP S6082821 U JPS6082821 U JP S6082821U
Authority
JP
Japan
Prior art keywords
current
transistor
circuit
base
inverts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17404783U
Other languages
Japanese (ja)
Other versions
JPH0115224Y2 (en
Inventor
和久 石黒
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP17404783U priority Critical patent/JPS6082821U/en
Publication of JPS6082821U publication Critical patent/JPS6082821U/en
Application granted granted Critical
Publication of JPH0115224Y2 publication Critical patent/JPH0115224Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の差動増幅器のバイアス回路を示す回路
図、第2図は本考案の一実施例を示す回路図、第3図は
その一部の別の実施例を示す回路図、及び第4図は第3
図の更に別の実施例を示す回路図である。 主な図番の説明、21−・・差動増幅器、24・・・定
電流トランジスタ、25・・・第1トランジスタ、3章
、夛夛、1長、38・・・電流反転回路。
FIG. 1 is a circuit diagram showing a bias circuit of a conventional differential amplifier, FIG. 2 is a circuit diagram showing one embodiment of the present invention, and FIG. 3 is a circuit diagram showing another embodiment of a part thereof. and Figure 4 is the third
FIG. 7 is a circuit diagram showing still another embodiment of the figure. Explanation of main figure numbers, 21--Differential amplifier, 24--Constant current transistor, 25--First transistor, Chapter 3, Group, 1 length, 38--Current inversion circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] エミッタが共通接続された第1及び第2増幅用トランジ
スタと、該第1及び第2増幅用トランジスタの共通エミ
ッタに接続された定電流トランジスタとを備える差動増
幅器にバイアス電流を供給する為のバイアス回路であっ
て、前記定電流用トランジスタとベース及びエミッタが
共通接続されたトランジスタと、該トランジスタのコレ
クタ電流を供給する電流源と、前記トランジスタのコレ
クタ電流と前記電流源の出力電流との差電流を反転する
第1電流反転回路と、該第1電流反転回路の出力電流を
反転し、前記定電流トランジスタのベース電流を発生す
る第2電流反転回路と、前記第1電流反転回路の出力電
流を反転し、前記第1増幅用トランジスタのベース電流
を発生する第3電流反転回路と、前記第1電流反転回路
の出力電流を反転し、前記第2増幅用トランジスタのベ
ース電流を発生する第4電流反転回路とから成り、前記
第1乃至第4電流反転回路の反転比を所定値に設定する
ことにより、前記第1及び第2増幅用トランジスタのベ
ース電流を前記定電流トランジスタのベース電流の に
したことを特徴とする差動増幅器のバイアス回路。
Bias for supplying bias current to a differential amplifier comprising first and second amplification transistors whose emitters are commonly connected, and a constant current transistor connected to the common emitters of the first and second amplification transistors. The circuit includes a transistor whose base and emitter are commonly connected to the constant current transistor, a current source that supplies a collector current of the transistor, and a difference current between the collector current of the transistor and the output current of the current source. a first current inverting circuit that inverts the output current of the first current inverting circuit; a second current inverting circuit that inverts the output current of the first current inverting circuit to generate a base current of the constant current transistor; a third current inversion circuit that inverts and generates a base current of the first amplification transistor; and a fourth current that inverts the output current of the first current inversion circuit and generates a base current of the second amplification transistor. and an inversion circuit, and by setting the inversion ratios of the first to fourth current inversion circuits to predetermined values, the base currents of the first and second amplification transistors are made to be equal to the base current of the constant current transistor. A differential amplifier bias circuit characterized by:
JP17404783U 1983-11-09 1983-11-09 Differential amplifier bias circuit Granted JPS6082821U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17404783U JPS6082821U (en) 1983-11-09 1983-11-09 Differential amplifier bias circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17404783U JPS6082821U (en) 1983-11-09 1983-11-09 Differential amplifier bias circuit

Publications (2)

Publication Number Publication Date
JPS6082821U true JPS6082821U (en) 1985-06-08
JPH0115224Y2 JPH0115224Y2 (en) 1989-05-08

Family

ID=30379004

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17404783U Granted JPS6082821U (en) 1983-11-09 1983-11-09 Differential amplifier bias circuit

Country Status (1)

Country Link
JP (1) JPS6082821U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5214336A (en) * 1975-07-25 1977-02-03 Hitachi Denshi Ltd High input impedance differential amplifier circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5214336A (en) * 1975-07-25 1977-02-03 Hitachi Denshi Ltd High input impedance differential amplifier circuit

Also Published As

Publication number Publication date
JPH0115224Y2 (en) 1989-05-08

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