JPS6082353U - absolute value circuit - Google Patents

absolute value circuit

Info

Publication number
JPS6082353U
JPS6082353U JP16978583U JP16978583U JPS6082353U JP S6082353 U JPS6082353 U JP S6082353U JP 16978583 U JP16978583 U JP 16978583U JP 16978583 U JP16978583 U JP 16978583U JP S6082353 U JPS6082353 U JP S6082353U
Authority
JP
Japan
Prior art keywords
operational amplifier
resistor
diode
input terminal
inverting input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16978583U
Other languages
Japanese (ja)
Other versions
JPH0222739Y2 (en
Inventor
宮野 正
Original Assignee
株式会社明電舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社明電舎 filed Critical 株式会社明電舎
Priority to JP16978583U priority Critical patent/JPS6082353U/en
Publication of JPS6082353U publication Critical patent/JPS6082353U/en
Application granted granted Critical
Publication of JPH0222739Y2 publication Critical patent/JPH0222739Y2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)
  • Networks Using Active Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来の絶対値回路図、第3図は本考
案の一実施例を示す回路図である。 XC□、 IC2・・・・・・演算増幅器、R1,R2
,R3,R4゜R5・・・・・・抵抗、D□、D2・・
・・・・ダイオード。
1 and 2 are conventional absolute value circuit diagrams, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. XC□, IC2... operational amplifier, R1, R2
, R3, R4゜R5...Resistance, D□, D2...
····diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号を非反転入力端子の入力とし出力端子が第1の
ダイオードD□のカソード及び第2のダイオードD2の
アノードに接続され、第1のダイオードD工のアノード
が反転入力端子に接続される第1の演算増幅器IC1と
、上記第2のダイオードD2のカソードが非反転入力端
子に接続され出力端子が絶縁値出力とさえると共に抵抗
R3を通して反転入力端子に接続され該反転入力端子に
は接地抵抗R2と上記第1のダイオードのアノードに接
続される抵初只、の一端が接続される第2の演算増幅器
IC2とを備え、入力信号が負極性では第1の演算増幅
器が電圧ホロワとして動作して抵抗R1を通して第2の
演算増幅器で反転増幅され、入力信号が正極性では第1
の演算増幅器が第2の演算増幅器を通した抵93と抵抗
R□を通した帰還路で非反転増幅器として動作すること
で高入力インピーダンスで第2の演算増幅器の出力に絶
対値出力を得ることを特徴とする絶縁値回路。
The input signal is input to a non-inverting input terminal, the output terminal is connected to the cathode of the first diode D and the anode of the second diode D2, and the anode of the first diode D is connected to the inverting input terminal. The cathodes of the operational amplifier IC1 of No. 1 and the cathode of the second diode D2 are connected to the non-inverting input terminal, and the output terminal serves as an insulation value output, and is connected to the inverting input terminal through the resistor R3, and the inverting input terminal is connected to the ground resistor R2. and a second operational amplifier IC2 to which one end of the resistor is connected to the anode of the first diode, and when the input signal has negative polarity, the first operational amplifier operates as a voltage follower. The input signal is inverted and amplified by the second operational amplifier through the resistor R1.
By operating the operational amplifier as a non-inverting amplifier in the feedback path through the resistor 93 and resistor R□ through the second operational amplifier, an absolute value output can be obtained at the output of the second operational amplifier with high input impedance. An isolated value circuit featuring:
JP16978583U 1983-11-01 1983-11-01 absolute value circuit Granted JPS6082353U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16978583U JPS6082353U (en) 1983-11-01 1983-11-01 absolute value circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16978583U JPS6082353U (en) 1983-11-01 1983-11-01 absolute value circuit

Publications (2)

Publication Number Publication Date
JPS6082353U true JPS6082353U (en) 1985-06-07
JPH0222739Y2 JPH0222739Y2 (en) 1990-06-20

Family

ID=30370833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16978583U Granted JPS6082353U (en) 1983-11-01 1983-11-01 absolute value circuit

Country Status (1)

Country Link
JP (1) JPS6082353U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503743A (en) * 1973-05-16 1975-01-16
JPS59113769U (en) * 1983-01-21 1984-08-01 日本アビオニクス株式会社 absolute value circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503743A (en) * 1973-05-16 1975-01-16
JPS59113769U (en) * 1983-01-21 1984-08-01 日本アビオニクス株式会社 absolute value circuit

Also Published As

Publication number Publication date
JPH0222739Y2 (en) 1990-06-20

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