JPS6081855A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6081855A
JPS6081855A JP19021983A JP19021983A JPS6081855A JP S6081855 A JPS6081855 A JP S6081855A JP 19021983 A JP19021983 A JP 19021983A JP 19021983 A JP19021983 A JP 19021983A JP S6081855 A JPS6081855 A JP S6081855A
Authority
JP
Japan
Prior art keywords
circuit
transistor
bipolar transistor
bonding pads
bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19021983A
Other languages
Japanese (ja)
Inventor
Akira Yamagishi
明 山岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP19021983A priority Critical patent/JPS6081855A/en
Publication of JPS6081855A publication Critical patent/JPS6081855A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Abstract

PURPOSE:To enable to check the characteristics of a semiconductor device in a wafer or pellet state by isolating a circuit portion which extends from a bipolar transistor in a bipolar integrated circuit device, and separating and providing in parallel bonding pads at the ends. CONSTITUTION:A plurality of circuit elements including a bipolar transistor 2 are formed on a pelletlike semiconductor substrate 1, circuit portions 3, 4, 5 which extends from the base, collector and emitter are isolated, and bonding pads 6a, 6b, 7a, 7b, 8a, 8b are isolated as pairs and provided in parallel at the ends. Measuring elements are contacted with the pads 6a, 7a, 8a to measure the characteristics of the transistor 2, and metal members 9 are used to shortcircuit between the bonding pads of pairs only the transistors 2 which satisfy the characteristics. Thus, the supply of products having improper characteristics can be completely prevented.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体装置に関し、特にバイポーラ集積回路装
置において、特定のバイポーラトランジスタの特性をウ
ェーハ段階でチェック可能に構成した基板−構造に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor device, and more particularly to a substrate structure configured to enable checking the characteristics of a specific bipolar transistor at the wafer stage in a bipolar integrated circuit device.

〔背景技術〕[Background technology]

一般にバイポーラアナログ集積回路装置は半導体基板に
用途に応じたバイポーラトランジスタを含む複数の回路
要素が形成され、適宜に配線接続して構成されており、
例えば3端子レギユレータ。
In general, a bipolar analog integrated circuit device is constructed by forming a plurality of circuit elements including bipolar transistors depending on the application on a semiconductor substrate, and connecting them with wires as appropriate.
For example, a 3-terminal regulator.

カーステレオ用パワーアンプなどに適用され、広く使用
されている。
It is widely used in car stereo power amplifiers, etc.

例えば第1図は8端子レギユレータの回路構成図であっ
て、レギュレータ回路Aと過熱保護回路Bとから構成さ
れている。そして、レギュレータ回路Aは出力段パワー
トランジスタC,アクティブロードD、電流制限回路E
、基準電圧回路F。
For example, FIG. 1 is a circuit diagram of an eight-terminal regulator, which is composed of a regulator circuit A and an overheat protection circuit B. The regulator circuit A includes an output stage power transistor C, an active load D, and a current limit circuit E.
, reference voltage circuit F.

誤差増巾回路Gなどからなり、入力端子INに入力電圧
が印加されると、これを基準電圧と比較してその誤差分
を出力側に帰還し出力端子OUTの出力電圧を一定にす
る。又、過熱保護回路Bは内外要因によって温度上昇が
設定された動作温度を越えると過熱制限用トランジスタ
Trが導通し、レギュレータ回路Aの出力段を遮断して
装置全体の保護が図られる。
It consists of an error amplification circuit G and the like, and when an input voltage is applied to the input terminal IN, it is compared with a reference voltage and the error is fed back to the output side to keep the output voltage at the output terminal OUT constant. Further, in the overheat protection circuit B, when the temperature rise exceeds a set operating temperature due to internal or external factors, the overheat limiting transistor Tr becomes conductive, and the output stage of the regulator circuit A is cut off, thereby protecting the entire device.

ところで、この過熱保護回路Bは例えば第2図に示すよ
うに構成されている。この回路において、B点電圧は第
1のトランジスタTr、のVBEより若干低い目に設定
されており、何らかの原因により過度に温度上昇すると
、第1のトランジスタTr。
By the way, this overheat protection circuit B is configured as shown in FIG. 2, for example. In this circuit, the voltage at point B is set to be slightly lower than the VBE of the first transistor Tr, and if the temperature rises excessively for some reason, the voltage at the first transistor Tr.

のVBEが2 m V / ℃の割合で低下し、B点電
圧より低くなると導通し、これに伴って第2のトランジ
スタTr、も導通してレギュレータ回路Aが保護される
VBE decreases at a rate of 2 mV/° C. and becomes conductive when it becomes lower than the voltage at point B. Accordingly, the second transistor Tr also becomes conductive and the regulator circuit A is protected.

この回路において、それぞれのトランジスタは製造時の
条件によって特性が大きく変化することが知られている
のであるが、その製造過程において特定のトランジスタ
のみの特性をチェックすることは全くできない。このた
めに、製品化された状態での特性検査によって始めて良
否の判定がなされることから、不良と判定されたものは
半導体素子を固定する放熱板、リード、モールド樹脂が
無駄になり、集積回路装置のコストへの影響が大きくな
るという問題がある。
In this circuit, it is known that the characteristics of each transistor vary greatly depending on the manufacturing conditions, but it is completely impossible to check the characteristics of only a specific transistor during the manufacturing process. For this reason, pass/fail judgment is only made through characteristic inspection of the product, and if the product is judged to be defective, the heat sinks, leads, and molding resin that fix the semiconductor element are wasted, and the integrated circuit There is a problem that the cost of the device is greatly affected.

又、カーステレオ用アンプに適用されるパワー集積回路
装置にあっては出力の歪率がトランジスタの電流増巾率
hFEに影響され、hFEが大きくなると歪率は小さく
なり、逆にhFEが小さくなると歪率は大人くなる。し
かし乍ら、製造過程では所望するトランジスタの特性チ
ェ・ツクができないために、止むを得ず完成品の特性検
査によってその良否を判定している。このために、」二
速同様に放熱板、リード、モールド樹脂が無駄となり、
コストへの影響が大きくなるものである。
In addition, in a power integrated circuit device applied to a car stereo amplifier, the output distortion rate is affected by the current amplification rate hFE of the transistor; as hFE increases, the distortion rate decreases, and conversely, as hFE decreases, the distortion rate decreases. The distortion rate becomes an adult. However, since it is not possible to check the desired characteristics of the transistor during the manufacturing process, it is unavoidable to check the characteristics of the finished product to determine its acceptability. For this reason, heat sinks, leads, and molding resin are wasted as in the second gear.
This will have a large impact on costs.

従って、集積回路装置における特定のトランジスタ スタウエーハないしベレット状態にて特性チェックでき
れば、不良素子の組み込みを事前に防止できる上、それ
に要する材料も有効に活用できることもあって、作業能
率は勿論のこと、コスト面の大巾な改善が可能となり望
ましいものである。
Therefore, if the characteristics of a specific transistor in an integrated circuit device can be checked in the wafer or pellet state, it is possible to prevent the incorporation of defective elements in advance, and the materials required for it can be used effectively, which not only improves work efficiency. This is desirable because it enables a significant improvement in cost.

〔発明の開示〕[Disclosure of the invention]

それ故に、本発明の目的は簡単な構成によってウェーハ
ないしベレット状態において特定のバイポーラトランジ
スタの特性をチェックできる半導体装置を提供すること
にある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor device that allows checking the characteristics of a specific bipolar transistor in a wafer or pellet state with a simple configuration.

そして、本発明の特徴は同一半導体基板内にバイポーラ
トランジスタを含む複数の回路要素を具え、それぞれを
適宜に配線接続したものにおいて、上記特定のバイポー
ラトランジスタより延びる少くとも2つの回路部分を分
離すると共に、それぞれの端部にボンディングパ・ソド
部を電気的な接続関係を有するように離隔並設し、かつ
特定のバイポーラトランジスタの特性チェック後に隣接
するそれぞれのポンディングパッド部を短絡するように
したことにある。
A feature of the present invention is that in a semiconductor substrate including a plurality of circuit elements including bipolar transistors, each of which is connected with appropriate wiring, at least two circuit parts extending from the specific bipolar transistor are separated, and , bonding pads and pads are arranged in parallel at each end so as to have an electrical connection relationship, and after checking the characteristics of a specific bipolar transistor, the adjacent bonding pads are short-circuited. It is in.

この発明によれば、特定のバイポーラトランジスタより
延びる回路部分を分離し、それぞれの端部にポンディン
グパ・ソド部を離隔並設しているので、ウェハーないし
ベレット状態において特性チェックを行うことができる
。このために、特定のトランジスタの特性が規格を満足
するもののみを組立ての対象にできる関係で、放熱板、
リード。
According to this invention, since the circuit portion extending from a specific bipolar transistor is separated and the bonding pad portions are arranged in parallel and separated from each other at each end, characteristics can be checked in a wafer or pellet state. For this reason, heat sinks,
Lead.

 5− モールド樹脂などの材料を有利に利用でき、コストも有
効に低減できる。
5- Materials such as mold resin can be used advantageously, and costs can be effectively reduced.

〔発明を実施するための最良の形態〕[Best mode for carrying out the invention]

次に本発明のバイポーラ集積回路装置への適用例につい
て第3図〜第4図を参照して説明する。
Next, an example of application of the present invention to a bipolar integrated circuit device will be described with reference to FIGS. 3 and 4.

第3図において、1はベレット状の半導体基板であって
、それにはバイポーラトランジスタ2を含む複数の回路
要素が形成されており、適宜に配線されている。そして
、バイポーラトランジスタ2のベース、コレクタ、エミ
ッタより延びる回路部分8,4.5は分離され、それぞ
れの端部にポンディングパッド部6a、6b、712.
7b、8a、8bが対をなすように離隔並設されている
In FIG. 3, 1 is a pellet-shaped semiconductor substrate on which a plurality of circuit elements including a bipolar transistor 2 are formed and wired as appropriate. The circuit portions 8, 4.5 extending from the base, collector, and emitter of the bipolar transistor 2 are separated, and bonding pad portions 6a, 6b, 712.
7b, 8a, and 8b are arranged in parallel and separated from each other to form a pair.

この状態において、ボンでイングパッド部6a。In this state, press the ing pad part 6a with a bong.

7a、8aに測子を接触させてトランジスタ2の特性を
測定する。特性値が規格を満足するものについてのみ、
第4図に示すように、対をなすポンディングパ1.ド部
6a−6b間 712−7b間。
A probe is brought into contact with 7a and 8a to measure the characteristics of the transistor 2. Only for those whose characteristic values satisfy the standards,
As shown in FIG. 4, a pair of bonding pads 1. between 712 and 7b.

8a、8b間を金属部材9にて短絡する。以下通常の方
法にて組立する。
A metal member 9 short-circuits between 8a and 8b. Assemble the following in the usual way.

 6− この実施例によれば、特定のトランジスタ2の特性をウ
ェーハないしベレ、7 )状態にて測定できるために、
特性不良品の組立工程への供給を完全に防止できる。従
って、材料の有効活用のみならず、コストも有効に低減
できる。
6- According to this embodiment, since the characteristics of a specific transistor 2 can be measured in the wafer or flat state, 7)
It is possible to completely prevent products with defective characteristics from being supplied to the assembly process. Therefore, not only can materials be used effectively, but costs can also be effectively reduced.

第5図は本発明の他の実施例を示すものであって、ボン
ディングパリド部612−6b、 ’Te1−’1b、
8a−8bをポンディングワイヤ10のボン接続し、樹
脂モールド後に樹脂材より露呈するボンディングワイヤ
10を切断するものである。
FIG. 5 shows another embodiment of the present invention, in which bonding pad portions 612-6b, 'Te1-'1b,
8a and 8b are bonded to a bonding wire 10, and the bonding wire 10 exposed from the resin material is cut after resin molding.

尚、本発明において、ポンディングパッド部ハトランジ
スタより延びるすべての回路部分に形成したが、2つの
回路部分にのみ形成することもできる。又、複数のトラ
ンジスタに適用することもできる。
In the present invention, the bonding pad portion is formed in all the circuit portions extending from the transistor, but it may also be formed in only two circuit portions. Moreover, it can also be applied to a plurality of transistors.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の集積回路装置の電気回路図、第3図は本
発明の一実施倒を示す要部概略図、第4図はポンディン
グパッド部を短絡l−だ状態を示す要部概略図、第5図
は本発明の他の実施例を示す要部概略図である。 図中、1は半導体基板、2はパイポーラトランジスタ、
8.j、5は回路部分、612,6b、7a、7b、B
a、Bbはポンディングパッド部、9.10は金属部材
である。 すA1 第3図 第4図 第5図 手 続 補 正 書 (方式) %式%) ■、事件の表示 昭和58年 特 許 願第190219号2発明の名称 半導体装置 3、補正をする者 事件との関係 特 許 出願人 電話 大津 (0’775)37−21007補止の内
容 (1) 第7頁第19行の「電気回路図、」09次に「
第2図は第1図における過熱保論回路の詳細回路図、」
全挿入する。
Fig. 1 is an electric circuit diagram of a conventional integrated circuit device, Fig. 3 is a schematic diagram of the main part showing one implementation of the present invention, and Fig. 4 is a schematic diagram of the main part showing a state in which the bonding pad section is short-circuited. FIG. 5 is a schematic view of a main part showing another embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a bipolar transistor,
8. j, 5 is the circuit part, 612, 6b, 7a, 7b, B
a and Bb are bonding pad parts, and 9.10 is a metal member. A1 Figure 3 Figure 4 Figure 5 Procedures Amendment (method) % formula %) ■, Indication of the case 1982 Patent Application No. 190219 2 Name of the invention Semiconductor device 3. Case of the person making the amendment Relationship with Patent Applicant Telephone: Otsu (0'775) 37-21007 Supplemental Contents (1) "Electrical circuit diagram," on page 7, line 19, 09, followed by "
Figure 2 is a detailed circuit diagram of the overheating guarantee circuit in Figure 1.
Insert all.

Claims (1)

【特許請求の範囲】[Claims] 同一半導体基板内にバイポーラトランジスタを含む複数
の回路要素を具え、それぞれを適宜に配線接続したもの
において、上記特定のバイポーラトランジスタより延び
る少くとも2つの回路部分を分離すると共に、それぞれ
の端部にポンディングパッド部を電気的な接続関係を有
するように離隔並設し、かつ特定のバイポーラトランジ
スタの特性チェ・ツク後に隣接するそれぞれのポンディ
ングパッド部を短絡するようにしたことを特徴とする半
導体装置。
In a semiconductor substrate including a plurality of circuit elements including bipolar transistors, each of which is connected with appropriate wiring, at least two circuit parts extending from the specific bipolar transistor are separated, and a pump is provided at each end. A semiconductor device characterized in that bonding pad portions are arranged in parallel and separated from each other so as to have an electrical connection relationship, and each adjacent bonding pad portion is short-circuited after checking the characteristics of a specific bipolar transistor. .
JP19021983A 1983-10-11 1983-10-11 Semiconductor device Pending JPS6081855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19021983A JPS6081855A (en) 1983-10-11 1983-10-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19021983A JPS6081855A (en) 1983-10-11 1983-10-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6081855A true JPS6081855A (en) 1985-05-09

Family

ID=16254452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19021983A Pending JPS6081855A (en) 1983-10-11 1983-10-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6081855A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007258627A (en) * 2006-03-27 2007-10-04 Hitachi Ltd Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4919029A (en) * 1972-03-27 1974-02-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4919029A (en) * 1972-03-27 1974-02-20

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007258627A (en) * 2006-03-27 2007-10-04 Hitachi Ltd Semiconductor device

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