JPS6081663A - Microcomputer - Google Patents
MicrocomputerInfo
- Publication number
- JPS6081663A JPS6081663A JP58189492A JP18949283A JPS6081663A JP S6081663 A JPS6081663 A JP S6081663A JP 58189492 A JP58189492 A JP 58189492A JP 18949283 A JP18949283 A JP 18949283A JP S6081663 A JPS6081663 A JP S6081663A
- Authority
- JP
- Japan
- Prior art keywords
- program
- contents
- computer
- switch
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Microcomputers (AREA)
Abstract
Description
【発明の詳細な説明】
発明の属する分野の説明
本発明は、プログラムの内容を隠蔽し、第三者によるプ
ログラムの複製及び解読を防ぐ機能を持つマイクロコン
ピュータに関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a microcomputer having a function of concealing the contents of a program and preventing a third party from copying and decoding the program.
従来の技術の説明
従来、この種のワンチップマイクロコンピュータは、動
作開始時には特定の既知の値（多くはＯ）をプログラム
カウンタにセットし、その（Ｉｎスタートアドレスとし
、プログラムが動作していた。この様に、スタートアド
レスが既知の為、ＲＯＭの内容を読み出せばプログラム
の内容は容易に複製、解読出来、またＲＯＭの内容を読
み出す手段は必要に応じ提供され、又は提供をめられる
為プログラムの内容の隠蔽は困難な欠点があった。Description of the Prior Art Conventionally, in this type of one-chip microcomputer, when starting operation, a specific known value (often O) is set in the program counter, and the program is operated using that (In start address). In this way, since the start address is known, the contents of the program can be easily copied and decoded by reading the contents of the ROM, and means for reading the contents of the ROM can be provided or provided as necessary, so the program can be easily copied and decoded. The disadvantage was that it was difficult to conceal the contents.
発明の目的
本発明はプログラムのスタート番地をＲＯＭの書込みと
同時に設定出来る手段を持つことを特徴とし、その目的
はプログラムの複製、解読を防止することにある。OBJECTS OF THE INVENTION The present invention is characterized by having a means for setting the start address of a program at the same time as writing to the ROM, and its purpose is to prevent copying and decoding of the program.
発明の構成および作用の説明
第１図は本発明の一実施例であシ、１はワンチップ・マ
イクロコンピュータ、２はアドレス情報設定スイッチ、
２−１はプログラムカウンタ設定ゲート、３はプログラ
ムカウンタ、４はＲＯＭ、５はデータバスである。デー
タバス５には命令デコーダ６やＲＡＭ７、ＡＬＵ８等通
常のワンチップマイクロコンピュータを構成する各要素
が接がれている。ワンチップマイクロコンピュータ１に
電源を通じるとプログラム・カウンタ設定ゲー）２−１
を通しアドレス情報スイッチ２の設定値がプログ２ム・
カウンタ３に設定される。プ筒グラム設定ゲート２−１
はワンチップマイクロコンピュータ１に電源が通じられ
る動作開始時にのみ有効となシ、動作開始後ハアドレス
情報スイッチ２の設定値がプログラムカウンタ３に設定
されることはない。従って動作開始後は通常のワンチッ
プマイクロコンピュータと動作の違いはない。DESCRIPTION OF THE STRUCTURE AND OPERATION OF THE INVENTION FIG. 1 shows one embodiment of the present invention, in which 1 is a one-chip microcomputer, 2 is an address information setting switch,
2-1 is a program counter setting gate, 3 is a program counter, 4 is a ROM, and 5 is a data bus. Connected to the data bus 5 are various elements constituting a normal one-chip microcomputer, such as an instruction decoder 6, a RAM 7, and an ALU 8. When the power is connected to the one-chip microcomputer 1, the program/counter setting game) 2-1
The setting value of address information switch 2 is changed to program 2 through
It is set to counter 3. Tube gram setting gate 2-1
is valid only at the start of operation when power is supplied to the one-chip microcomputer 1, and the setting value of the address information switch 2 is not set in the program counter 3 after the start of operation. Therefore, once it starts operating, there is no difference in operation from a normal one-chip microcomputer.
アドレス情報スイッチ２の構造としては通常のマスクＲ
ＯＭのピットセルの構造、ＦＲＯＭで用いられている接
合破壊型の構造、フローティングゲートの構造等特に制
約はない。アドレス情報スイ、ツチ２の設定値は構造に
よシ、ワンチップマイクロコンピュータ１の製造時ある
いは使用時に設定する。特に、ＲＯＭ４に情報入力時に
設定できるようにすると効果的である。The structure of the address information switch 2 is a normal mask R.
There are no particular restrictions on the pit cell structure of OM, the junction breakdown type structure used in FROM, the floating gate structure, etc. The setting values for the address information switch 2 are set at the time of manufacturing or use of the one-chip microcomputer 1, depending on the structure. In particular, it is effective to enable the settings to be made when inputting information to the ROM 4.
この様にＲＯＭ４に格納されているプログラムのスター
ト番地はアドレス情報設定スイッチ２によシ任意の値に
設定出来る為、ＲＯＭ４の内容の読み出しによる複製、
解読を防止することが出来る。また、アドレス情報設定
スイッチ２の内容は外部から読み出せない構造とせねば
ならないことは述べるまでもない。In this way, since the start address of the program stored in ROM4 can be set to any value using the address information setting switch 2, copying by reading the contents of ROM4,
It is possible to prevent decoding. It goes without saying that the contents of the address information setting switch 2 must be structured so that they cannot be read from the outside.
以上、説明したように、プログラムのスタートアドレス
を任意に設定出来る為、ＲＯＭの内容の読み出しによる
プログラムの複製や解読を防止出来る利点がある。As explained above, since the start address of the program can be set arbitrarily, there is an advantage that copying or decoding of the program due to reading the contents of the ROM can be prevented.
第１図は本発明の一実施例によるワンチップマイクロコ
ンピュータの構成図である。FIG. 1 is a block diagram of a one-chip microcomputer according to an embodiment of the present invention.
Claims (1)
に該手段に設定したアドレスをスタート番地としてメモ
リー内容を読み出し動作することを特徴とするマイクロ
コンピュータ。1. A microcomputer characterized in that it has means for setting address information in advance, and reads out memory contents using the address set in the means at the start of operation as a start address.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58189492A JPS6081663A (en) | 1983-10-11 | 1983-10-11 | Microcomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58189492A JPS6081663A (en) | 1983-10-11 | 1983-10-11 | Microcomputer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6081663A true JPS6081663A (en) | 1985-05-09 |
Family
ID=16242165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58189492A Pending JPS6081663A (en) | 1983-10-11 | 1983-10-11 | Microcomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6081663A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03256122A (en) * | 1990-03-06 | 1991-11-14 | Mitsubishi Electric Corp | One-chip microcomputer |
| JPH04205486A (en) * | 1990-11-30 | 1992-07-27 | Mitsubishi Electric Corp | Microcontroller with built-in PROM |
-
1983
- 1983-10-11 JP JP58189492A patent/JPS6081663A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03256122A (en) * | 1990-03-06 | 1991-11-14 | Mitsubishi Electric Corp | One-chip microcomputer |
| JPH04205486A (en) * | 1990-11-30 | 1992-07-27 | Mitsubishi Electric Corp | Microcontroller with built-in PROM |
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