JPS6080189A - Pcm recording and reproducing device - Google Patents

Abstract

PURPOSE:To attain high-speed random access and to shorten a retrieving time by changing a tape speed in response to an address difference between a retrieving destination and the present position. CONSTITUTION:The address of a retrieving destination is supplied to a latch circuit 17. While the present position address on a tape is read out by a head 11 and supplied to an address reproducing circuit 15 via a switch 12. The difference of both addresses is calculated by an address difference calculating circuit 20, and the value of said address difference is decided by an address difference deciding circuit 21. The standard of this decision is previously selected properly by the speed of a high-speed FF/FR and a low-speed FF/FR. When the address difference is larger than the standard value, a high-speed FF/FR action is carried out. While a low-speed FF/FR action is performed when the address difference is smaller than the standard value.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of Bonro] The present invention relates to a PCM recording and reproducing apparatus, and particularly to a PCM recording and reproducing apparatus that enables high-speed random access.

[Prior Art] 1) As a random access method for a CM recording and reproducing device, in addition to audio or image information, address information indicating the address and time on the tape is recorded on the tape in advance, and this is used as search information. method is known. FIG. 1 shows an example of a configuration in which random access is performed in a rotary head type 1) CM device, where address information is recorded and reproduced using a fixed head with an address track provided. In this figure, 1 is a reel on the tape supply side, 2 is a motor that rotates the reel 1 and its control circuit, 3 is a magnetic tape, 4 is a reel on the winding side, and 5 is a reel on the winding side. A motor that rotates the reel 4 and its control circuit, 6 a rotating drum, 7 a PCM audio/visual information recording/reproducing head installed on the rotating drum 6, and 8 rotating the rotating drum 6. A motor and its control circuit; 9 is a main bustan 11 for feeding the tape 3 at a constant speed; 10 is a motor for rotating the capstan 9 and its control circuit; Further, 11 is a fixed head for recording and reproducing address information, 12 is a switch for selecting whether to record or reproduce address information, and 13 is a terminal into which the contents of the address information to be recorded are input. 14 is an address recording circuit for changing or amplifying the address information input from the terminal 13 into data that can be recorded on the tape. This is a circuit for reproducing the recorded address information, and 16 is a terminal to which a search destination address is input when performing a random address, and 17 is a circuit that temporarily holds the address contents input from the terminal 16. 18 is a circuit for comparing the contents of the address latched in the latch 17 and the address reproduced by the address reproduction circuit 15 at the time of retrieval, and a circuit for detecting a match. This is a clock generation circuit for generating a clock for operation control. In FIG. 1e, audio or image PCM system circuits are omitted for the sake of brevity and brevity.

Next, the operation when performing random access in the circuit shown in FIG. 1 will be explained. Now, for the sake of simplicity, we assume that addresses are recorded as binary data in 4-digit decimal digits every second on the address track of tape 3. For a tape that can record and play for 2 hours, the address track is recorded as binary data. The addresses of decimal numbers 'cO to 7200 are sequentially recorded. When performing random access, if you specify the address you want to search for on terminal 16, for example, 1 hour 23 minutes 15 seconds in time, this becomes r4995J, so this is latched into latch 17 as the address content. .

On the other hand, the switch 12 falls to the right (in FIG. 2),
The head 11 reads out the current address, for example, 4
If it is at the 1 minute 52 second position, address reproduction circuit 1
The playback data of 5 indicates the address of r2512J.
The comparator circuit 18 compares 8 and 8, and since the search destination is still ahead in time, each motor is controlled so that the tape 3 is fast-forwarded. Even during fast-forwarding, the address is reproduced by the head 11, and address comparison is always performed by the comparator circuit 18. When the addresses match, the fast-forwarding ends and normal reproduction or pause operation begins. If the search destination address is earlier in time, an access similar to -C is performed by rewinding.

As explained above, in the conventional PCM recording and reproducing apparatus, when performing random access, it is necessary to read address information while fast forwarding/reversing, so fast forwarding/spring reversing at very high speeds is not possible. This is because the faster the tape is fed, the more it becomes prone to so-called fraying, which deteriorates the adhesion between the head and the tape, causes track misalignment, and makes address reading unstable or impossible. .

[Summary of the Invention] This invention was made in order to eliminate the drawbacks of the conventional ones as described above. If the address difference between the search destination and the current position is large, the tape is advanced at high speed, and the tape is moved at a high speed until the address difference is small. The object of the present invention is to provide a CM recording and reproducing device that enables high-speed random access by reproducing addresses by feeding the tape at a slow speed of 1B and reliably locating the beginning.

From F, 1′! ! This invention will be explained more specifically with one embodiment shown on page 1.

[Embodiment of R, Bright] FIG. 2 is a schematic block diagram showing an embodiment of the present invention. Note that a3, parts similar to those in the circuit of FIG. 1 are given the same reference numerals, and their explanations will be omitted.

The J3C1 address difference KLM circuit 20 shown in the figure is a circuit that measures the address difference between the address reproduced by the address reproduction circuit 15 and the address preset in the latch 17.The address difference determination circuit 21 measures the address difference. Iki circuit 20
This is a circuit that determines whether the determined address difference is smaller or larger than O or a certain set of values. The address difference one-time calculation circuit 22 is a circuit that converts the address difference determined by the address difference combination field circuit 20 into a time difference during normal tape running. The high-speed FF/FR time designation circuit 23 is
The time difference between 11N and 22 loops is calculated at a constant speed (hereinafter referred to as F F / F R).
This is a circuit that converts it into time when

FIG. 3 is a 71 cordage V-1 for explaining the operation of the embodiment of FIG. 2.Hereinafter, the operation of the embodiment of FIG. 2 will be explained with reference to FIG.

First, important point 1- of the embodiment shown in FIG.
Very fast FF without destroying address information
It is possible to use a combination of /FR and slow FF/FR while reading address information.

For the sake of simplicity, it is assumed that the address information is recorded in 4-digit 10m numbers per second as in the 1Y conventional example shown in FIG. Trying to access random - Rudoki, end f16
A search destination address is input to and latched by the latch circuit 17 . Further, since the switch 12 is tilted to the right (in FIG. 2), the head 11 reads out the address at the current position, and this address is reproduced by the address 1N3 generation circuit 15.

Now, as in the conventional example, the designated address is r4995J, and the current location address is r2512. If it is written as J, this address difference is calculated by the address difference correction circuit 20 and becomes r2483J. The address difference determination circuit 21 determines the magnitude of this address difference, and this determination criterion is based on the high-speed F F /
The speed is appropriately selected in advance from the respective speeds of FR and slow speed FF/FR. Now, for example, based on the address difference 12o1, that is, the normal running time C2 minutes, "2483" is more interesting than 120, so high-speed FF/FR is performed at this time. At this time, the one-hour address difference WAn circuit 22 sets the address difference to the time difference during normal running, and r 2 /l 83 J becomes 2483 seconds.

Next, this time difference is converted into a time difference during high-speed F/F'R by the high-speed FF, -'FR time designation circuit 23.

That is, normal running speed v, , (m/s), high-speed FF
/ Constant speed IRv2 (m/s) during F'R, time difference t during normal driving (s), running difference t during high-speed FF/FR driving
2 (s) Then, t2-V! Since the relationship is −1°Vλ, now V+−IXIO,−2(m/S
), V 2 = 2 (If /s) Tosult,
t2 - animals x 2483 saki 12.4 (S) Since t can be converted to [2, each motor is controlled first and tape 3 is sent for 12 (S) at speed v2. At this time, there is no need to read the address.

This 1-step high-speed FF/FR allows you to search for the closest number, but in reality, errors occur due to wasted feed speed and brake delays, so this 1-step high-speed FF/FR
After FR, the address is reproduced at the arrival point. If the address difference determination circuit 21 determines that the address difference at this time is smaller than the reference, the platform moves to a gentle FF/FR operation and reaches the target address while reproducing the address. Ru. Also, if it is larger than the standard again, you can perform the second high-speed FF/FR of the same loop T''.Of course, if it is smaller than the standard from the beginning, there is no need to perform the high-speed FF/FR.The target address has been reached. Then, it will pause or start playing depending on your specifications.

Since there is no need to read the address at the high speed FF/FR speed 2, the speed can be much faster than the slow FF/FR speed where the address needs to be reproduced. Therefore, the time it takes to access can be considerably shortened, and since the address is ultimately read while accessing, cueing is reliable.

In the above-mentioned embodiment, the address difference is calculated in terms of time, but it is first converted into a distance difference, and then the high-speed F F ,...
/ FR You may mark the time difference.

Furthermore, in the above embodiment, the rotary head type 1! Although the explanation has been made regarding the positioning of the tape, it is clear that the present invention is suitable for devices that generally allow faster tape feeding if it is necessary to reproduce an address.

[Effect IA of the Invention] As described above, according to the present invention, when the search destination is far away, the tape is fed at high speed by the calculated value without reading the address. It can save time. In particular, the farther away the search destination is, the more pronounced the effect becomes, so it's especially desirable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional PCM recording and reproducing apparatus that performs high-speed searching. FIG. 2 is a schematic block diagram showing one embodiment of the present invention. FIG. 3 is a flow chart for explaining the operation of the embodiment shown in FIG. In the figure, 1 is a supply reel, 2 is a supply reel motor and control circuit, 3 is a magnetic tape, 4 is a take-up reel, and 5 is a take-up reel.
1 is a take-up reel motor and a control circuit, 6 is a rotating drum, 7 is a recording/reproducing head, 8 is a drum motor and a control circuit, 9 is a 1st bustan, 10 is a LJ-t vbustan motor J3 and a control circuit, 11 is an address recording and reproduction fixed head, 12 is an address recording/playback selection switch, 1
3 is an address recordlet terminal, 14- is an address recording circuit, 15 is an address reproduction circuit, 16 is an address designation terminal, 17 G: L latch circuit, 18 is an address comparison circuit,
19 is the master clock generation circuit, 20 is the address difference 8↑
No. 21 is an address difference judgment circuit, No. 22 is an address difference one time designation circuit, and No. 23 is a high speed fast forward seven rewind time designation circuit. Agent: Masu Oiwa Written amendment to the procedure for Figure 3 of Yuki (voluntary) dated 7th, 1939, to the Commissioner of the Japan Patent Office 1, Indication of the case: Japanese Patent Application No. 188998/1982, 2, Name of the invention: PCM recording and reproducing device 3; To Hitoshi Katayama, representative of the person making the amendment, Section 5, Scope of Claims and Detailed Description of the Invention, column 6 of the specification to be amended, Contents of the amendment (1) The scope of claims is as shown in the attached sheet. (2) "Wasteful feed speed" in line 9 of page 10 of the specification is corrected to "variation in high-speed tape feed speed." (3) Correct "time difference" in line 11 of page 11 of the Ming SMS to "time". The above 2 claims are a PCM recording and reproducing apparatus that records address information on a recording medium in advance at regular intervals and accesses a predetermined digit 1 of the recording medium based on this address information.C
1 means for running the recording medium; means for specifying an arbitrary address on the recording medium; means for reading the address recorded on the recording medium; means for reproducing the read address; means for calculating the difference between the reproduced addresses; means for determining whether the calculated address difference is greater than a predetermined value; and means for converting the address difference into a running time of the recording medium. , and when the address difference is larger than the difference value, the first
The traveling means is controlled to fast-forward or rewind the recording medium at a speed calculated from the address difference, and when the address difference is smaller than the speed value, the speed is faster than the first speed. PCM recording, comprising: a controller for controlling the traveling means to fast-forward or rewind the recording medium at a slow second speed and stop the fast-forwarding or rewinding of the recording medium when the address difference becomes zero; playback device.

Claims (1)

[Scope of Claims] A PCM recording and reproducing apparatus that records address information on a recording medium in advance at regular intervals and accesses a predetermined position on the recording medium based on this address information, the recording and reproducing apparatus comprising: means for running the medium; means for specifying an arbitrary address on the recording medium; means for reading the address recorded on the recording medium; means for reproducing the read address; means for calculating the difference between the reproduced addresses; means for determining whether the calculated address difference is greater than a predetermined value; and means for converting the address difference into a running time of the recording medium. means, when the address difference is greater than the value, a first
The traveling means is controlled to fast-forward or rewind the recording medium at a speed calculated from the address difference, and when the address difference is smaller than the first speed, means for controlling the traveling means so as to fast-forward or rewind the recording medium at a slow speed of 12 and to stop fast-forwarding or rewinding the recording medium when the address difference becomes O; and a PCM recording and reproducing apparatus, comprising means for prohibiting reading of the address when sending the recording medium at the first speed.