JPH0231381A - Digital signal reproducing device - Google Patents

Abstract

PURPOSE:To continuously reproduce sounds free from breaks even in the fast forward mode by detecting the coincidence between a reproduced block address and the block address value stored in a second memory circuit to switch the mode to the certain-speed reproducing mode. CONSTITUTION:A first memory circuit 12 and a second memory circuit 13 are provided, and signal components corresponding to a certain time out of the digital signal reproduced by a reproducing circuit 11 in the certain-speed reproducing mode are written in the circuit 12 from a prescribed position, and the block address value corresponding to the digital signal written in the first memory circuit 12 is stored in the second memory circuit 13. The coincidence between the block address value reproduced from a recording medium 10 in the fast forward mode and the block address value stored in the second memory circuit 13 is detected to switch the mode to the certain-speed reproducing mode. Thus, sounds are continuously reproduced without breaks.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a digital signal reproducing apparatus for reproducing audio, etc. that has been converted into digital data and recorded on a recording medium.

2. Description of the Related Art In recent years, so-called digital audio technology, which converts analog signals such as audio signals into digital signals and records and reproduces them, has made remarkable progress. For example, in the case of a compact disc (hereinafter referred to as CD), about two hours of digital signals can be recorded on a disc with a diameter of 12 cn+. CD
Also, by taking advantage of its disk shape, it is capable of high-speed transfer from one song to another, so-called random access, and has the advantage of short access times. However, in the case of CDs, the user only has a playback function, and there has been an increasing demand for devices that allow users to record and play back freely.

Recently, a rotating head type digital audio tape recorder (R-DAT) has been put into practical use. R
-DAT has a volume ratio of 1/2 that of conventional compact cassettes.
Approximately 2 hours of recording and playback is possible using a cassette tape.

Problems to be Solved by the Invention However, unlike disks such as CDs, the R-DAT described above uses a conventional strip-shaped magnetic tape as a recording medium, and the recording method is only unidirectional, similar to video. Therefore, the time required for high-speed feeding is longer than that of a CD. For example, the high-speed rewinding time from the end of a two-hour tape to the beginning requires about 40 seconds even when running at 200 times the speed. Naturally, the reproduced sound is interrupted during this high-speed forwarding, which poses a problem, especially when endless reproduction is required for business use.

The present invention has been made in view of the above-mentioned problems, and provides a digital signal reproducing device that can produce continuous reproduced sound without interruption even when high-speed feeding takes time.

Means for Solving the Problems In order to solve the above problems, the digital signal reproducing device of the present invention is divided into blocks of a fixed number,
a reproducing circuit for reproducing a digital signal recorded on a recording medium with a block address added; and a first reproducing circuit for writing the digital signal reproduced by the reproducing circuit from a predetermined position for a predetermined period of time in a constant speed reproducing mode. a second memory circuit that stores at least one of the block address values corresponding to the digital signal stored in the first memory circuit; writing digital signals,
a memory control circuit that controls readout; a switch circuit that outputs an output signal from the reproducing circuit in constant speed playback mode and outputs a digital signal read from the first memory circuit in high speed feed mode; A mode is changed to a constant speed playback mode by detecting a match between the block address value reproduced from the recording medium during the feed mode and a block address value calculated from the block address stored in the second memory circuit. The device is equipped with a mode switching circuit that allows the mode to shift to .

According to the above-described configuration, the present invention reads out the digital signal written in the first memory circuit during constant-speed playback even during high-speed feed, and changes the mode from the high-speed feed mode to the constant-speed playback mode when the corresponding block address values match. By switching to , continuous playback without audio interruption is possible.

Embodiment Hereinafter, a digital signal reproducing apparatus according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of a digital signal reproducing apparatus according to an embodiment of the present invention. In Figure 1,
10 is a recording medium, and in this example, a magnetic tape is used. 1
1 is a reproduction circuit, 12 is a first memory circuit, 13 is a second memory circuit, 14 is a switch circuit, 15 is a mode switching circuit, a is a reproduction digital signal, b is a block address, and C is a first memory circuit. , d is the block address stored in the second memory circuit, e is the memory control command, f is the output switching command, g is the mode command, h is the mode switching command, and i is the final output.

The operation of the digital signal reproducing apparatus configured as described above will be explained below with reference to FIGS. 1, 2, and 3. FIG. 2 is a time chart showing the relationship between the block address played from the tape and the tape speed in this embodiment, and FIG. 3 is a time chart showing the process of switching from the memory playback state to the tape playback state using block addresses. This is a time chart shown.

First, in FIG. 1, a signal reproduced from a magnetic tape 10 is subjected to processing such as error correction in a reproduction circuit 11, and then a reproduced digital signal a and a block address b are processed.
is output as In the constant speed reproduction mode, the reproduced digital signal a is outputted to the outside as the final output i via the switch 14, and is converted back to an analog signal by, for example, a D/A converter (not shown). The digital signal reproducing device shown in this example is the first one from the beginning of the tape, that is, from the start of the block address to the end, as shown in Figure 2.
Run in constant speed mode for the first time.

(Section T2 in FIG. 2) During this period, the tape speed is of course 1x speed (Xl).

At the same time, the playback digital signal a is output for a certain period of time, in this example, when constant speed playback starts from the beginning of the tape winding, the first
is written into the memory circuit 12 of.

(T1 section in Figure 2). That is, for example (not shown), initial constant-speed playback mode information is given to the mode switching circuit 15 as a mode command g from the system controller, and the mode switching circuit 15 outputs a preset number of blocks from the start of the constant-speed playback mode. A writing command for a reproduced digital signal is sent to the first memory circuit 12 as a memory control output e.
is output as

Furthermore, while writing the reproduced digital signal a to the first memory circuit 12, the value of at least one of the simultaneously reproduced block address values is transferred to the second memory circuit 13.
and store it in memory. In this example, the first memory circuit 12
The block address value corresponding to the reproduced digital signal of the first block taken in is stored.

Next, after performing constant-speed reproduction until the end of the tape, the main reproduction digital signal reproducing apparatus shifts to a high-speed rewinding mode at, for example, 200 times the speed. On the other hand, the mode switching circuit 15 detects that the mode has shifted to high-speed rewinding based on the mode command g, and switches the switch circuit 14 to the first memory circuit 12.
At the same time, the first memory circuit 12 is set to the read mode by the memory control command e, and the reproduced digital signals that have been written are sequentially read out in the order in which they were written. (section T3 in FIG. 2) Also, each time the reproduced digital signal in units of one block is read out, the block address value d stored in the second memory circuit 13 is
The mode switching circuit 15 calculates a block address value A (hereinafter referred to as memory block address A) which is incrementally added according to the number of read blocks with reference to . By the way, in the case of R-DAT, block address values can be read from the tape even in high-speed feed mode.

Therefore, the mode switching circuit 15 constantly compares the block address value B (hereinafter referred to as tape block address value B) reproduced from the tape during high-speed rewinding with the memory block address value A, and when B<A, high-speed rewinding is started. A mode switching command is output to change from the mode to, for example, the triple speed fast forward mode. In this case, tape running will overrun due to inertia, but by detecting that the difference between address values A and B has become less than a certain value, and performing processing such as decelerating the high-speed rewinding speed. The amount of overrun can be reduced. Therefore, address values A and B match again after shifting to 3x fast forward mode (
This can shorten the time it takes to catch up. In FIG. 2, K is the point where the tape block address and memory block address first match in high-speed rewind mode.

The point where the tape catches up again after shifting to triple speed fast forward mode and matches is indicated by N.

Figure 3 shows that the tape block address value B and memory block address value A are set to the value N while the tape is in the 3x fast forward mode.
At this time, the mode switching circuit 15 detects a match, and the mode switching command switches the tape running mode from the 3x fast forward mode to the constant speed playback mode, and the output switching command f causes the switch circuit 14 to change the final output i. is switched from the first memory output C to the normal digital playback output a. (Section T4 in Figure 2) The reference clock in Figure 3 is a reference clock whose one period corresponds to one rotation of the cylinder in the case of R-DAT, for example, and is used to read out one block of reproduced digital signals from the tape. , and the output signal C of the first memory circuit 12 is read in this clock unit, the phases of the leading data of each block match, and the digital reproduction signal a after shifting to the constant speed reproduction mode and the first Since it is possible to completely synchronize with the memory output C, no abnormal noise due to data discontinuity will occur even if the output switching command f is switched at any timing in the section T4 after shifting to constant speed playback mode. . In addition, in subsequent repetitions of the constant speed playback mode, the necessary data is written and held in the first and second memory circuits, so the same data can always be used and there is no need to update it. .

As described above, according to this embodiment, the first
a second memory circuit that stores at least one block address value corresponding to the reproduced digital signal written in the first memory circuit; and a second memory circuit that stores the reproduced digital signal to the first memory circuit. A memory control circuit that controls writing and reading, and a switch circuit that outputs a reproduced digital signal from the reproduction circuit in constant speed reproduction mode and outputs a digital signal read from the first memory circuit in high speed feed mode. Then, it detects a match between the block address value reproduced during high-speed playback and the block address value calculated based on the block address value stored in the second memory circuit, and shifts the mode to constant-speed playback mode. By providing a mode switching circuit that allows for continuous playback without audio interruptions, it is possible to read out the playback digital signal stored in the first memory circuit even in the high-speed feed mode, thereby enabling continuous playback without audio interruption.

In this example, the high-speed rewinding speed is set to 200.
The fast forward speed was tripled, but the speed was increased to T.
By setting the speed to fJ, the memory capacity can be reduced.

Effects of the Invention As described above, the present invention provides a reproducing circuit that reproduces a digital signal that is divided into a fixed number of blocks to form blocks, a block address is added, and is recorded on a recording medium, and a a first memory circuit for writing the digital signal reproduced by the reproduction circuit for a certain period of time from a predetermined position; and at least one memory circuit for writing the digital signal reproduced by the reproduction circuit for a certain period of time from a predetermined position; a second memory circuit that stores a block address value; a memory control circuit that controls writing and reading of the digital signal to the first memory circuit; a switch circuit that outputs the digital signal read from the first memory circuit in the high-speed feed mode; and the block address and the second memory circuit that are reproduced from the recording medium in the high-speed feed mode. By providing a mode switching circuit that detects a match with the block address value stored in the block address value and shifts the mode to constant speed playback mode, continuous playback without audio interruption is possible even during high speed feed mode. This makes it suitable for music programs at broadcast stations, etc., and has great practical effects.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a digital signal reproducing device according to an embodiment of the present invention, FIG. 2 is a time chart showing the relationship between block addresses and tape speeds reproduced from a tape in this embodiment, and FIG. FIG. 3 is a time chart showing the process of switching from the memory playback state to the tape playback state using block addresses. 10... Recording medium, 11... Playback circuit, 12...
・First memory circuit, 13...Second memory circuit, 1
4... Switch circuit, 15... Mode switching circuit. Name of agent: Patent attorney Shigetaka Awano (1 person) K

Claims (1)

[Claims] A reproducing circuit that reproduces a digital signal that is divided into a fixed number of blocks to form blocks and that is recorded on a recording medium with a block address added thereto; a first memory circuit for writing from a predetermined position for a certain amount of time;
a second memory circuit for storing at least one block address value corresponding to the digital signal written in the first memory circuit; and writing and reading of the digital signal in the first memory circuit. a memory control circuit for controlling the first memory circuit; a switch circuit that outputs an output signal from the reproduction circuit in constant speed reproduction mode and outputs a digital signal read from the first memory circuit in high-speed feed mode; The mode is switched to constant speed by detecting a match between the block address value reproduced from the recording medium during the mode and the block address value calculated based on the block address stored in the second memory circuit. A digital signal reproducing device characterized by comprising a mode switching circuit for shifting to a reproduction mode.