JPH0668491A - Information reproducing device - Google Patents

Abstract

PURPOSE:To prevent a sound from being ceased owing to vibration of a CD player. CONSTITUTION:A speech signal is written in a memory 16 and an address detecting circuit 12 extracts address information from the output of an amplifying circuit 9 and outputs the address. If a tracking deviation is caused owing to the vibration, etc., an abnormality detection signal is outputted. A speech holding circuit 13 holds the speech signal in response to the abnormality detection signal and an address holding circuit 14 holds the address. A system control circuit 18 instructs a memory control circuit 17 to stop writing to a memory 16, and sends an access indication to an access control circuit 11 to return a playback head 4 to the address held by the address holding circuit 14. When the reproduction is restarted and the speech signal held by the speech holding circuit 13 is outputted from a signal processing circuit 7, a coincidence detecting circuit 15 outputs a coincidence detection signal and sends an indication to the memory control circuit 17 so that the writing to the memory 16 is started. Consequently, the speech signal written in the memory 16 becomes a continuous speech signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information reproducing apparatus for reproducing data information recorded together with address information on an optical disk or the like.

[0002]

2. Description of the Related Art Recently, a CD player for reproducing a compact disc (CD) in which an audio signal is recorded as a digital signal and a video disc (VD) for recording an image signal (moving image) in an analog state are reproduced. VD players have been commercialized. Especially, the spread of CD players is remarkable,
There are a wide variety of usage forms for in-vehicle use and portable use.

The above-mentioned conventional information reproducing apparatus will be described below with reference to the drawings. FIG. 10 is a block diagram of a conventional information reproducing apparatus. In FIG. 10, reference numeral 1 is a recording medium (hereinafter referred to as a disk 1) in which data information is recorded together with address information. For example, on a spiral track 1a, a CLV method (Constant Linear Velocity) in which audio information makes the linear velocity of the track 1a constant
Recorded by. Reference numeral 2 is a motor for rotating the disk 1, and 3 is a motor control circuit for controlling the rotation of the motor 2 in accordance with the synchronization signal 103 from the signal processing circuit 7. Four
Is a reproducing head, which converges the light beam on the track 1a, photoelectrically converts the reflected light from the track 1a, and reproduces the information recorded on the track 1a. Reference numeral 5 denotes an amplifier circuit, which amplifies the signal 100 obtained by the reproduction head 4 and reproduces the reproduction signal 101 and the tracking error signal 10.
2 is output. Reference numeral 6 denotes a servo circuit which causes the reproducing head 4 to track the track 1a according to the tracking error signal 102.
Servo control to the optimum position above. 7 is a signal processing circuit, which extracts audio information from the reproduced signal 101,
An error in audio information is detected, corrected and corrected, an audio signal 104 is output to the output terminal 8, and a sync signal 103 for controlling the disk 1 from the reproduction signal 101 to a predetermined rotation is generated and output. .

The operation of the conventional information reproducing apparatus configured as described above will be described below.

The disk 1 is controlled by the motor control circuit 3 so as to have a predetermined rotation speed. The signal 100 reproduced by the reproducing head 4 is input to the signal processing circuit 7 after being amplified by the amplifier circuit 5. In the signal processing circuit 7, after the voice information is extracted, the error is detected, the error is corrected and corrected, and the voice signal 104 is output from the output terminal 8 to the outside.

[0006]

However, in the above-mentioned conventional configuration, for example, when vibration is applied during reproduction of information and the reproduction head is out of tracking and moves to another track, the audio signal being reproduced is reproduced. There was a problem that was cut off.

The present invention solves the above-mentioned problems of the prior art, in which the playback head is out of tracking due to vibration or the like,
An object of the present invention is to provide an information reproducing apparatus capable of reproducing an audio signal without interruption even when it is moved to another track.

[0008]

To achieve this object, the information reproducing apparatus of the present invention is a reproducing means for reproducing information at a predetermined transfer rate from a recording medium having a track on which address information and data information are recorded. A reproduction moving means for moving the reproducing means to a desired track, an abnormality detecting means for detecting an on-track state of the reproducing means, and outputting an abnormality detection signal when an off-track occurs due to an abnormality, and the reproducing means. Signal processing means for separating and outputting the data information from the obtained information, address detecting means for separating and outputting the address information from the information obtained by the reproducing means, and temporary output of the signal processing means Memory means for temporarily storing, a memory control means for controlling write and read operations of the memory means, and the abnormality detection signal. Is output, the data holding means holds the output of the signal processing means, the address holding means holds the output of the address detecting means when the abnormality detection signal is output, and the output of the signal processing means. And a value held by the data holding means are compared with each other, and a coincidence detecting means for outputting a coincidence detecting signal when it is determined that they are equal to each other, and writing to the memory means is prohibited when the abnormality detecting signal is output. And instructing the reproduction moving means to move the reproducing means to the track immediately before the address information held by the address holding means is recorded,
After the reproduction is started again, the system control means for instructing the memory control means to restart the writing to the memory means at the same time when the coincidence detection signal is output.

Further, the information reproducing apparatus of the present invention comprises a residual quantity detecting means for detecting the residual quantity of the data information stored in the memory means, and the reproducing means makes the detected residual quantity a predetermined value. The transfer rate for reproducing information is changed.

Further, the information reproducing apparatus of the present invention comprises reproducing means for reproducing information from a recording medium having a track on which address information and data information are recorded, and reproducing means moving means for moving the reproducing means to a desired track. An abnormality detection means for detecting an on-track state of the reproduction means and outputting an abnormality detection signal when the track is off-tracked due to an abnormality; and a signal for separating and outputting the data information from the information obtained by the reproduction means. The processing means, the address detecting means for separating and outputting the address information from the information obtained by the reproducing means, the output of the signal processing means and the data held by the data holding means are compared, and it is determined that they are equal. In the case of the above, the coincidence detection means for outputting the coincidence detection signal and the memory hand for temporarily storing the output of the signal processing means A memory control means for controlling the writing and reading operations of the memory means, and detecting and outputting the remaining amount of data information stored in the memory means, and overflowing when the remaining amount exceeds a predetermined value x. A remaining amount detecting means for outputting a signal, and a data holding means for holding the output of the signal processing means when the abnormality detection signal or the overflow signal is output,
Address holding means for holding the output of the address detection means when the abnormality detection signal or the overflow signal is output; and the memory when the overflow signal is output or the abnormality detection signal is output. Instructing the memory control means to prohibit writing to the means, and instructing the reproducing means moving means to move the reproducing means to the track immediately before the address information held by the address holding means is recorded. Then, after the reproduction is started again, the system control means for instructing the memory control means to restart the writing to the memory means at the same time when the coincidence detection signal is output.

[0011]

According to the present invention, when the reproduction head is out of tracking due to vibration or the like, the writing of the data information to the memory means is stopped, and the data information when the writing is stopped is written to the data holding means. The address information is held in the address holding circuit. Then, the reproducing means is returned to the address information held in the address holding circuit, the reproduction is performed again, and when the output of the signal processing means matches the value held by the data holding means, the writing to the memory means is started again, It is possible to obtain continuous data information on the memory.

Further, according to the present invention, when the remaining amount of information in the memory becomes low, the transfer rate of the reproducing means is increased to keep the remaining amount of information in the memory at a predetermined value. Is possible.

Further, according to the present invention, it is possible to reproduce information at a speed faster than the conventional reproduction speed without the necessity of matching the speed of reproducing information from the recording medium with the recording / reproduction speed. Therefore, when the reproducing head is out of tracking due to vibration or the like, the writing of the data information to the memory means is stopped, and the data information when the writing is stopped is held in the data holding means and the address information is held in the address holding circuit. Before all the data temporarily stored in the memory means is read out, the reproducing means is returned to the address information held in the address holding circuit and the reproducing is performed again, and the output of the signal processing means holds the value held in the data holding means. By re-starting the writing to the memory means when it coincides with, it is possible to obtain continuous data information on the memory and reproduce without any abnormality.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an information reproducing apparatus according to the first embodiment of the present invention, FIG. 2 is a conceptual diagram of operation of a track pattern of a disk and a reproducing head, and FIG. 3 is an operational waveform diagram.

In FIG. 1, the same operations as those in the conventional example are designated by the same reference numerals as those in FIG. 10, and the description thereof will be omitted.

Reference numeral 9 is an amplifier circuit. Conventional amplifier circuit 5
Similarly to the above, the signal 200 obtained by the reproducing head 4 is amplified, and the reproduced signal 201 and the tracking error signal 20 are amplified.
2 is output. Also, from the output 200 of the reproducing head 4,
When the reproducing head 4 has an abnormality such as vibration, the track 1a
Off track is detected from the
03 is output.

Reference numeral 10 is a servo circuit. By the tracking error signal 202 output from the amplifier circuit 9, the reproducing head 4 is servo-controlled to an appropriate position on the track 1a, and the track 1 specified by the access control circuit 11 is also controlled.
The reproducing head 4 is moved to a.

An access control circuit 11 instructs the servo circuit 10 to move the position of the reproducing head 4 to the designated track 1a.

Reference numeral 12 is an address detection circuit which receives the reproduction signal 201 from the amplifier circuit 9, extracts address information recorded together with audio information from the reproduction signal 201, and outputs an address signal 207.

Reference numeral 13 denotes an abnormality detection signal 203 from the amplifier circuit 9.
Is a voice holding circuit that holds the output 204 of the signal processing circuit 7 when is output.

Reference numeral 14 denotes an abnormality detection signal 203 from the amplifier circuit 9.
Output 207 of the address detection circuit 12 when is output
Is an address holding circuit for holding.

Reference numeral 15 is an output 205 of the voice holding circuit 13,
This is a coincidence detection circuit that compares the outputs 204 of the signal processing circuit 7 and outputs a coincidence detection signal 206 when they are regarded as coincidence.

Reference numeral 22 is a memory for temporarily storing the audio signal 204 output from the signal processing circuit 7.

Reference numeral 17 is a memory control circuit for controlling the writing and reading operations of the memory 16. For example, when the write signal 209 from the system control circuit 18 is H, writing is performed, and when it is L, the writing is stopped. In addition, the read signal 2 from the system control circuit 18
When 10 is H, the reading is performed, and when L is 10, the reading is stopped.

Reference numeral 18 denotes a system control circuit, which is a circuit for instructing the memory control circuit 17 to perform writing and reading and for designating a track to be accessed by the access control circuit 11.

The operation of the information reproducing apparatus configured as described above will be described below.

In FIG. 2, A1 attached to the track 1a
The numbers from A43 to A43 indicate addresses. Further, in order to simplify the explanation, the voice information D1 is stored in the address A1.
It is assumed that the voice information D2 is recorded correspondingly to the address A2, and each voice information is composed of a plurality of voice information samples.

In FIG. 3, FIG. 3A shows the reproducing head 4.
Output 200 is shown, showing that the voice information recorded together with the address information is being reproduced. Also, the shaded portion indicates that the output 200 of the reproducing head 4 is disturbed.

FIG. 3B shows the abnormality detection signal 203 output from the amplifier circuit 9. FIG. 7C shows an address which is the output 207 of the address detection circuit 12.
The shaded area indicates that the address information cannot be extracted and the address is not output.

FIG. 3D shows the output 204 of the signal processing circuit 7.
Is shown. The shaded area indicates that the audio information cannot be corrected and the audio signal is not output.

FIG. 3E shows the output 208 of the address holding circuit 14 held by the abnormality detection signal 203 (FIG. 2B).

FIG. 3F shows the output 2 of the voice holding circuit 13 held by the abnormality detection signal 203 (FIG. 2B).
05 is shown.

FIG. 7G shows the coincidence detection signal 206 output from the coincidence detection circuit 15. FIG. 6H shows the write signal 209 which is the output of the system control circuit 18. The memory control circuit 17 writes to the memory 16 when this signal is H, and stops writing when this signal is L.

FIG. 3I shows the read signal 210 which is the output of the system control circuit 18. The memory control circuit 17 reads from the memory 16 when this signal is H, and stops reading when it is L.

FIG. 6J shows the output 211 of the memory 16. The figure (k) has shown the information remaining amount of the memory 16.

When the reproduction is started in FIG. 2a, normally, reproduction is performed along the track 1a after that.
Here, the operation when the reproducing head 4 reaches b and vibration is applied and the reproducing head 4 moves to c will be described.

When the reproduction is started, the reproducing head 4 outputs the audio information to which the address information is added, as shown in FIG. The amplification circuit 9 outputs the reproduction signal 201 to the signal processing circuit 7 and the address detection circuit 12 after the amplification. The signal processing circuit 7 separates the audio information from the reproduction signal 201 and outputs the audio signal 204 shown in FIG. On the other hand, the address detection circuit 12 separates the address information from the reproduction signal 201 and outputs the address signal 207 shown in FIG. The reason that FIG. 3D is output later than that of FIG. 3C is that the voice information is subjected to complicated processing such as error correction and correction as compared with the address information. Then, as shown in FIG. 3D, the signal processing circuit 7
At the same time that the audio signal D1 is output from the memory device, the system control circuit 18 sets the write signal 209 (FIG. 3 (h)) to H, and the memory control circuit 17 stores the audio signal (FIG. 3 (d)). Writing to 16 is started. As a result, the remaining amount of information in the memory 16 gradually increases as shown in FIG.

Then, when the remaining information amount reaches, for example, a predetermined value x, the system control circuit 18 outputs the read signal 210.
By setting (FIG. 3 (i)) to H, the memory control circuit 17 starts reading from the memory 16. When reading is started, the amount of information written and the amount of information read are balanced, and the remaining amount of information becomes a constant value x. The audio signal 211 (FIG. 3 (j)) read from the memory 16 is output to the outside from the output terminal 8.

Here, for example, vibration is applied at b,
It is assumed that the tracking is off and the reproducing head 4 moves to c. When the tracking is lost, the output 20 of the reproducing head 4
0 (FIG. 3A) is disturbed, and the amplifier circuit 9 causes the abnormality detection signal 2
03 is output. By this abnormality detection signal 203, the voice holding circuit 13 outputs the output D9 of the signal processing circuit 7,
The address holding circuit 14 holds the output address A10 of the address detection circuit 12. At the same time, the system control circuit 18 sets the write signal 209 (FIG. 3 (h)) to L, so that the memory control circuit 17 sets the audio signal 20.
4 (FIG. 3D) is stopped.

After the reproducing head 4 moves to c, the reproducing head 4
When the output 200 is stable, the address detection circuit 12 starts to output the address again, and addresses A24, A25 ...
Starts to output. As a result, the system control circuit 18 can recognize the position of the reproducing head 4. The system control circuit 18 instructs the access control circuit 11 to move the reproducing head 4 two tracks before, in order to move the reproducing head 4 to an address before the address A11 held in the address holding circuit 14. While the reproducing head 4 is moving, the output 200 (FIG. 3A) of the reproducing head 4 is disturbed, but since it is not abnormal, the amplifier circuit 9 outputs the abnormality detection signal 20.
3 is not output.

After the reproducing head 4 is moved to d, the address detection circuit 12 starts outputting the address signal 207 and the signal processing circuit 7 starts outputting the audio signal 204. And
The audio signal output from the signal processing circuit 7 (FIG. 3D) is
When the voice signal D9 held by the voice holding circuit 13 matches, the match detection circuit 15 causes the match detection signal 206 (see FIG. 3).
(G)) is output. When the match detection signal 206 is output, the system control circuit 18 sets the write signal 209 to H again, and the memory control circuit 17 causes the audio signal 204 (see FIG. 3).
Writing of (d)) to the memory 16 is started.

As described above, according to this embodiment, the audio signal is output via the memory 16, and when the tracking is lost, the audio signal is held in the audio holding circuit 13 and stored in the audio signal memory 16. Stop writing
The reproducing head 4 is returned to an address out of tracking, reproduction is performed again, and writing to the memory 16 is started from an audio signal equal to the held audio signal. It is possible to obtain As a result, even if the system is apt to lose tracking due to vibration or the like, the memory 1
Unless all the audio signals stored in 6 are read out, continuous reproduction can be performed without interruption.

Further, in the present embodiment, it is possible to realize a vibration-resistant CD player by simply adding a simple circuit such as the above-mentioned memory and memory control means to the conventional CD player.

FIG. 4 is a block diagram of an information reproducing apparatus in the second embodiment of the present invention, FIG. 5 is a conceptual diagram of operation of a track pattern of a disk and a reproducing head, and FIG. 6 is an operational waveform diagram.

In FIG. 4, the same elements as those in the first embodiment and the conventional example are designated by the same reference numerals as those in FIGS. 1 and 10 and their explanations are omitted.

Reference numeral 19 is a remaining amount detecting circuit for detecting the remaining amount of information stored in the memory 16, and detects the remaining amount of information from the write address and the read address of the memory control circuit 17, for example.

Reference numeral 20 is a motor control circuit for controlling the rotation speed of the motor 2 in accordance with the synchronization signal 315 output from the signal processing circuit 7 and an instruction from the system control circuit 21.

Reference numeral 21 denotes a system control circuit, which instructs the memory control circuit 17 to write and read audio signals, to the access control circuit 11 to instruct a track to be accessed, and to output the remaining amount detection circuit 19. The motor control circuit 20 controls the rotation speed of the motor 2 according to
It is a circuit for instructing to.

The operation of the information reproducing apparatus configured as described above will be described below.

In FIG. 5, A1 attached to the track 1a
The numbers from A43 to A43 indicate addresses, as in FIG.

FIG. 6A shows the reproducing head 4 in FIG.
Output 300, showing that the voice information recorded together with the address information is being reproduced. The shaded area indicates that the output 300 of the reproducing head 4 is disturbed.

FIG. 7B shows the abnormality detection signal 303 output from the amplifier circuit 9. FIG. 7C shows the address signal 307 output from the address detection circuit 12. The shaded area indicates that the address could not be extracted.

The output 304 of the signal processing circuit 7 is shown in FIG.
Is shown. The shaded area indicates that the audio signal could not be corrected.

FIG. 11E shows the output 308 of the address holding circuit 14 held by the abnormality detection signal 303 (FIG. 11B).

FIG. 6F shows the output 3 of the voice holding circuit 13 held by the abnormality detection signal 303 (FIG. 6B).
05 is shown.

FIG. 7G shows the coincidence detection signal 306 output by the coincidence detection circuit 15. FIG. 6H shows the write signal 309 which is the output of the system control circuit 19. The memory control circuit 17 writes to the memory 16 when this signal is H, and stops writing when this signal is L.

FIG. 11I shows the read signal 310 which is the output of the system control circuit 21. The memory control circuit 17 reads from the memory 16 when this signal is H, and stops reading when it is L.

FIG. 6J shows the output 311 of the memory 16. The same figure (k) shows the output 314 of the remaining amount detection circuit 19.
And the amount of information stored in the memory 16 is shown.

FIG. 6 (m) shows the number of rotations of the motor 2. In FIG. 5, the reproducing head 4 which reproduces a of the track 1a normally reproduces along 1a after that, but here, as in the first embodiment, the reproducing head 4 reproduces b.
The operation when the reproducing head 4 moves due to vibration due to the addition of vibration when the temperature reaches the value c.

When reproduction is started at a, the remaining amount detection circuit 19 has detected that the remaining amount of information in the memory 16 is zero. Therefore, the system control circuit 21 instructs the motor control circuit 20 to rotate at twice the normal speed (2V), for example. As a result, the motor control circuit 2
Zero controls the speed of the motor 2 so as to keep it twice as fast. Then, when the reproduction is started, the reproducing head 4 outputs the audio information to which the address information is added, as shown in FIG. The amplifier circuit 9 amplifies and then outputs the reproduction signal 301 to the signal processing circuit 7 and the address detection circuit 12. The signal processing circuit 7 separates audio information from the reproduction signal 301 and outputs an audio signal 304 shown in FIG. 6 (d). On the other hand, the address detection circuit 12 separates the address information from the reproduction signal 301 and outputs the address signal 307 shown in FIG. Then, as shown in FIG.
At the same time that D1 is output from the signal processing circuit 7, the system control circuit 21 sets the write signal 309 (FIG. 6 (h)) to H. As a result, the memory control circuit 17 starts writing the audio signal 304 (FIG. 6 (d)) to the memory 16, so that the information remaining amount 314 of the memory 16 is as shown in FIG.
It gradually increases as shown in (k).

When it is detected that the remaining information amount 314 has reached the predetermined value x, the system control circuit 21 instructs the motor control circuit 20 to rotate at the normal speed V.
As a result, the motor control circuit 20 controls the speed of the motor 2 to maintain the speed V. At the same time, the system control circuit 21 sets the read signal 310 (FIG. 6 (i)) to H to start reading from the memory 16. When reading is started, the amount of information written and the amount of information read are balanced, and the remaining amount of information becomes a constant value of a predetermined value x. The signal 311 read from the memory 16 (see FIG.
(J)) is output from the output terminal 8 to the outside.

Here, for example, vibration is applied at b,
It is assumed that the tracking is off and the reproducing head 4 moves to c. When the tracking is lost, the output 30 of the reproducing head 4
0 (FIG. 6A) is disturbed, and the amplifier circuit 9 causes the abnormality detection signal 3
03 is output. When the abnormality detection signal 303 is output,
The voice holding circuit 13 holds D9 which is the output of the signal processing circuit 7. On the other hand, the address holding circuit 14 holds the address A10 which is the output of the address detection circuit 12. At the same time, the system control circuit 21 causes the write signal 30
By setting 9 (FIG. 6 (h)) to L, the memory control circuit 17 stops the writing of the audio signal 304 (FIG. 6 (d)).

After the reproducing head 4 moves to c, the reproducing head 4
When the output of is stable, the address detection circuit 12 starts to output the address again and outputs the address A24. As a result, the system control circuit 21 can recognize the position of the reproducing head 4. The system control circuit 21 receives the address held in the address holding circuit 14, that is, the address A11.
To move the playhead 4 to an earlier address,
The access control circuit 11 is instructed to move the reproducing head 4 two tracks forward.

After the reproducing head 4 moves to d, the address detection circuit 12 starts outputting the address signal 307, and the signal processing circuit 7 starts outputting the audio signal 304. And
The coincidence detection circuit 15 outputs the audio signal 304 output from the signal processing circuit 7 and the audio signal 3 held by the audio holding circuit 13.
If it is determined that they are equal to each other, the match detection signal 30
6 (FIG. 6 (g)) is output. When the coincidence detection signal 306 is output, the system control circuit 19 sets the write signal 309 to H again, and the memory control circuit 17 outputs the audio signal 304.
Writing to the memory 16 shown in FIG. 6D is started.
Further, at this time, it is detected that the remaining amount of information is less than x. Therefore, the motor control circuit 20 is instructed to rotate at twice the normal speed (2V), and when the remaining amount detection circuit 17 detects that the remaining information amount becomes x, the motor control circuit 20 rotates at the normal speed V. The motor control circuit 20 is instructed to do so.

As described above, according to this embodiment, the memory 1
6 is provided with a remaining amount detection circuit 19 for detecting the remaining amount of information, and the number of revolutions of the disk 1 is controlled according to the remaining amount of information, so that tracking is not missed in quick succession.
The remaining information amount never becomes zero. Therefore, no matter how many times the tracking is lost, the data can be reproduced without interruption.

Further, by increasing the number of rotations of the disk 1, the remaining amount of information in the memory 16 can be set to the predetermined value x in a short time. Therefore, it is possible to output the audio signal in a short time immediately after the start of reproduction.

In the second embodiment, the reading from the memory 16 is started when the remaining information amount reaches the predetermined value x, but the reading may be performed at the same time when the writing is started.

In the second embodiment, the rotation control of the disk 1 may be performed by gradually increasing the rotation speed and gradually decreasing it.

Next, a third embodiment of the present invention will be described. FIG. 7 is a block diagram of an information reproducing apparatus in the third embodiment of the present invention, FIG. 8 is a conceptual diagram of operation of a track pattern of a disc and a reproducing head, and FIG. 9 is an operational waveform diagram.

In FIG. 7, the same operation as the first embodiment, the second embodiment and the conventional example is shown in FIG. 1, FIG. 4 and FIG.
The same reference numeral as 0 is assigned and the description is omitted.

Reference numeral 22 is a motor control circuit. The synchronization signal 416 output from the signal processing circuit 7 is input, and the motor 2 is controlled to rotate at a speed twice as high as a normal speed, for example.

23 is an abnormality detection signal 40 from the amplifier circuit 9.
3 or a voice holding circuit that holds the output 404 of the signal processing circuit 7 when the overflow signal is output from the remaining amount detection circuit 25.

24 is an abnormality detection signal 40 from the amplifier circuit 9.
3 or an address holding circuit that holds the output 407 of the address detection circuit 12 when the overflow signal is output from the remaining amount detection circuit 25.

A remaining amount detecting circuit 25 detects and outputs the remaining amount of information stored in the memory 16 from, for example, the write address and the read address of the memory control circuit 17, and when it becomes a predetermined value x or more. Occasionally, the overflow signal 415 is output.

Reference numeral 26 is a system control circuit, which is a circuit for instructing the memory control circuit 17 to perform writing and reading and for designating a track to be accessed by the access control circuit 11.

The operation of the information reproducing apparatus configured as described above will be described below.

In FIG. 8, A1 attached to the track 1a
The numbers from A43 to A43 indicate addresses, as in FIGS.

FIG. 9A shows the reproducing head 4 in FIG.
Output 400 is shown, showing that the voice information recorded together with the address information is being reproduced. The shaded area indicates that the output 400 of the reproducing head 4 is disturbed.

FIG. 10B shows the abnormality detection signal 403 which is the output of the amplifier circuit 9. FIG. 7C shows the overlap signal 415 output by the remaining amount detection circuit 25.

FIG. 9D shows the address which is the output 407 of the address detection circuit 12. The shaded area indicates that the address could not be extracted.

The output 404 of the signal processing circuit 7 is shown in FIG.
Is shown. The shaded area indicates that the audio signal could not be corrected.

(F) of the figure shows the output 408 of the address holding circuit 14 held by the abnormality detection signal 403 ((b) of the figure).

FIG. 9G shows the output 4 of the voice holding circuit 13 held by the abnormality detection signal 403 (FIG. 11B).
05 is shown.

FIG. 6H shows the coincidence detection signal 406 output by the coincidence detection circuit 15. FIG. 11I shows the write signal 409 which is the output of the system control circuit 26. The memory control circuit 17 writes to the memory 16 when this signal is H, and stops writing when this signal is L.

FIG. 11J shows the read signal 410 output from the system control circuit 26. The memory control circuit 17 reads from the memory 16 when this signal is H, and stops reading when it is L.

The output signal 411 of the memory 16 is shown in FIG.
Is shown. The figure (l) shows the remaining amount of information in the memory 16.

When the reproduction is started in FIG. 8A, the reproducing head 4 outputs the voice information to which the address information is added as shown in FIG. 9A. The amplification circuit 9 amplifies and then outputs the reproduction signal 401 to the signal processing circuit 7 and the address detection circuit 12. The signal processing circuit 7 separates audio information from the reproduction signal 401 and outputs an audio signal 404 shown in FIG. 9 (e). On the other hand, the address detection circuit 12 separates the address information from the reproduced signal 401 and outputs the address signal 407 shown in FIG. And in FIG.
As shown in (e), the audio signal D1 is output from the signal processing circuit 7, and at the same time, the system control circuit 26 causes the write signal 409 (FIG. 9 (j)) and the read signal 410 (FIG. 9).
By setting both (j)) to H, the memory control circuit 17 starts writing and reading the audio signal to and from the memory 16. Since the writing speed is faster than the reading speed from the memory 16, the remaining information amount in the memory 16 gradually increases as shown in FIG.

When the reproducing head 4 reaches b,
The remaining information amount becomes the predetermined value x, and the remaining amount detection circuit 25 outputs the overflow signal 415 shown in FIG. 9C. By this overflow signal 415, the voice holding circuit 23 holds D6 which is the output of the signal processing circuit 7, and the address holding circuit 24 holds the address A7 which is the output of the address detection circuit 12. At the same time, the system control circuit 26 sets the write signal 409 (FIG. 9 (i)) to L, so that the memory control circuit 17 causes the audio signal 4
Writing of 04 (FIG. 9E) is stopped.

The system control circuit 26 instructs the access control circuit 11 to move the reproducing head 4 one track before in order to move the reproducing head 4 to the track in which the address A7 held in the address holding circuit 24 is recorded. Give instructions. Output 40 of the reproducing head 4 while the reproducing head 4 is moving
0 (FIG. 9A) is disturbed, but since it is not abnormal, the amplifier circuit 9 does not output the abnormality detection signal 403.

After the reproducing head 4 moves to c, the address detection circuit 12 starts outputting the address signal 407 and the signal processing circuit 7 starts outputting the audio signal 404. And
The audio signal output from the signal processing circuit 7 (FIG. 9E) is
When the voice signal D6 held by the voice holding circuit 23 matches, the match detection circuit 15 causes the match detection signal 406 (see FIG. 9).
(G)) is output. When the coincidence detection signal 206 is output, the system control circuit 19 sets the write signal 409 to H again, and the memory control circuit 17 causes the audio signal 404 (see FIG. 9).
Writing of (d)) to the memory 16 is started. As a result, the remaining amount of information in the memory 16 gradually increases.

Normally, reproduction is performed along the track 1a until the remaining amount of information in the memory 16 reaches a predetermined value x, but when the reproducing head 4 reaches d here, for example, vibration is applied and reproduction is performed on e. It is assumed that the head 4 has moved. When the tracking of the reproducing head 4 is lost at d, the output 400 (FIG. 9A) of the reproducing head 4 is disturbed, and the amplifier circuit 9 outputs the abnormality detection signal 403. This abnormality detection signal 40
3, the voice holding circuit 23 holds the output D21 of the signal processing circuit 7, and the address holding circuit 24 holds the output address A22 of the address detection circuit 12. At the same time, the system control circuit 26 causes the write signal 409 (see FIG.
By setting (i)) to L, the memory control circuit 1
4 stops writing the audio signal 404 (FIG. 9 (d)).

After the reproducing head 4 moves to e, the reproducing head 4
When the output 400 is stable, the address detection circuit 12 starts outputting the address again, and then starts outputting the addresses A6, A7 .... As a result, the system control circuit 26 can recognize the position of the reproducing head 4. The system control circuit 26 uses the address A held in the address holding circuit 24.
In order to move the reproducing head 4 to the address immediately before 22, the access control circuit 11 is instructed to move the reproducing head 4 one track later. While the playhead 4 is moving,
The output 400 (FIG. 9A) of the reproducing head 4 is disturbed,
Since it is not abnormal, the amplifier circuit 9 does not output the abnormality detection signal 403.

After the reproducing head 4 has moved to g, the address detection circuit 12 starts outputting the address signal 407 and the signal processing circuit 7 starts outputting the audio signal 404. And
The audio signal output from the signal processing circuit 7 (FIG. 9D) is
When it matches the voice signal D21 held by the voice holding circuit 23, the match detection circuit 15 causes the match detection signal 406 (see FIG. 9).
(G)) is output. When the match detection signal 406 is output, the system control circuit 26 sets the write signal 409 to H again, and the memory control circuit 17 causes the audio signal 404 (see FIG. 9).
Writing of (d)) to the memory 16 is started.

As described above, according to this embodiment, the audio signal is output via the memory 16, and when the tracking is lost, the audio signal is held and the writing of the audio signal to the memory 16 is stopped. , The reproducing head 4 is returned to an address where tracking is deviated, reproduction is performed again, and a voice signal equal to the held voice signal is written in the memory 16, whereby a continuous voice signal containing no error can be obtained in the memory 16. It is possible.

As a result, even in a system in which tracking is likely to be lost due to vibration or the like, continuous reproduction can be performed without interruption unless all audio signals stored in the memory 16 are read out.

In the above embodiment, the recording unit of the address information and the recording unit of the voice information are the same, but this is for the sake of simplification of the description and may not be the same.

In the above embodiment, the address is held by the address holding circuit during off-track, but it may be held by the system control circuit.

In the above embodiment, the audio signal comparison is made by comparing all the audio information samples recorded in one address information, but a part of the samples may be compared. .

In the above embodiment, when the tracking is lost and the output of the reproducing head 4 is disturbed, it is regarded as abnormal.
The abnormality may be determined when the error rate of voice information or the error rate of address information increases, or when the continuity of address information is lost.

[0101]

As described above, according to the present embodiment, it is possible to obtain a temporally continuous audio signal on the memory even if tracking is missed.

Therefore, even in a system in which the tracking error is very likely to occur due to vibration or the like, for example, a very small disc reproducing device, an in-vehicle reproducing device, a portable reproducing device, or the like, reproduction is performed without interruption. It becomes possible.

[Brief description of drawings]

FIG. 1 is a block diagram of an information reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a conceptual diagram of a track pattern of the disk and an operation of a reproducing head of the same embodiment.

FIG. 3 is an operation waveform diagram of the same embodiment.

FIG. 4 is a block diagram of an information reproducing apparatus according to a second embodiment of the present invention.

FIG. 5 is a conceptual diagram of the operation of the track pattern of the disc and the reproducing head of the same embodiment.

FIG. 6 is an operation waveform diagram of the embodiment.

FIG. 7 is a block diagram of an information reproducing apparatus according to a third embodiment of the present invention.

FIG. 8 is a conceptual diagram of the operation of the track pattern of the disk and the reproducing head of the embodiment.

FIG. 9 is an operation waveform diagram of the embodiment.

FIG. 10 is a block diagram of a conventional information reproducing device.

[Explanation of symbols]

 1 recording medium 2 motor 3 motor control circuit 4 reproducing head 7 signal processing circuit 9 amplification circuit 10 servo circuit 11 access control circuit 12 address detection circuit 13 voice holding circuit 14 address holding circuit 15 coincidence detection circuit 16 memory 17 memory control circuit 18 system Control circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tomosho Izumi 1006 Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Industrial Co., Ltd. (72) Hiroyuki Yonekura, 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. (72) Inventor Zenki Sato 1006 Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (4)

[Claims] 1. A reproducing means for reproducing information from a recording medium having a track on which data information is recorded together with address information at a predetermined transfer rate, a reproducing moving means for moving the reproducing means to a desired track, and the reproducing. An on-track state of the means is detected, and an abnormality detection means for outputting an abnormality detection signal when an off-track is caused by an abnormality; and a signal processing means for separating and outputting the data information from the information obtained by the reproducing means, Address detecting means for separating and outputting the address information from the information obtained by the reproducing means, memory means for temporarily storing the output of the signal processing means, and controlling write and read operations of the memory means Memory control means and data for holding the output of the signal processing means when the abnormality detection signal is output Holding means, address holding means for holding the output of the address detecting means when the abnormality detection signal is output, and comparison between the output of the signal processing means and the value held by the data holding means, if the two are equal, A coincidence detection unit that outputs a coincidence detection signal when it is determined, and an instruction to the memory control unit to prohibit writing to the memory unit when the abnormality detection signal is output, and the address holding unit. To the memory means at the same time when the coincidence detection signal is output after instructing the reproduction moving means to move the reproduction means to the track immediately before the address information held by And an system reproducing means for instructing the memory controlling means to restart the writing of the information. 2. A remaining amount detecting means for detecting the remaining amount of the data information stored in the memory means is provided, and the reproducing means changes the transfer rate for reproducing the information so that the detected remaining amount becomes a predetermined value. The information reproducing apparatus according to claim 1, wherein the information reproducing apparatus is provided. 3. A reproducing means for reproducing information from a recording medium having a track on which data information is recorded together with address information, a reproducing means moving means for moving the reproducing means to a desired track, and an on-track of the reproducing means. An abnormality detection unit that detects a state and outputs an abnormality detection signal when an off-track occurs due to an abnormality, a signal processing unit that outputs the data information by separating it from the information obtained by the reproduction unit, and the reproduction unit. An address detection unit that separates and outputs the address information from the obtained information, compares the output of the signal processing unit and the data held by the data holding unit, and if it is determined that they are equal, a match detection signal is output. Coincidence detection means for outputting, memory means for temporarily storing the output of the signal processing means, and writing of the memory means A memory control unit for controlling read / write operations, and a remaining amount for detecting and outputting the remaining amount of data information stored in the memory unit, and for outputting an overflow signal when the remaining amount exceeds a predetermined value x. Detection means, data holding means for holding the output of the signal processing means when the abnormality detection signal or the overflow signal is output, and the address detection means when the abnormality detection signal or the overflow signal is output An address holding means for holding the output of, and when the overflow signal is output, or when the abnormality detection signal is output, instructing the memory control means to prohibit writing to the memory means, To the track immediately before the address information held by the address holding means is recorded. Instructing the reproducing means moving means to move the reproducing means, instructing the memory control means to resume writing to the memory means at the same time when the coincidence detection signal is output after starting reproduction again. An information reproducing apparatus having a system control means for performing. 4. The information reproducing apparatus according to claim 1, wherein the storage medium is a disk medium and the tracks are formed in a concentric circle shape or a spiral shape.