JPH04337571A - Information signal reproducing device - Google Patents

Abstract

PURPOSE:To prevent a sound break with vibration, etc., in a CD player reproducing a voice signal recorded to an optical disk. CONSTITUTION:The error of information signal from a reproducing head 4 is corrected by an error correcting circuit 11 to write it to a memory 12. When tracking is off by the vibration, etc., the error of the information signal is detected by the error correcting circuit 11. The writing of the memory 12 is stopped with a memory controller 13 and the reproducing head 4 is restored to an address where the error is generated with an access controller 10 by the instruction of a system controller 15. When the reproducing is started again, by the memory controller 13, the writing to the memory 12 is started from the information signal of the address where the error is generated. By this operation, the information signal written to the memory 12 is a serial signal without error. Further, the information signal is read out from the memory 1 2 even during the period when this operation is performed, the sound signal is reproduced without a break.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information signal reproducing apparatus for reproducing information recorded on, for example, an optical disc.

0002

[Prior Art] In recent years, compact discs (hereinafter referred to as CDs), which convert audio signals into digital data and record them on discs, have become popular.
Video discs in which video signals (denoted as ``video'') and image signals (videos) are recorded in analog form have been put into practical use, and CD playback machines in particular have become widespread, and are used in a wide variety of ways, including in-vehicle use and portable use.

The above-mentioned conventional information signal reproducing device will be explained below with reference to the drawings. FIG. 7 is a block diagram of a conventional information signal reproducing device.

In FIG. 7, reference numeral 1 indicates that an audio information signal in CD format is transmitted onto a spiral track 1a using the CLV method (Constant LV method) in which the linear velocity of the track is constant.
This is a recording medium (hereinafter referred to as a disk) on which data is recorded using linear velocity. The disk 1 is rotated at a predetermined number of rotations by a motor 2 that rotates the disk 1 and a motor control circuit 3 that controls the rotation of the motor 2. The playback head 4 directs the light beam to the disk 1.
The reflected light from the disc 1 is photoelectrically converted, the information recorded on the disc 1 is reproduced, and the amplifier circuit 5
Output to. The amplifier circuit 5 amplifies the signal obtained by the reproduction head 4 and outputs a reproduction signal and a tracking error signal. Tracking error signal is sent to servo circuit 6
is input, and servo control is performed to position the playback head 4 at an optimal position on the track 1a. On the other hand, the reproduced signal is input to the error correction circuit 7, which extracts an information signal from the reproduced signal, detects errors in the information signal, performs error correction, and outputs a corrected information signal subjected to error correction. The correction information signal is processed by the signal processing circuit 8 and output to the outside.

[0005]

However, the conventional configuration described above has a problem in that when the reproducing head loses its tracking due to vibration and moves to another track, the information signal is interrupted.

[0006] The present invention solves the above-mentioned conventional problems.
To provide an information signal reproducing device capable of reproducing an audio signal without interruption even when moving to another track.

[0007]

[Means for Solving the Problem] In order to achieve this object, the information signal reproducing apparatus of the present invention includes a recording medium having a track in which an information signal is recorded together with an address in a block unit, and a recording medium in which the information signal is transmitted from the recording medium. a reproducing head for reading out the information, a reproducing head moving means for moving the reproducing head to a desired track, a driving means for maintaining a relative speed between the reproducing head and the recording medium at a predetermined value, and the information that is the output of the reproducing head. Error correction means for detecting and correcting errors in the signal and outputting a flag indicating the error state of the information signal; address detection means for separating and extracting the address recorded together with the information signal; and error correction means. information storage means for temporarily storing the information signal corrected by the information storage means; storage control means for controlling write and read operations of the information storage means; Instructing the storage control means to prohibit writing to the storage means, and instructing the reproduction head moving means to move the reproduction head to an address corresponding to the information signal for which writing was prohibited, and storing information at the address. and system control means for instructing the storage control means to start writing into the information storage means again based on the signal.

Further, the information signal reproducing device of the present invention includes a remaining amount detecting means for detecting the remaining amount of the information signal stored in the storage means, and the driving means is configured such that the detected remaining amount becomes a predetermined value. The relative speed between the playback head and the recording medium is controlled in this way.

Further, in the information signal reproducing apparatus of the present invention, the storage medium is a disk medium, and the tracks are formed in a concentric or spiral shape.

0010

[Operation] With the above-described structure, when the tracking is lost due to vibration or the like and an error occurs in the information signal, the playback head is returned to the address where the error occurred, and the playback is performed again. It is possible to synthesize only missing information signals and obtain a continuous information signal. Also,
Since the information signal written in the memory in advance is read even during the period from when an error occurs until the reproduction is performed again, it is possible to reproduce the information signal without interruption.

[0011] Furthermore, it becomes possible to always maintain the remaining amount of information in the memory at a predetermined value. Therefore, even if the playback head has to be moved many times due to many errors in the information signal, the amount of information remaining in the memory will not run out, and the information signal can be played without interruption. It becomes possible to play.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an information signal reproducing apparatus according to a first embodiment of the present invention, FIG. 2 is a conceptual diagram of the track pattern of the disk and the operation of the reproducing head, and FIG. 3 is an operational waveform diagram.

In FIG. 1, components that operate in the same way as in the conventional example are designated by the same reference numerals as in FIG. 7, and their explanation will be omitted.

Reference numeral 9 servo-controls the reproducing head 4 to a proper position on the track 1a using the tracking error signal output from the amplifier circuit 5, and also controls the access control circuit 10.
This is a servo circuit that moves the playback head 4 to the track indicated by . Reference numeral 10 denotes an access control circuit that instructs the servo circuit 9 to move the position of the playback head 4 to a designated track. 11 inputs the reproduced signal from the amplifier circuit 5, detects errors in the information signal, outputs a corrected information signal subjected to error correction, and outputs a flag indicating the error state of the information signal, for example, the frequency of errors. This is an error correction circuit. Reference numeral 12 denotes a memory that temporarily stores the correction information signal output from the error correction circuit 11. Reference numeral 13 denotes a memory control circuit that controls write and read operations of the memory 12. For example, when the write signal from the system control circuit 15 is "H", writing is performed, and when it is "L", writing is stopped. Further, when the read signal from the system control circuit 15 is "H", reading is performed, and when it is "L", reading is stopped. Reference numeral 14 denotes an address detection circuit which inputs the reproduced signal from the amplifier circuit 5, separates and extracts the address of the information signal from the reproduced signal, and outputs the extracted address. 15 is a system control circuit, which instructs the memory control circuit 13 to write and read, and also controls the access control circuit 10.
This is a circuit that specifies the track to be accessed.

The operation of the information signal reproducing apparatus configured as described above will be explained below.

In FIG. 2, the reproducing head 4 that reproduces track A of track 1a normally reproduces B, C, D,
Reproduction is performed along track E and track 1a, but here we will explain the operation in the case where when the reproducing head 4 reaches C, vibration is applied and the reproducing head 4 moves to C'. To simplify the explanation, A1 to A5 is used for A to B, and B1 to B is used for B to C.
5. It is assumed that five information signals C1 to C2 are recorded in each of C to D. Further, the numbers 1 to 44 given on the track 1a are addresses.

FIG. 3(a) shows the correction information signal output from the error correction circuit 11, and the shaded areas indicate that there are many errors and the correction could not be completed. FIG. 2B shows a flag indicating the error state output from the error correction circuit 11. Here, to simplify the explanation, a case where the error rate is lower than a predetermined value is indicated by ◯, and a case where it is higher is indicated by ×. FIG. 4(c) shows the address that is the output of the address detection circuit 10. The shaded area indicates that the address could not be extracted. Figure (d) shows the system control circuit 1.
The write signal which is the output of 5 is shown. The memory control circuit 13 writes into the memory 12 when this signal is "H", and stops writing when it is "L". Same figure (
e) shows a read signal that is the output of the system control circuit 15. The memory control circuit 13 receives this signal as “H”.
When the signal is "L", reading is performed from the memory 12, and when the signal is "L", reading is stopped. FIG. 3(f) shows the output of the memory 12. FIG. 3(g) shows the remaining amount of information in the memory 12.

When playback starts at A, the system control circuit 15 sets the write signal (d) to "H",
Writing of the correction information signal (a) to the memory 12 is started. As a result, the remaining amount of information in the memory 12 gradually increases as shown in (g). Then, when the remaining amount of information reaches, for example, x, the system control circuit 15 sets the read signal (e) to "H", and reading from the memory 12 is started. The read signal is subjected to signal processing by the signal processing circuit 8 and output to the outside. When reading starts, the amount of information written and read is balanced, and the remaining amount of information becomes a constant value x. The read signal (f) is
The signal processing circuit 8 generates a signal that can be outputted to the outside.

[0020] Here, for example, vibration is applied at C,
Assume that tracking is lost and the reproducing head 4 moves to C'. When tracking is lost, the reproduced signal is disturbed and the error rate of the information signal sharply increases, and the flag (b) changes from ○ to ×. Further, at this time, the correction information signal (a) also becomes uncorrectable as indicated by diagonal lines. The system control circuit 15 stores the address 10 immediately before the flag becomes x, and at the same time sets the write signal (d) to "L". As a result, the memory control circuit 13 receives the correction information signal (a).
Stop writing.

On the other hand, when the reproduction signal becomes stable after the reproduction head 4 moves to C', the address detection circuit 14 starts outputting addresses again and outputs the address 24. This allows the system control circuit 15 to recognize the position of the reproducing head 4. The system control circuit 15 instructs the access control circuit 10 to move the playback head 4 two tracks forward in order to move the playback head 4 to the address 11 that follows the address 10 that was previously stored, which is the address where the tracking is off. Instruct.

After the reproducing head 4 moves to C'', the address detection circuit 14 starts outputting the address, and when the address reaches 11, it outputs the write signal (d) again to ``H''.
”, and the memory control circuit 13 starts writing the correction information signal (a) into the memory 12.

As described above, according to this embodiment, when a correction information signal is output via the memory 12 and an error occurs in the information signal, the playback head 4 is returned to the address where the error occurred and playback is resumed. By starting, it is possible to obtain a continuous error-free information signal on the memory 12.

[0024] As a result, even in a system where tracking is lost due to vibration or the like and errors in the information signal are likely to occur, the data can be reproduced continuously without interruption as long as it can be absorbed by the memory 12.

Note that in the first embodiment, when tracking is lost and the error rate of the information signal increases, address 10 immediately before the error occurred is stored, but address 11 where the error occurred is stored. Any method is fine,
It is sufficient if the data can be reproduced from address 11 after moving the reproduction head 4.

FIG. 4 is a block diagram of an information signal reproducing apparatus according to a second embodiment of the present invention, FIG. 5 is a conceptual diagram of the disk track pattern and the operation of the reproducing head, and FIG. 6 is an operational waveform diagram.

In FIG. 4, parts that operate in the same way as in the first embodiment are designated by the same reference numerals as in FIG. 1, and their explanation will be omitted.

Reference numeral 16 denotes a remaining amount detection circuit that detects the remaining amount of information from the write address and read address of the memory control circuit 13. Reference numeral 17 denotes a motor control circuit that controls the rotational speed of the motor 2 according to instructions from the system control circuit 18. 18 is a system control circuit, and memory control circuit 1
3 to write and read a correction information signal, to instruct the access control circuit 10 about the track to be accessed, and to control the rotational speed of the motor 2 according to the output of the remaining capacity detection circuit 16. This is a circuit that gives instructions.

The operation of the information reproducing apparatus configured as described above will be explained below.

In FIG. 5, normally, the reproducing head 4 for reproducing track A of track 1a would then reproduce B, C, D,
Playback is performed along track E and track 1a, but here we will explain the operation in the case where, as in the first embodiment, when the playback head 4 reaches C, vibration is applied and the playback head 4 moves to C'. . To simplify the explanation, A1 to A is used for A to B.
5. It is assumed that five information signals are recorded in each of B to C, B1 to B5, and C to D, C1 to C2. Also,
The numbers 1 to 44 placed on the track 1a are addresses.

FIG. 6(a) shows the correction information signal output from the error correction circuit 11, and the shaded areas indicate that there are many errors and the correction could not be completed. FIG. 2B shows a flag indicating the error state output from the error correction circuit 11. Here, to simplify the explanation, a case where the error rate is lower than a predetermined value is indicated by ◯, and a case where it is higher is indicated by ×. FIG. 4(c) shows the address that is the output of the address detection circuit 10. The shaded area indicates that the address could not be extracted. Figure (d) shows the system control circuit 1.
The write signal which is the output of 5 is shown. The memory control circuit 13 writes into the memory 12 when this signal is "H", and stops writing when it is "L". Same figure (
e) shows a read signal that is the output of the system control circuit 15. The memory control circuit 13 receives this signal as “H”.
When the signal is "L", reading is performed from the memory 12, and when the signal is "L", reading is stopped. FIG. 3(f) shows the output of the memory 12. FIG. 3(g) shows the remaining amount of information in the memory 12. FIG. 4(h) shows the relative speed between the reproducing head 4 and the disk 1.

When reproduction is started in A, the remaining amount detection circuit 16 detects that the remaining amount of information in the memory 12 is 0. Therefore, the system control circuit 18 instructs the motor control circuit 17 to rotate at twice the normal speed (2V), for example. As a result, motor control circuit 1
7 controls the speed of the motor 2 to maintain it at twice the speed. At the same time, the system control circuit 18 sets the write signal (d) to "H" to start writing the correction information signal (a) into the memory 12. As a result, the remaining amount of information in the memory 12 gradually increases as shown in (g). When the remaining amount detection circuit 16 detects that the remaining amount of information has reached the predetermined value x, the system control circuit 18 instructs the motor control circuit 17 to rotate at the normal speed V. As a result, the motor control circuit 17
controls the speed of motor 2 to maintain it at speed V. At the same time, the system control circuit 18 also sends a read signal (
Reading from the memory 12 is started by setting e) to H. When reading starts, the amount of information written and read are balanced, and the remaining amount of information becomes a constant value of the predetermined value x. The read signal (f) is generated by the signal processing circuit 8 into a signal that can be outputted to the outside.

[0033] Here, for example, vibration is applied at C,
Assume that tracking is lost and the reproducing head 4 moves to C'. When tracking is lost, the reproduced signal is disturbed and the error rate of the information signal sharply increases, and the flag (b) changes from ○ to ×. Further, at this time, the correction information signal (a) also becomes uncorrectable as indicated by diagonal lines. The system control circuit 18 stores the address 10 immediately before the flag becomes x, and at the same time sets the write signal (d) to "L". As a result, the memory control circuit 13 receives the correction information signal (a).
Stop writing.

On the other hand, when the reproduction signal becomes stable after the reproduction head 4 moves to C', the address detection circuit 14 starts outputting addresses again and outputs the address 24. This allows the system control circuit 18 to recognize the position of the playback head 4. The system control circuit 18 instructs the access control circuit 10 to move the playback head 4 two tracks forward in order to move the playback head 4 to the address 11 that follows the previously stored address 10, which is the address where the tracking is off. Instruct.

After the playback head 4 moves to C'', the address detection circuit 14 starts outputting addresses.
At this time, the remaining amount detection circuit 16 determines that the remaining amount of information is a predetermined value x.
It is detected that there is less. Therefore, when the address becomes 11, the system control circuit 18 sets the write signal to "H" again, and the memory control circuit 13
starts writing the correction information signal (a) into the memory 12, and instructs the motor control circuit 17 to rotate at twice the normal speed (2V). Then, when the remaining amount detection circuit 16 detects that the remaining amount of information has reached x, the motor control circuit 1 causes the motor to rotate at the normal speed V.
7.

As described above, according to this embodiment, the memory 1
By providing a remaining amount detection circuit 16 that detects the remaining information amount of No. 2 and controlling the number of revolutions of the disk 1 according to the remaining information amount, the remaining information amount will never become 0 unless errors occur in quick succession. do not have. Therefore, no matter how many times you make a mistake, the playback can be continued without interruption.

Furthermore, by estimating the error frequency of the system in advance, the capacity of the memory 12 can be minimized.

In the second embodiment, after the reproducing head 4 is moved, it is assumed that the reproducing head 4 rotates at a relative speed V during the period from addresses 8 to 10, but it may rotate at a relative speed of 2 V.

In the second embodiment, reading from the memory 12 is started when the remaining amount of information reaches the predetermined value x, but reading may be started at the same time as writing starts.

In the first and second embodiments, the error correction circuit 11 compares the error rate with a predetermined value and makes a determination of ○×, but the determination may be made by the system control circuit.

Although the memory 12 was used in the first and second embodiments, since the error correction circuit 11 normally performs error correction using memory, the memory 12 is shared with the memory of the error correction circuit. Also good.

[0042] In the first and second embodiments, the recorded signal is a signal based on the CD format, but other signal formats may be used.

[0043]

As described above, according to this embodiment, even if tracking is lost, it is possible to reproduce without interruption. Therefore, even in systems where tracking loss is very likely to occur due to vibrations, such as very small disk playback devices, in-vehicle playback devices, or portable playback devices, it is possible to play back without interruption. This has become possible, and the technical effects are great.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an information signal reproducing device in a first embodiment of the present invention.

[Fig. 2] Conceptual diagram of the track pattern of the disc and the operation of the playback head in the same embodiment.

[Figure 3] Waveform diagram for explaining the operation of the same embodiment

FIG. 4 is a block diagram showing the configuration of an information signal reproducing device in a second embodiment of the present invention.

[Fig. 5] Conceptual diagram of the track pattern of the disc and the operation of the playback head in the same embodiment.

[Figure 6] Waveform diagram for explaining the operation of the same embodiment

FIG. 7 is a block diagram showing the configuration of a conventional information signal reproducing device.

[Explanation of symbols]

1 Recording medium 2 Motor 3 Play head 4 Amplification circuit 8 Signal processing circuit 9 Servo circuit 10 Access control circuit 11 Error correction circuit 12 Memory 13 Memory control circuit 14 Address detection circuit 15, 18 System control circuit 16 Remaining amount detection circuit 17 Motor control circuit

Claims (3)

[Claims] 1. A recording medium having a track in which information signals are recorded together with addresses in blocks, a reproduction head for reading the information signals from the recording medium, and reproduction head moving means for moving the reproduction head to a desired track. a driving means for maintaining a relative speed between the reproducing head and the recording medium at a predetermined value; detecting and correcting errors in the information signal output from the reproducing head;
an error correction means for outputting a flag indicating an error state of the information signal; an address detection means for separating and extracting an address recorded together with the information signal; an information storage means for storing information in the storage means; a storage control means for controlling write and read operations of the information storage means; and a storage control means for inhibiting writing of the information signal to the storage means according to the state of the flag. instructing the reproducing head moving means to move the reproducing head to an address corresponding to the information signal whose writing is prohibited;
An information signal reproducing device comprising: a system control means for instructing the storage control means to start writing into the information storage means again from the information signal at the address. 2. Remaining amount detecting means for detecting the remaining amount of the information signal stored in the storage means, the driving means adjusting the relative position between the reproducing head and the recording medium so that the detected remaining amount becomes a predetermined value. The information signal reproducing device according to claim 1, wherein the information signal reproducing device controls the speed. 3. The information signal reproducing apparatus according to claim 2, wherein the storage medium is a disk medium, and the tracks are formed concentrically or spirally.