JPS6079729A - Wafer oxidation process - Google Patents

Abstract

PURPOSE:To decrease dummy wafers improving eveness by a method wherein both front end of front wafer and rear end of rear wafer are heated so that the temperature gradient within wafer surfaces may be decreased to make the temperature within wafer surfaces even. CONSTITUTION:Heaters 2 are provided on both ends of a boat 5 loaded with wafers 4 between the heaters. The heaters provided on both ends heat the end wafers subject to even temperature distribution with planes in parallel with the wafers. The influence of the dispersion of wafer temperature distribution upon the dispersion of oxide film thickness attains from the end wafer temperature distribution to the nearer wafer temperature distribution. Through these procedures, the numbers of dummy wafers may be decreased remarkably by means of controlling to make the both end wafer temperature distribution similar to the central part wafer temperature distribution by auxiliary heaters provided other than furnace walls.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an oxidation process for forming an oxide film on the surface of a wafer in a semiconductor manufacturing process, and in particular to the production of wafers with a uniform oxide film for the purpose of high yield. oxidation method suitable for

[Background of the invention]

In the conventional oxidation method, the wafer was heated only by radiation from the wall of the oxidation furnace, which was maintained at a high temperature, making it difficult to control the temperature distribution between and within the wafer, resulting in large variations in the oxide film after heating. was occurring. This has been a major problem in improving quality and yield in large-scale integrated circuit production.

[Purpose of the invention]

The purpose of the present invention is to minimize the variation from wafer to wafer and the variation on the same wafer surface to 1 in the thickness of the oxide film formed on the wafer surface during the oxidation step of the semiconductor manufacturing process, and to improve the quality of large-scale integrated circuits. The objective is to provide an oxidation method to achieve high yield.

[Summary of the invention]

The present invention is based on new discoveries regarding the oxidation process obtained from simulation and experimental results.

The model used in the simulation is based on basic physical laws and describes the phenomenon as it is without much approximation. To describe it all below, +div(Kw@grad'l'+) --(1) Here, TI is the i-th wafer temperature%Cw is the wafer specific heat, ρW is the wafer density%7w is the wafer thickness, and t is time, σ is the Boltzmann-Stefan constant, a is the wafer heat absorption coefficient, 5 gw is the wafer emissivity, Gn, s are the inter-wafer coefficients, and the subscript n represents the number of reflections.

TP is the furnace wall temperature, εf is the furnace wall emissivity, F n is the wafer wall-to-wall view factor, Kw is the wafer thermal conductivity, dsy, ds
y represents a small area piece of the furnace wall surface and the wafer surface, respectively.

Also, regarding the right side of equation (1), the first term is self-radiation loss,
The second term represents radiation from adjacent wafers, the third term represents radiation from the furnace wall, and the fourth term represents thermal diffusion.

From the experimental results, the distribution of oxide film thickness between wafers as shown in FIG. 2 and the distribution of oxide film thickness within the wafer surface as shown in FIG. 4 are known. FIG. 2 shows that the oxide film thickness at the center of the wafer is small near both ends of the wafer row. Figure 4 shows AA' in Figure 1 of the wafers at both ends (left figure), the wafer in the uniform part (right figure), and the wafer in the middle (center figure).
B-B'.

The oxide film thickness distribution along c-c' is shown. It can be seen that the average oxide film thickness of the wafer at the far end is (/](→) smaller, and the variation in oxide film thickness within the wafer surface is large.

This oxide film thickness distribution is thought to be strongly dependent on the wafer temperature distribution, but since no experiments have been conducted to directly measure the temperature distribution under the same conditions as on the actual production line, it is unclear what kind of temperature control inside the oxidation furnace should be applied. was in a state of groping in the dark.

By setting parameters, the simulator used in the present invention can output the inter-wafer temperature distribution and the in-plane temperature distribution of the wafer under each simulation condition. From this simulation result, the wafer temperature distribution (inter-wafer temperature distribution and inter-wafer temperature distribution) shows a tendency very similar to the oxide film thickness measurement results shown in Figures 2 and 4, and is calculated by the following formula. Wafer temperature and oxide film thickness were correlated.

X” = A・r・exp(B/Tw) Here, X is the oxide film thickness, τ is the oxidation time, Tw is the wafer temperature, A, B
(>0) is a constant. Target oxide film thickness XO and oxidation time τ
When 0 is given, the required wafer temperature is determined according to the above equation.

The reason why the wafer oxide film thickness near both ends of the wafer row is generally small and the oxide film thickness distribution within the wafer surface is not uniform is because the wafer temperature distribution is not uniform. Figures 2 and 4
From the figure and the relationship between oxide film thickness and wafer temperature, it can be seen that the wafer temperature distribution at both ends has a lower average temperature than the wafer temperature distribution in the uniform part, and the temperature gradient within the plane is large. The non-uniform tendency weakens from both ends inward and continues to a strong part in the center. Since the temperature distribution of the wafers at both ends has an adverse effect on the neighboring wafers due to the thermal radiation of the eight urchins, the temperature distribution of the neighboring wafers is also lower than the temperature of the uniform portion, resulting in a large temperature gradient. Similar effects are successively transmitted inward from both ends, resulting in the temperature distribution and oxide film thickness distribution as shown in FIGS. 2 and 4.

For the above reasons, in order to improve the uniformity of the wafer temperature distribution, it is effective to improve the temperature distribution of the wafer at both ends so that it approaches the temperature distribution of a uniform portion. The wafer average temperature at both ends is T1% The wafer average temperature at the uniform part is “
v2, the wafer average temperature T between both ends and the uniform part
ld T r < T < T 2 is satisfied. The target value of oxide film thickness is Xo, and the allowable range of variation is ΔX.
Ueno temperature f T'w corresponding to o, X O-
If the wafer temperature fj corresponding to ΔX is T 2 - ΔT, then if the temperature of the wafers at both ends is controlled so that 14 - ΔT <T"1<'I" 2, in principle all wafers can be made of high quality. An oxide film will be obtained.

For the same reason, if the in-plane temperature gradient at both ends of the wafer is made sufficiently small, the area of uniform oxide film thickness per wafer will be increased.

However, in order to bring the temperature of the wafer at both ends to the optimal temperature as described above, simulations have not shown that sufficient results can be obtained using conventional heating from the furnace walls alone. Therefore, it is necessary to control the temperature of the wafers at both ends from other than the furnace wall.

The temperature non-uniformity of the wafers at both ends is due to the asymmetry between the front and back surfaces of the wafer because there is only one wafer adjacent to the wafer and the side not adjacent to the wafer receives radiation directly from the furnace wall. Therefore, the present invention is characterized in that a heater is provided on the side not adjacent to the wafer to control the temperature of the wafers at both ends.

The heater has a flat surface parallel to the wafer, and the temperature of the flat surface is equal to the temperature of the uniform part T! to suppress in-plane temperature gradients as much as possible. Although there is little possibility of online control due to the high temperature environment, it is possible to improve the productivity of the current wafer oxide film by determining the optimal temperature of the furnace heater through several trials and controlling the wafer temperature at both ends at that temperature. Both quantity and quantity can be improved.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. Heaters 2 are provided at both ends of a boat 5 on which wafers 4 are placed, and the wafers are arranged between them. The heaters placed at both ends heat the wafer at the ends with a uniform temperature distribution with a plane parallel to the wafer.

The influence of the unevenness of the temperature distribution on the variation in oxide film thickness is known from actual and simulation results as shown in Figures 2 and 4.
The figure shows that the temperature distribution of the wafer at the edge affects the temperature distribution of the wafer nearby. Therefore, if an auxiliary heater other than the furnace wall is installed and controlled so that the temperature distribution of the wafers at both ends is the same as the temperature distribution of the wafers in the middle, the number of dummy wafers can be significantly reduced. . However, as for the temperature setting of the furnace heater, the optimum temperature shall be determined through several trials and then adopted.

〔Effect of the invention〕

According to the invention, it is possible to reduce dummy oxide films that could not be commercialized due to thin or uneven oxide films and improve uniformity, which has the effect of improving productivity and quality of large-scale integrated circuits. .

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional oxidation apparatus, Fig. 2 is a diagram of temperature distribution between wafers in an oxidation furnace, Fig. 3 is a block diagram of an oxidation apparatus which is an embodiment of the present invention, and Fig. 4 is a block diagram of a conventional oxidation apparatus. FIG. 3 is an oxide film thickness distribution diagram obtained by the method.

Claims (1)

[Claims] 1. In the oxidation step of the semiconductor manufacturing process, the temperature of the wafers near the front and rear ends of the wafer row is made to be approximately the same as that of the wafers in the middle, and at the same time, the temperature gradient within the wafer surface is reduced. A wafer oxidation method that heats from the front of the leading wafer and the rear of the trailing wafer to equalize the temperature.