JPS607219A - Electronic tuning receiver - Google Patents
Electronic tuning receiverInfo
- Publication number
- JPS607219A JPS607219A JP11547383A JP11547383A JPS607219A JP S607219 A JPS607219 A JP S607219A JP 11547383 A JP11547383 A JP 11547383A JP 11547383 A JP11547383 A JP 11547383A JP S607219 A JPS607219 A JP S607219A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- diode
- voltage
- capacitance
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
- H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
- H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
- H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Superheterodyne Receivers (AREA)
Abstract
Description
【発明の詳細な説明】 産業上の利用分野 本発明は′1π子回調受信機に関する。[Detailed description of the invention] Industrial applications The present invention relates to a '1π-digit tuning receiver.
1ケ景技術とその問題点
以前のFM放放送受画3機76〜g g MHzのFM
放送帯をカバーするものが殆どであったか、近時テレビ
ジョンの1〜3チヤンネルの音声受信用とか海外向とか
のために、受信周波数範囲を76〜108 MHzと拡
張したFM受信機も多く出回っている。1. Keiko technology and its problems 3 previous FM broadcast receivers 76~g g MHz FM
Perhaps most of them covered the broadcast band, but recently many FM receivers with extended reception frequency ranges of 76 to 108 MHz have become available, for example, for receiving audio from television channels 1 to 3 or for overseas use. There is.
このような従来のFM受信機の一例を第1図を参照しな
がら説明しよう。この第1図において、+1)は受信ア
ンテナを示し、この受信アンテナ(11K誘起された高
周波信号はアンテナ同調回路(2)、高周波増幅器(3
)及び高周波同調回路(4)によって選択増幅された後
、混合器(57に供給される。アンテナ同調回路(2)
は1次コイル(2a)、2次コイル(2す、コンデンサ
(2C)及び可変容量ダイオード(以下VCダイオード
と云う) (2d)から成り、その同調周波数fi9は
主として2次コイル(22)のインダクタンスとVCダ
イオード(2d)の容量とで定まる。An example of such a conventional FM receiver will be explained with reference to FIG. In this Fig. 1, +1) indicates the receiving antenna, and the high frequency signal induced by this receiving antenna (11K) is transmitted through the antenna tuning circuit (2) and the high frequency amplifier (3).
) and the high frequency tuning circuit (4), and then supplied to the mixer (57).Antenna tuning circuit (2)
consists of a primary coil (2a), a secondary coil (2s), a capacitor (2C), and a variable capacitance diode (hereinafter referred to as VC diode) (2d), and its tuning frequency fi9 is mainly determined by the inductance of the secondary coil (22). and the capacitance of the VC diode (2d).
一方、高周波同調回路(4)は高周波コイル(4す、コ
ンデンサ(4C)及びVCダイオード(4d)から成り
、その同調周波数はアンテナ同調回路(2)と等しい。On the other hand, the high frequency tuning circuit (4) consists of a high frequency coil (4s), a capacitor (4C), and a VC diode (4d), and its tuning frequency is equal to that of the antenna tuning circuit (2).
(6)は局部発振器を示し、この局部発熾器(6)から
その共振回路(7)によって定まる周波数の発掘出力が
混合回路(5)に供給される。共像回路(7)は共伽コ
イル(7す、コンデンサ(7c)及びVCダイオード(
7d)から成っている。(8s)並びに(8o)はそれ
ぞれケに連動する制御電圧発生器を示し、この制用1
ftf LE発生器(8s)の出力は抵抗器(2r)及
び(4r)を夫々介し−cvcダイオード(2d)及び
(4d)に供給されてそれらの容1iが制御される。一
方、制御電圧発生器(8o)の出方は抵抗器(7r)を
介してVCダイオード(7d)に供給されてその容置が
制御される。(6) indicates a local oscillator, from which an excavated output at a frequency determined by its resonant circuit (7) is supplied to the mixing circuit (5). The common image circuit (7) consists of a common coil (7s), a capacitor (7c), and a VC diode (
7d). (8s) and (8o) respectively indicate control voltage generators interlocked with
The output of the ftf LE generator (8s) is supplied to -cvc diodes (2d) and (4d) via resistors (2r) and (4r), respectively, to control their capacitances 1i. On the other hand, the output of the control voltage generator (8o) is supplied to the VC diode (7d) via the resistor (7r) to control its capacity.
(9)は中間周波増幅器を示し、i]R合器(5)の出
力はこの中間周波増幅器(9)で増幅されてFM復調器
o(1)に41(給される。り調器001の出力は低周
波増幅器旧)を介してスピーカ(121に供給される。(9) indicates an intermediate frequency amplifier, and the output of the i]R combiner (5) is amplified by this intermediate frequency amplifier (9) and fed to the FM demodulator o(1). The output of is supplied to the speaker (121) via the low frequency amplifier (old).
ところで、受信周波数f3の範囲を76〜l Q8MH
zに拡げると最高周波数と最低周波数との比はKs =
108÷76 !−i 1.421 となる。By the way, the range of reception frequency f3 is 76~l Q8MH
When expanded to z, the ratio of the highest frequency to the lowest frequency is Ks =
108÷76! -i 1.421.
これに対応して局部発振周波数foの範囲は、上側ヘテ
ロダインの場合、86.7〜118.7 M)Izとな
り、最高・最低周波数比は
Ko = 118.7÷86.7 ’=i 1.368
となる。Correspondingly, the range of the local oscillation frequency fo is 86.7 to 118.7 M)Iz in the case of the upper heterodyne, and the highest to lowest frequency ratio is Ko = 118.7÷86.7'=i1. 368
becomes.
上述の所要周波数範囲をカバーするために、同調回路(
2)及び(4)並びに局部発振器(6)の共振回路(力
のVCダイオード(2d)及び(4d)並びに(7d)
の容量可変範囲ΔCs及びΔCoは、同調回路及び共振
回路の漂遊容量をそれぞれC5S及びCsoとするとき
、それぞれ次のようになる。To cover the required frequency range mentioned above, a tuned circuit (
2) and (4) and the resonant circuit of the local oscillator (6) (power VC diodes (2d) and (4d) and (7d)
The capacitance variable ranges ΔCs and ΔCo are as follows, when the stray capacitances of the tuned circuit and the resonant circuit are respectively C5S and Cso.
ΔCs = Css (Ks−1) = 1.02 C
ssΔCo = Cso (Ko−1) = 0.87
4 Cs。ΔCs = Css (Ks-1) = 1.02C
ssΔCo = Cso (Ko-1) = 0.87
4 Cs.
通常、信号系の同調回路(2)及び(4)の漂遊容量C
85O方が共振回路(力の血遊容付Csoよりも大きい
ので、同調回路のダイオード(2d)及び(4d)の容
量可変範囲ΔCsは共振回路のダイオード(7d)の容
量可変範囲ΔCOよりもかなり太き(なる。この場合、
同調回路、共壺回路双方のダイオードの容量を制御する
ために、同じ制御電圧を供給したのでは、同調回路の容
量可変範囲が不足してしまう。そこで、従来は受信周波
数帯を76〜9QMIlz及び88〜108 MHzの
ように2分して周波数範囲を狭めると共に、同調コイル
(2Q)及び(4氾)並びに発振コイル(7りを2分さ
れた周波数417においてそれぞれ切り換えたり、或は
第1図に示したように局部発振用i1制御成圧発生回路
(8o)とは別個に所費の制@171(圧が得られる信
号系同調回路用制御電圧発生回路(8S)が併用されて
いた。この制御電圧発生回路(8S)には、図示しない
が、例えばシンセザイザ受信機のプログラマブル分周器
の分周比に応じた周波数データを出力する゛マイクロプ
ロセッサと、この周波数データを変換するD/A変換器
とが用いられており、いずれにしても構成が複雑になる
欠点があった
発明の目的
本発明はかかる点に鑑み、単一の制御電圧発生手段を用
いて同調回路及び局部発振器の共振回路の各VCダイオ
ードの容量をそれぞれ所要範囲にわたって制御し得るよ
うにした電子同調受信機を提供することを目的とする。Normally, the stray capacitance C of the signal system tuning circuits (2) and (4)
Since 85O is larger than the resonant circuit (Cso with force hemodynamics), the variable capacitance range ΔCs of the diodes (2d) and (4d) in the tuned circuit is much larger than the variable capacitance range ΔCO of the diode (7d) in the resonant circuit. Thick (naru. In this case,
If the same control voltage is supplied to control the capacitances of diodes in both the tuned circuit and the common circuit, the capacitance variable range of the tuned circuit will be insufficient. Therefore, in the past, the receiving frequency band was divided into two parts such as 76-9QMIlz and 88-108 MHz to narrow the frequency range, and the tuning coil (2Q) and (4th wave) and the oscillation coil (7th wave were divided into two). Alternatively, as shown in Fig. 1, the local oscillation i1 control pressure generation circuit (8o) can be switched at frequency 417, or the cost control @171 (signal system tuning circuit control that obtains pressure) can be used. A voltage generation circuit (8S) was also used. Although not shown, this control voltage generation circuit (8S) includes, for example, a microcontroller that outputs frequency data according to the division ratio of a programmable frequency divider of a synthesizer receiver. A processor and a D/A converter for converting this frequency data are used, and in any case, the configuration is complicated.Object of the Invention In view of the above, the present invention provides a single control voltage. It is an object of the present invention to provide an electronically tuned receiver in which the capacitance of each VC diode in a tuning circuit and a resonant circuit of a local oscillator can be controlled over a required range using a generating means.
発明の概要
本発明は高周波受信(S骨用同調回路と、この高周波受
1a信号の周彼桑又より中間周波数だけ高い周波数を発
掘する局部発掘回路とを有し、同調回路及び局部発条回
路にそれぞれ町変容[3ダイオードを設けて成る電子同
一9 (i’f機において、可変客引ダイオードの容量
を制御する電圧を発生する制御44i圧発生手段からの
制御電圧を発振回路の可変容に5ダイオードには直接印
加すると共に、同11.4回路の可変容量ダイオードに
は抵抗分圧器を介して供給するよ5Klたものであって
、単一の制御電圧発生回路を用いながら、同調回路及び
局部発掘回路がそれぞれ所要の広い周波数範囲をカバー
することができる。Summary of the Invention The present invention has a tuning circuit for high frequency reception (S bone) and a local excavation circuit that excavates a frequency that is higher than the frequency of the high frequency reception 1a signal by an intermediate frequency. (In the machine, the control voltage from the pressure generating means is applied to the variable capacitance of the oscillation circuit.) A voltage of 5Kl is applied directly to the diode, and is also supplied to the variable capacitance diode of the same 11.4 circuit via a resistive voltage divider. Each excavation circuit can cover the required wide frequency range.
実施例
以下、第2図及び113図を参照しながら、本発明によ
る電子回腸1受信機の一実施例についてh号−明しよう
。この第21シ1において第1図[)tl+応する部分
には同一の符号を伺して重+i F4’!明を省略する
。Embodiment Hereinafter, one embodiment of the electronic ileum 1 receiver according to the present invention will be explained with reference to FIGS. 2 and 113. In this 21st C1, the same reference numerals are given to the corresponding parts in FIG. Omit the description.
第2図において、制御電圧発生器(80)は局部発振器
(VCO)+61と共にPLI、を構成し、局部発振器
(6)の出力信号の供給されるijJ変分局器(8d)
と、この可変分周器(8d)の出力と基準信号発伽器(
8r)の出力とが供給される位相比較器(8C)と、こ
の位相比較器(8C)の出力の供給される低域フィルタ
(8f)とから成る。この低域フィルタ(8f)の出力
電圧は抵抗器(7r)を介してVCダイオード(7d)
に供給され、発振器(6)の共複回路(力の共振周波数
を制御する。In FIG. 2, a control voltage generator (80) constitutes a PLI together with a local oscillator (VCO) +61, and an ijJ variational local unit (8d) is supplied with the output signal of the local oscillator (6).
and the output of this variable frequency divider (8d) and the reference signal generator (
8r), and a low-pass filter (8f) to which the output of this phase comparator (8C) is supplied. The output voltage of this low-pass filter (8f) is connected to the VC diode (7d) via the resistor (7r).
is supplied to the resonant circuit of the oscillator (6) (which controls the resonant frequency of the force).
尚、制御電圧発生器(80)は必ずしもPLLを構成し
なくても良い。Note that the control voltage generator (80) does not necessarily have to constitute a PLL.
(131は抵抗分圧器を示し、この抵抗分圧器a3は2
個の抵抗器(13a)及び(13b)から成り、抵抗器
(13a)の一端を制御電圧発生回路(8(1)の出力
端に接続し、抵抗器(13a)の他端を両同調回路(2
)及び(4)の抵抗器(2r)及び(4r)の接続点に
接続すると共に、抵抗器(13b)を介して接地する。(131 indicates a resistive voltage divider, and this resistive voltage divider a3 is 2
One end of the resistor (13a) is connected to the output end of the control voltage generation circuit (8(1)), and the other end of the resistor (13a) is connected to both tuned circuits. (2
) and (4) to the connection point of the resistors (2r) and (4r), and is also grounded via the resistor (13b).
本例の動作は次のとおりである。局部発振器(6)の発
摂周波数を所定範囲にわたって変化させるため、制御電
圧発生回路(80)はVl〜■2の直流電圧を発生し、
抵抗器(7r)を介してVCダイオード(7d) K供
給する。このときダイオード(7d)の容h1:は、第
3図に示すように、C1〜C2の範囲で変化する。一方
、信号系同調回路(2)及び(4)のVCダイオード(
2d)及び(4d)の制御電圧は、抵抗分圧器(131
の分圧比を17n (n ) 1 )とすれば、Vl/
n〜V2/nとなる。この分圧された制御電圧によって
ダイオード(2d)及び(4d)の容量は、8!L 3
図にりIですように03〜C4の範囲で変化する。第3
図からも明らかなように、VCダイオードは印加される
逆電圧の減少に伴ってその容量が増大し、低電圧におい
て容量の増大が顕著である。The operation of this example is as follows. In order to vary the oscillation frequency of the local oscillator (6) over a predetermined range, the control voltage generation circuit (80) generates a DC voltage of Vl to ■2,
VC diode (7d) K is supplied through a resistor (7r). At this time, the capacitance h1: of the diode (7d) changes in the range of C1 to C2, as shown in FIG. On the other hand, the VC diodes (
2d) and (4d) are controlled by a resistive voltage divider (131
If the partial pressure ratio of is 17n (n) 1), then Vl/
n to V2/n. This divided control voltage increases the capacitance of diodes (2d) and (4d) to 8! L 3
As shown in I in the figure, it changes in the range of 03 to C4. Third
As is clear from the figure, the capacitance of the VC diode increases as the applied reverse voltage decreases, and the increase in capacitance is remarkable at low voltages.
従って、本例において信号系同調回路のダイ−t −)
” (2d) 及ヒ(4d) +7) 容量pHf f
gfj、q ACs=Ca−C4の方を発掘回路のダイ
オード(7d)の容量可変範囲ΔCo = Cs−C2
よりも太き(することができ、分圧器Uの分圧比を適宜
設定することによって、単一の制御電圧発生回路を用い
て同調回路及び局部発振回路のダイオードの容量をそれ
ぞれ所要範囲にわたって変化させることができる。f7
tって同調回路及び局部発振回路は切換えを挟せずそれ
ぞれ所要の広い周波数範囲をカバーすることができる。Therefore, in this example, the die-t-) of the signal system tuning circuit
” (2d) and (4d) +7) Capacity pHf f
gfj, q ACs=Ca-C4, the capacitance variable range of the diode (7d) in the circuit ΔCo = Cs-C2
By appropriately setting the voltage division ratio of the voltage divider U, the capacitances of the diodes of the tuning circuit and the local oscillation circuit can be varied over the required range using a single control voltage generation circuit. You can. f7
The tuned circuit and local oscillation circuit can each cover a required wide frequency range without switching.
発明の効果
以上詳述のように、本発明によれば、局部発振回路のV
Cダイオードには制御重圧を直接印加すると共に、48
号系四M1回路のVCダイオードには抵抗分圧器を介し
て制fIII宙、圧を411給するようにしたので、1
F−のff1lJIlll電圧発生回路を用いる簡単な
構成で、同調回路及び局部発振回路がそれぞれ所要の広
い周波数軸1mをカバーすることができる。Effects of the Invention As detailed above, according to the present invention, the V of the local oscillation circuit
A control pressure is directly applied to the C diode, and 48
The VC diode of the No. 4 M1 circuit was supplied with a voltage of 411V via a resistor voltage divider, so 1
With a simple configuration using the F-ff11JIllll voltage generation circuit, the tuning circuit and the local oscillation circuit can each cover a required wide frequency axis of 1 m.
第1図は従来の電子同調受信機の一例を示す結線図、第
2図は本発明電子同調受信機の一実施例を示す結線図、
第3図は本発明の説明にイ(;;する司変容併ダイオー
ドの特性を示す線図である。
+21はアンテナ同fil′j 11JI P;i、(
4)は高周波同調回路、(力は発振回路、(2d) 、
(4d)及び(7d)は可変容量ダイオード、(8o
)及び(8s)は制御電圧発生回路、(1λは抵抗分圧
器である。FIG. 1 is a wiring diagram showing an example of a conventional electronic tuning receiver, and FIG. 2 is a wiring diagram showing an embodiment of the electronic tuning receiver of the present invention.
FIG. 3 is a diagram showing the characteristics of a conversion diode for explaining the present invention.
4) is a high frequency tuning circuit, (power is an oscillation circuit, (2d),
(4d) and (7d) are variable capacitance diodes, (8o
) and (8s) are control voltage generation circuits, and (1λ is a resistive voltage divider).
Claims (1)
数より中間周波数だけ高い周波数を発振する局部発振回
路とを有し、上記同調回路及び上記局部発振回路にそれ
ぞれ可変容量ダイオードを設けて成る電子同調受信機に
おいて、上記可変容量ダイオードの容量を制御する電圧
を発生する制御電圧発生手段からの制御電圧を上記発振
回路の可変容量ダイオードには直接印加すると共に、上
記同調回路の可変容量ダイオードには抵抗分圧器を介し
て供給するようにしたことを特徴とする電子同調受信(
幾。It has a tuning circuit for island frequency reception signals and a local oscillation circuit that oscillates a frequency higher than the frequency of the high frequency reception (g) by an intermediate frequency, and a variable capacitance diode is provided in each of the tuning circuit and the local oscillation circuit. In the electronically tuned receiver, a control voltage from a control voltage generating means that generates a voltage for controlling the capacitance of the variable capacitance diode is directly applied to the variable capacitance diode of the oscillation circuit, and the control voltage is directly applied to the variable capacitance diode of the tuning circuit. is an electronically tuned receiver (
How many?
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11547383A JPS607219A (en) | 1983-06-27 | 1983-06-27 | Electronic tuning receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11547383A JPS607219A (en) | 1983-06-27 | 1983-06-27 | Electronic tuning receiver |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS607219A true JPS607219A (en) | 1985-01-16 |
Family
ID=14663408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11547383A Pending JPS607219A (en) | 1983-06-27 | 1983-06-27 | Electronic tuning receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS607219A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6341941U (en) * | 1986-09-04 | 1988-03-19 | ||
EP0519562A2 (en) * | 1991-06-21 | 1992-12-23 | Koninklijke Philips Electronics N.V. | Phase-locked loop receiver |
JPH0795673B2 (en) * | 1985-06-25 | 1995-10-11 | プレッシー セミコンダクターズ リミテッド | Frequency divider |
JP2004120759A (en) * | 2002-09-27 | 2004-04-15 | Thomson Licensing Sa | Electronic matching system for television signal tuner |
-
1983
- 1983-06-27 JP JP11547383A patent/JPS607219A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0795673B2 (en) * | 1985-06-25 | 1995-10-11 | プレッシー セミコンダクターズ リミテッド | Frequency divider |
JPS6341941U (en) * | 1986-09-04 | 1988-03-19 | ||
EP0519562A2 (en) * | 1991-06-21 | 1992-12-23 | Koninklijke Philips Electronics N.V. | Phase-locked loop receiver |
JP2004120759A (en) * | 2002-09-27 | 2004-04-15 | Thomson Licensing Sa | Electronic matching system for television signal tuner |
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