JPS6069994A - Recording and reproducing system of video format signal - Google Patents

Abstract

PURPOSE:To reduce the capacity of a buffer memory of a reproducing system and the recording capacity of a digital data by selecting properly a sampling frequency in response to the content of recorded information. CONSTITUTION:In grouping the digital data of prescribed information such as sound information and inserting the result to a video format signal, the sampling frequency is selected properly depending on the content of the said information and recorded while being converted into the digital data. The data is reproduced at reproduction with a frequency equal to the sampling frequency at recording. Thus, the sampling frequency information is also inserted in advance at recording. Thus, the recording capacity of the digital data and the capacity of the buffer memory of the reproducing system are decreased in this way.

Description

[Detailed description of the invention]

The present invention relates to the recording beef IJ method that has been passed down from video formats 1 to 1, and particularly relates to the method for recording image information and audio information onto a recording medium as a video format signal. . Audio information corresponding to the image information and image information 11, (when recording on J recording medium, video A) signal 1 to A-Matsu 1
There is a method of inserting audio information into one part of the time axis and image information into another part. In this case, the audio analog signal is digitized and recorded as digital data. However, this (non-bringing frequency is always fixed at a constant IJ.
The content of the voice information includes explanations by men, explanations by women, GJ, Tomaku, etc. Therefore, the ring ring frequency is more likely to be heard than a man's voice, f1's voice, or a woman's voice. Nano 1 of 7: i J, Rimo's music demands higher quality. -((7) Therefore, the sampling frequency is determined by the maximum frequency of the audio information. There is an inversely proportional relationship between the 4-noise ringing frequency and the recording capacity, so naturally the higher the sampling frequency, the more the audio information The recording capacity will be reduced.Also, the playback side

[P
The low-pass filter node in the digital-to-analog converter
The Jt Δf frequency also needs to be set high. Therefore, the present invention is adapted to the information content such as recorded audio information.
The sampling frequency is selected and recorded, and when playing back
The playback process will be performed according to this sampling frequency.
A video file designed to increase the capacity of recorded information by
A-Pine [・Purpose is to provide a signal recording and reproducing method
It is said that Video format 1 according to the present invention - signal recording method is as follows:
Digitized predetermined information such as audio information
Data is divided into blocks and video formatted.
When inserting into one signal, change the sampling frequency to the relevant information.
Select as appropriate depending on the content of the information and convert it to digital data.
When playing back, please note that when recording,
Reproduction processing with a frequency equal to the ring frequency
For that purpose, set the rimbling frequency 1 to the recording ++y in advance.
15 report is also inserted and it is characterized by J5<C. The present invention will be described in detail below with reference to the drawings. Figure 1 is a detailed explanation of the present invention, including a principle diagram c', which is recorded.
1 noise field equivalent signal of video format 1 ~ signal of time
Number of horizontal scanning lines (corresponding to the effective screen) '4a. b, c, and Q.
1, especially a, b, c are 4f from the integer horizontal scanning line.
In addition, the number of horizontal scanning lines of C (J to a predetermined integer
m = c, 'x (m is
Integer) is the relationship =C. Therefore, C and c are small unit
Place T: consists of x glue f' up to c + = cx
divided into f l-1 ivy. Furthermore, 0) is an integer.
La 4r. Figure 2 is a part of the same def A-mat signal shown in Figure 1.
The figure (Δ〉 is f lock (]).
There is a waveform C' of an example of data recorded. y53 diagram is N'1-
8C signal [A, B, C, (1) division
This is a diagram showing specific numerical values for an example of 1 field scanning.
Of the 262.5 lines, there are 241.5 effective scanning lines,
Furthermore, can blocks a and b be displayed on both sides of the TV monitor? ff range
It is set to be outside the range. In this example, a =
1, b = 4, O = 234, X =
9, m = 26, and Q = 2.5. Here, if digital data is inserted into b and c and lζ,
Even if errors are concentrated in Trotubular 1~ etc., errors occur continuously.
interleaving and error detection and correction to prevent errors from occurring.
If J is correct, error correction code is added (=J is added,
In this example, b is an independent increment and error correction block.
It is designed to be complete. Similarly, in C
Even if 01 to 0x are independently increment A
9 error correction has been completed and reversed. Figure 4 shows digital data inserted on one horizontal scanning line.
This is an example in which the data transfer rate is 408 f+-+
(: ft+ is the horizontal scanning frequency C), and the digital
A clock line signal, which is a clock synchronization signal, is placed before the data.
A signal of 1Φ is input to C. Also, following this signal,
-f data synchronization signal number pin 1 to synchronize data
1, this data synchronization signal is followed by data
Words and error detection 3I Masakawa codes are inserted. Figure 5 shows various recording modes.
A) inserts only the image in C and Q block
a, 1) The block is out of visible range (・)
The display will be similar to the review image. ([3) is in C block
All digital data is inserted, and (C) is
Block 1-1 C for 9 minutes y'l ff lock
C, , I: , , i” in C8, c9
People want to insert data and images from 03 to c7. (D
) LeL rib Ill Tsuku c , , c 2 ni no
″rSital data, 03 =Cg L image I:ii
Hitori, /,: Ill (Yes, (``) is 4 knobs
IN Tsuk C1-=C71 Dir this image to cB, ag.
There is =C of 0 who made a big deal with Digital-F-Yu. In Figure 6, 11'' initial data is input to block C.
The inserted frame (field) is inter-iMI A ()
Continuous. This is a number claim-number frame.
, depending on the amount of data required. Also the period that follows
In interval B, images are inserted into all C blocks. child
Usually, images corresponding to the data in period △ are inserted here.
Whether it is a still image, a frame-by-frame image, or a video
But it's okay. In addition, even in still images, the image taro between adjacent frames
Record multiple frames of the same image in order to prevent flashing.
There may be cases where Figure 7 shows the sub-blocks C1 and C of the C block.
Insert digital data into 9 and images into 02 to C8.
The result continues for a period A of several frames - number + frames.
Then, in the subsequent period B, only the image is inserted into block C.
This is an example of what was done. In this case, during period A, part of the screen becomes distorted and the image is interrupted.
It never breaks. FIG. 8 shows video formats 1 to 1 according to the recording method of the present invention.
This is a block diagram of the recording system for obtaining signals.
The log audio signal is digitized by the A/D converter 80.
Becomes tarred. This digital signal has a sampling frequency
The number fl(R) is 15 ・)' (backup for time axis compression
μ) into the file memory 81. Reading from this memory 81 is I+(1'<)J,
J is carried out with a high frequency of 12 (W).
, time axis compression is performed. Control information! Koru 21 Trouble
The run-in signal, data
In addition to the synchronization signal, the capacity and appropriateness of the information content of each block is
It includes various processing information, etc. that will be performed when the information is reproduced. bidet
71 signal is time axis compressed by Barahun Meshiri ε)1.
All data signals including voice data and control
The control information is input to the switching circuit 82, respectively. Control of the selection operation of the switching circuit 82 is controlled by timing.
8 generators ε33 and J: are now performed.
3. The input/output readout control of Meshiri 81 is also performed at this timing.
The timing signal
The signal generator 83) generates the same signal of the input same deA signal.
The internal oscillator is now synchronized, and from the first part of the evening
Various timing signals are generated depending on the control signals of
Ru. From the output of the switching circuit 82 to the record 1 video A
A format A-mat signal will be obtained. Figure 9 shows a typical m-generation device for static signals with audio information.
FIG. 2 is a schematic block diagram. The playback video format 1 signal is
Synchronous signals and digital data are separated by signal separator 1.
audio data and control data among the digital data.
The roll data is further updated. By FjJ period signal
Timing signal generator 2 generates write pulse f2 (W)
, Hti output pulse 11 (R) and other timing signals.
It occurs. Error detection and correction of controller 1~roll data
Error correction is done by JU unit 4, Con I Herol code deco
The data is decoded in the reader 6 and sent to the system V generator 7.
It will be done. In addition, digital data can be memorized via error iJ correct device 3.
A pulse of J2 (W) is written to the memory 5, and f+
(R) is read out and time axis expansion is performed. d3, digital data error correction is time axis expansion processing
You can configure it like this later. This time-axis expanded digital data is
The analog converter 9 converts Ab[1] into playback A-D
The signal roars. ] The code is sent to the code decoder 6 according to each control command decoded.
Various types of 2I control (No. n is inverted) - 11 control occurs.
A roll signal is generated from the device 7 and sent to a predetermined one of them.
The reproduced video signal is passed through the double-sided processor 8 operated by
derived. 41, j Isital data insertion block
To deal with this, for example, process the image by increasing the black level.
There is an output resource. Also play A7 controller 10-4;l:V))
Controls the playback operation of P (HI'A disc player).
ri-1-1~roll signal is now derived-) (J
3, Vl) Stop P, PI-△Y, etc. to 11 I■
I-le is 'vr'J,, as mentioned in Fig.
The first block a in the field has a beam [-1 ivy sync
, the node synchronization is set to 41, and the run-in signal is set to 41.
Data Domei 1. Several sets of silk-separated data are horizontal.
This is inserted into ff1IFAll- for this signal.
Yo (Each Noirt 5 + LHirl smell C eye and
Data 1 note 11! II is k 1'/δ
become. This part of block a) is called f-old sink.
However, the 5th detail of this 11-1 configuration is shown in Figure 10.
There is. The data transmission -l~ is 40Bf bit+, and 1-1 series
There is no digital data at the 671 pit from the falling edge of the link.
Not inserted. The field sink data column is 3.
20 pits] are used. 10 more 320 bits
Divide into 32 units] and make one set for each unit.
Configures clock synchronization and data synchronization signals. 32
Among the bits, 24 bits [.] is the clock run-in signal.
, 1010... 1 degree continuous signal is 12 cycles
This is followed by the data of 111000100.
An 8-bit data synchronization signal is inserted. These 2
/4 bits and 8 bits I ~ data in 132 bits
10 sets of data are inserted consecutively. In addition, the front bow
This means that the equivalent of 24 bits is taken.
. In this example, this signal string is inserted at the 22nd H with a=1.
ing. Block i) is inserted into block C.
Various controls No. 18 have been inserted into the content of the information.
. When inserting digital data into blocks b and C
In this case, the effective data range is field synchronized as shown in Figure 11.
Kudo ■ 1-1 consists of 320 hits 1~, H sink
The first paralysis of the data row is 64 bits, and the front
Figure 10 shows that bove is equivalent to 24 times 1.
It is exactly the same as your field sync. Also, 320 pi
1~Medium, 24 pitches at the beginning of the data row, 12 leads
Kurunori 11 Crunin signal continues -c8 p1~
j゛-All synchronization signals follow-C. 288 bits remaining
3 (3 minutes i', 11, 8 piz 1~ (1 by 1~) single
There are 11 people in the 11th place.
In the case of the present invention, 11 is assigned. ? I'
<'Niwamo, each 1-1 on 23.2/1.25.26
(211 Shinkyu are recorded.Also, 1-1 Tsutsu
Information in units of 8ji 1 to (1 high 1-) in tab b
Is the information interleaved? ] May the end come to an end
It has become. Next, put the digital data in the ivy C of block 1-1.
If you want to record the data, 2 (11)
Field CI 69〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〕〔〕 Up to 18 blocks in one frame (digital
It is possible to record full-scale digital data, full-scale images,
Combinations 11 of digital data and images are possible. Digital data within a block is
C
There is. Next, Figure 12 shows a block diagram of a concrete example of the reproduction system.
. In the case of the present invention, digital data is compressed in time axis.
When adding audio to a static image [L image]
This will be explained as a device. This device amplifies the video signal
video amplifier 11, V sync from video signal, 1]
TV sync separator to separate the sync12. amplified bidet
From the O signal to the threshold level of the data
automatically sets the optimum value according to the analog video signal.
NRZ (NON RETURN TOZERO)
ΔIC circuit 13 for converting into a digital data string, digital
Detects the clock run-in signal from the RU data string
N-IN detector 1/I clocks digital data stream
, detects the 8-bit data synchronization signal, and reads each bit.
Every 1, the start position of the data in c is detected and overturned. similarly
Read the data with the clock and send the data string to 8 pins 1 in parallel.
S/P converter 2/l, 23 in the field
・To・261-1 is detected and the control data (
Switching circuit 16 that separates M and switches the output, and 1
91-1 from the data string based on the N-IN signal.
A clock extractor 17 for extracting clock components;
A PLL is applied to the lock and the lock is required for system IX operation.
``179 shots 9-18,
The stem clock generator generates a 1!7 signal.
141I was obtained from the TV sync separator 12 based on
V, l-1 sync signal and data detection detector 12c obtained
J, C is controlled by the detection number 1n of the beginning of the data,
Timing signal generation that generates various timing signals
2, this timing signal valve/l-device J, receives the control (
Nofld sync detected and 1-1 Tuta run-in signal
, at the beginning of each field with a pattern of data period Jul
, clock synchronization, ′)--to ensure total synchronization) γ-
19. separated from the switching circuit 16
l[:amplifier-[TI-le:1-mode memory]
Control data i720, -=+nt[1-
read from the code buffer
- an error corrector 4 that performs error correction processing;
The well-organized control code is used as a sequence of controls.
Ink-liver 21. series of con
1~Decode the roll code and generate various control signals
System controller 7. Larger memory capacity than system controller
When writing to or reading from 5, the initial address signal is
timing when reading data in 8-bit units.
The clock pulse is obtained from the signal generator 2 and the clock pulse is activated.
performs step processing and supplies address signals to buffer memory 5.
Zuru address counter 21. Digital in block C
The data is sent to the f2 (W) signal from the timing signal generator 2.
The digital data is temporarily stored in the It (R) signal.
Large capacity buffer memory 5, large capacity buffer
Error corrector 3. Corrects errors in block units.
Converts the corrected data into a continuous data string.
Interleaver 23. series of digital data
11 (R) obtained from the timing signal generator 2.
A digital analog converter that performs timing-based processing and analog conversion.
Analog converter 9, system 81, sacred treasure 7J, VDP
Receive control signals for VDP: 1 to 1-1
- a controller 10 for supplying the signal to the VDP;
It is composed of. In such a configuration, for example, a pattern as shown in FIG.
Record with a bow and play a def A-pine 1-i 3 bow.
In the case, to the period V l) P is the base rli 41Φ
Made 71 works. During this time, the data inserted in block C
The digital data is sequentially stored in the memory 5. . In the next period B, still images or frame-by-frame playback V l) P
shall be carried out. At this time, the information stored in the memory 5 is lζ
Digital data is output, but this γ-t is the time axis.
If it is compressed audio digital data, the time axis will be expanded.
When playing the still image or frame-by-frame with analog audio
However, in period A, the TV monitor
In Fig. 9, the black level is
When flanged to the wall, it is made to appear. Bidet A-mat with the pattern shown in Figure 7
In the signal reproduction, the data in the program C is also used for the period.
Digital data is stored in memory sequentially. Monitor during this time
The upper and lower parts of the data screen are similarly processed to have a black level.
, the image appears in the middle part. More specifically, the playback video from the video output end of the VDP
Format 1 - signal is input to video amplifier 11 and amplified
be done. This amplified output is applied to the synchronous separator 12 and
Each separated 1111 signal (V, 1-4) is the timing
It is fed to one input of the signal generator 2. Also, the amplified video signal is input to the ATC circuit 13.
applied. In this ATC circuit, data peaks and
Detects petestal level and sequentially follows each data.
Next automatically set the Threshcobo belt level and video
Extract the NRZ digital data string from the signal. take
RUN-1, N signal detection from the output digital data string
The output device 14 receives the timing control from the timing signal generator 2.
24-bit 12-cycle clock under control signal
Detects run-in signal. The output of the detector 14 is the clock
Based on the run-in signal (from the normal -i''- data row)
At the input of the clock extraction circuit 17 that extracts the lock component.
applied. The extracted clock component is the system clock
is applied to the clock generator 18. This system
A system synchronized with the data string using P L 1 circuit from the data component.
The system for operating the system 1-1 light 4L
Let's go. System 913fu 9 iL device 1ε3'c 1
- the output clock signal is applied to the timing signal generator 2;
It will be done. Timing signal generator 2 generates the
1 while being controlled by the reference synchronization signal (V, 1-1)
Detect kl 22 II R in the field and
One of the ways to detect field sync
Generates a timing signal to be applied to the control terminal of the detector 19
Zuru. Also detected 23~2611 and 21n1~〇-Lua'
-One minute of evening! Generates timing control signal for l-j
are doing. Also, 27 +-1 is detected and 271: subsequent data
Control signals for reading and writing data are also generated. The series output from the ΔTC circuit 13 is
It is also applied to the data synchronization detector 15, S/]) converter 24.
Ru. These read the data in synchronization with the tarokku and
The data synchronization detector 15 receives a data synchronization signal in each 11.
Detects the signal and applies it to the timing signal generator 2 to generate data.
The start position of the data is determined and the synchronization relationship between the data and the timing signal is determined.
Keep the staff constant. Additionally, the S/P converter 24 converts serial data into 8-bit units.
Convert to parallel data. 8 Pitsu 1~ data is cut
It is applied to the switching circuit 16. In the switching circuit, the timing
23 to 261” from signal generator 2.
If there is a control code rose? At 20 again,
In other cases, the voltage is applied to the large capacity buffer memory 5.
It works like that. The commands temporarily stored in controller 1 to roll code buffer 20
1 - Roll code is applied to input node j of error correction circuit 4.
It will be done. Control code whose errors are corrected by the error correction circuit.
The code is applied to the input of the deinterleaver 21. f
In the interleaver, control 1 to roll codes are arranged in control order.
The voltage is then applied to the system controller 7. system controller
Now, decode the controller 1~roll code and set the timing f
n What generation type 21) 1 to the generated timing control signal
Digital data writing, screen control, large capacity
Initial setting of buffer memory address counter 22,
゛Capacity and management of internal data (1 play)
Control-related signals such as operation and stop of the player are controlled by the player.
is applied to the player 10, and in this player controller the player 17
is converted into a signal for dry eye 1 and supplied to play 17.
ing. Next, apply to the timing signal generator 2 22 +-
1 is applied to the control terminal of the field sink detector 19.
Ru. In the detector, 1 out of 9 run-in signals and data synchronization signals are used.
A clock that is placed in the field from a repeating signal.
Avoid generating clock signals and data synchronization references.
to the extraction circuit 17 and the timing signal generator 2)
It's cool. Next, from the timing signal generator 27
11 detected signal and control”-de is-T]-
Digital data is recorded in one block.
] - 3 people are solved by the system controller 7
and according to the control f1) generated from the system controller.
The fz (W) signal generated from the timing signal generator 2
The human body (a) is temporarily stored in the buffer memory 5.
It goes down. Once a certain amount of data has been stored, the system
From stem controller 7, play V stops at the specified frame.
The player will issue a command to play back images, and the player will play back still images.
I'll take it. From large capacity buffer memory 5, the system
The address counter receives the read start address from the controller 7.
22 and generated by timing signal generator 2.
The data are sequentially read out by the f+ (R) signal. Large capacity
The data sequentially read from the memory 5 is input to the correction circuit 3.
The error is corrected by the correction circuit 3, and the de-input
It is applied to the input of the taker lever 23. di interli
In the server, the D/A converter 9's data array is replaced with the original data array.
applied to the input. The D/A converter accepts analog audio signals.
Convert it to a number and output it as audio. Audio is being output
The intermediary player plays still images. Large capacity buffer
When the specified amount of data is output from memory 5, the
Control signals for search or play, etc. according to the program code
will be $ to supply to play ＼7. Here, the RUN-IN signal detector 14 and the
Depending on the output device 15 and the field sink detector 11)
This section explains how to perform block synchronization and data synchronization. Each fi
field, 22 + - 1 field sinks
10 clock run-in signals and
When the data synchronization signal is J, first the tarokk +lIJ and the data
Restart data synchronization for 1 time. S4I' Warari [1 Tsuku
Clock extraction circuit for R1's component included in run-in
Extract with 17 and then extract from 11-17
TS L Avoid synchronizing the L circuit. Also, data synchronization signal
Detects the beginning f37 position of the data and uses it as a timing signal.
generator 2 to synchronize this circuit with the output. centre
Field sync 11 - non-in signal and data same
There are 10 period signals, 1, and 1.
Even if a part of the signal is missing due to buffer 1~ etc., this filter
C'IIT actually clock synchronization and data within the field sink
In order to synchronize 4r (Yes, once in field sync
After the synchronization is confirmed, each 1-1 with data
RUN-IN signal detector and data respectively at the beginning of
Clock run-in and data detected by the Ill detector
Corrects clock phase shifts and bit shifts using synchronization signals.
while maintaining clock synchronization and data synchronization. Also, this
Clock run-in and data synchronization signal at the beginning of each 1-1 of
For dropouts etc., you can re-sync, data
It plays the role of resynchronizing when the period is out of order. FIG. 13 is a diagram showing a specific example of the data synchronization detector 15.
Then, the pattern filter 151 receives the data synchronization signal from J5.
Pattern 1100100 is detected and detection pulse is output
be done. This detection pulse detects noise and false f-even synchronization signals.
There is a possibility that it is detected, so Nandogoo 1 to 15
2 to generate a gate signal (DSG signal) at a predetermined timing.
controls the input state of the detection pulse to the subsequent circuit.
This detection pulse is sent to latch circuit 1;
: It is reloaded and connected to other racks via Noah Gate '154.
It is held in the circuit 155. And the next 7 Bitsuregi
The MSB of the star and the detection pulse at that time, etc.
~154, a J3-C match mismatch state is detected. one
When a synchronization pulse is detected, a synchronization pulse is output, but the 10th
The 221-1 shown in the figure has 10 sets of data synchronization signals.
After detection, a synchronization pulse is output, as shown in Fig. 11.
Data synchronization signal of 4.1111 after 2ζ311 shown
Outputs a sync pulse immediately after detecting J, uni sync
Pulse output timing is different. Therefore, the same +111
Pulsed light (1 timing 4 nonondogame 1~1557
to the Goo 1-signal (LDG signal) at a predetermined timing.
control and share the circuit after 2211.
ing. Note that the unl' gate 158 is the shift register 1.
It is the original of 56's first 1y1 clear A7. . Here, in ``B]'' C, select the image ``j'' (screen).
It is necessary to distinguish between the digital data and the 5-screen data.
Control the display of the next block at the start of the image and the end of the image.
~ Roll data will be sent in 5, 1/11th 1st
An example is shown, where S1Δ1<T
4 bits are used as BLOCK. Also, that
Possible values are 1 to A (hexadecimal). E N D B L OC the next block at the end of the image
J3 uses 4 bits as K, the possible values are 2 to A.
(hexadecimal). Note that this possible value is
Various changes can be made depending on the value of X obtained by dividing C into even smaller blocks.
become In this example, when x=9, the table is 83 digits.
-1 (described at the end of the detailed description of the invention) shows the various types shown in Figure 5.
Signal to video format 1 5TART +3LOC
K, END BLOCK and U correspond to each code.
It shows. Figure 15 shows the insertion position of this image information using the J code.
-C is a block diagram of a playback system that controls the playback operation;
The back 1 of the synchronization signal separated by N1 in signal separator 1 in Figure 9.
Detecting the sink's 261-1 eye, both in the field
25 binary counter 25 and 16 of this counter
Outputs the pulse output on the count side as the clock input.
The force Q becomes 1, and the output horn Q becomes O with V sink.
Noritsubu flop (FF) 26 was also accepted. child
``The Q output of 26 is AND gate 270 human power 1.1 contact
It is continued. The other input to goo 1 is 11 sink's
Denni is connected. Goo 1-27 output ill 1
-1-2 (AND logic of i's output point Q and 1-1 sink
t) is output. '7#, that is 27 m
l] and 11 syncs of toys will be output. child
No. 27 [11 syncs after l are manually clocked, V
There is a J sink 28,
This is done by pulling rib block C1 in No. 11 block C.
This is a counter that detects m of . In the case of tree lTl11 (YoR1.26, 2G base
There are 41 on the counter. The 1-11 signal of the hexadecimal counter is CJJ-1-1.
1s4-does, 10iffl filter cleared by V sink
There is counter 29. This power/sink is
Glue f block and Q from 1 to 1 b O) 'r
be. In FIG. 9, the control [1-behind the output from the le decoder 6,
Star Dobu I'l Tsuku J-Doshin J's 4th 1~. - Poetically stored in one device - 4 pins 1 to 130 and 1i
□it IN end block” - 4 pins of the de signal
The 4th pin that stores - in a 111f manner;
Then, the output signal of 4-jitsu 1-latch 30 is used as one input.
, and 4-bit outputs indicating each status of the decimal J counter 29.
Use the force signals Q1 to Q4 as the other input and compare the bits of each.
A match that outputs a pulse when all of the pulses are equal.
Similarly, the output of the 4-bit latch 31 is connected to one of the circuits 32 and 32.
Enter no j doji, the other 4 pits 1 ~ person horns as a decimal counter
Pulse if all pitches are equal to 1 to Q4 of 29
There is a coincidence circuit 33 that outputs . Also, the pulse signal output from the coincidence circuit 32 is clocked.
When this pulse is input, the Q output is
1'', and the output of the matching circuit 33 is used as one input, and the other
One input is the V sync signal, and either signal is present.
At the output of the OR gate 34, a signal is output in each case.
Output J becomes rOJ [F35 and this Q output is "1"
When connected to the a side, the Q If force of F35 is rOJ
When the switch 36 and screen connected to the 1j side are
There is a masking circuit 37 that selectively blacks out the screen.
In the switch 36, when connected to the a side, the input
Outputs the bidet sub signal, and when connected to the b side, the
The output of the king circuit 37 is configured as follows.
There is. Furthermore, the other output 0 of F F 35 is )'
It is connected to 38 to 1 and is a good luck to large hanging bagno 7 and meshiri 5.
The application of the integrated pulse f2 (W) is controlled. In such a configuration, there is only one link between the image and the digital signal.
The video format A-mat signal is printed on the input of signal separator '1.
is applied to the a side terminal of the switch 36.
ing. Of the signals separated by signal separator 1,
is applied to the CLR terminal of the 252 binary counter 25.
Both are FF 26's CL R terminal, m 3fC counter
Data 28 (1) CI-, ROWa child, (X+1) decimal
CL R terminal of counter 29 and Ajl goo 1-34
C applied to one input terminal J, 1, V sink 25
Binary counter 25. FF26. mifE counter 28
．． (X+1) base counter 29 and ]-135 are then
The state is changed to Sera 1. Next, Minute 11 from the Jin-kun separator!
11 +-1 sync is 252/J counter 25 clock
When the voltage is applied to the lock terminal c1 (Antoge 1
~27 is applied to one input terminal. 25 Binary counter 25 inputs J to N-r-s c signal.
3 is a counter to cover the management within each field.
Ru. In each field, this counter is
Chi J2 clear is canceled and Ic I j is 111
” to [Counts up every time 1 sync pulse is applied.
Make a taping motion. Also, after counting 1 sync 16 times, the pulse
It generates a problem. This pulse is in the N1-5CTV signal.
This corresponds to 261-1 of each field in [). This pal
is applied to the clock terminal ck of F[26. "
In F26, when a pulse is applied to ckt' 4 children, Q output
A logic output "1" is output from the logic output "1". FF26 is a flag
After 26H, the V sink is the CL R terminal.
The Q output is a logic ``1'' until the Q output is applied to the Q output. F
The Q output of F26 is printed on one side of the AND gate 27.
has been added. The other input terminal is separated from signal separator 1.
The applied H sink is applied. Therefore, and
1” sink after 27H is output from 27)
It turns out. This is the back block of screen v1 in Figure 1.
1-1 sync from C to m-adic counter 28 ['' end
It will be applied to the child Ck. . Here, the m-adic counter is the block number sheet f[-1
In this example, 1 is a power/sink for managing data.
It is m-26. m progress counter 1-to (output is ×
- is applied to the binary counter 1] and the output clock.
ing. ×1 - Decimal counter 2 s] t, , t, 1f
1, which manages the position of sub-blocks in Tsuku C.
It's unta. This) J sink is the area of C (in j
Instead, count C' until Q's area 1 or V sink comes.
So, what happens in ×1,100 base? Example C [Yo × is 9
The decimal counter roars. Indicates status to tree count 1
The output of the 4 pins I~ of Q1 to Q6 is the output of the matching circuit 32.33.
one input) respectively.
1J, the back image of the separated 1L control data
The code of the S/L block that indicates one W is latch 3.
rl is added to the input of 0 and is temporarily stored. Period to be remembered
is for one field or one frame. The output is applied to the input terminal of the matching circuit 32 (other parts). In this -1~ circuit, each pin 1~ is compared and 4 pins 1~ are
Isoshirire (3 guns, the pulse is now on the output of the generator)
There is. Similarly, the control separated from signal separator 1
The code indicates the block number next to the end of the image.
The code of the deblock is applied to the input of latch 31 and the output
] is applied to the other input of the matching circuit 33, and
If all 4 bits match, a pulse will be generated.
It's becoming a sea urchin. The 1Ji force of the coincidence circuit 32 is F[35
Applied to the tarok terminal. Also, the output of the matching circuit 33
is applied to the input of the OR gate 34. Oagu 1
is applied to the clear terminal CLR of FF35. [
35 is when the coincidence pulse of the coincidence detection circuit 32 is applied.
, the output Q becomes "1", and the coincidence pulse of the -number output circuit 33
When the voltage is applied, the output Q becomes "○". Furthermore, the Q output is
This is the complete opposite of the Q-out horn. “F35’s Q 1ff)j is
A'3 is applied to the switch 36, FF3! Uno Q out
When the force is logic "1", it is on the a side, and when the logic is rOJ, it is on the 1) side.
This is a switch set to Also, the 0 output of FF35 is one input terminal of AND gate 38.
being applied to the child. The other side of Antogame 1 is Taimin
signal generator 2 (see Figure 9) l)) 1 control signal generator C
N1 intrusion Noculus fz (W
> is applied. Sub-)'C, non'l' gate 3
8 is Il'+, f'! where the Q output of FF35 is "0".
Write the input pulse fz (W) to the human body ＼・7-/I-mail
1 and 5, and is separated by signal separator 1.
The data will be stored sequentially. For example, in the case of the waveform shown in Figure 5(C), stars 1 to f
The chord for Tsuku is 3, which is Endob [-Tonk's -+ -1:
LSI. 8. Howl. At this time, lap 30, 311.1, t3.8
is set. , first F ``35σ) Q ft'
+ horn (, Lr0J, so switch 3G (mab
111111 (this is here) (because there is one, the video output is mass
King circuit 37σ) ili force is derived. maskin
The circuit is the same +11I, except for Nonoraburst.
A circuit that masks the video signal part in black (1) and 2 (2).
Arunogu, at this time 1itii ir+i L, L!
! , (, becomes -. Also, the ○ output of FF35 is logic r 1
J (ik3i), so Andgoo 1 to 38 are J in
, Mar, (W) pulses are output and buffer 7 and 7 are set to 5.
(Fi f'3 minil!Il data separated by device 1
The data will be used one after another. Next, when the ×+1 digit counter 29 becomes 3, the coincidence constant 1 path 32
generates a pulse, so the rise of the /</<// response of the mouth
The Q output of t' F 35 is set to "1". Therefore, the
Switch 364 a 1llllI, input flyer '7
7, FF35 where one signal or image will be output
Since the d output of is "O", Goo 1-38 h) et al. [
The pulse is generated! TS”, therefore, barafutsume: TJ
:I) Do not make a lucky move in 5. Similarly x −+−
When the 1t jjC counter becomes 8, from the matching circuit 33)\
FF35 through Lusu lfi q3shi Oagoo 1-35
This F will be applied to the CI RO high
The Q lj horn of F becomes ○J, and switch 36 is on the b side.
, and the masking circuit 37 will output again.
. In other words, a black screen will be output. Also F “3
The Φ output of 5 becomes 1j, and the output of Andgoo 1 to 38 becomes
f2 (W) generated from the timing signal generator again
Due to the large capacity buffer upstream 5, the signal separation is performed by a minute a.
The updated data will be stored sequentially.
. The timing of the above operation is shown in Figure 16 [I+].
In the Xri16 diagram, the first node of one frame of NTSC is
2) r -jllll
・The same applies to the bidet [No. 1C]. In addition, 1.
Examples include identification of images and digital data, and identification of digital data.
Detect the block data position 1 = the block where the image starts.
and the next pro tsk'd at the end of the image," 1j-s
・1. -Did you insert the evening into the control I-roll data?
Starting block of initial data, initial data
) may be the next block at the end, or
CL)jllll(
, 1-. Audio digital data that should be inserted (S W S J”
- Evening) is limited to monaural JgA, and if Aσ)
＼゛) Various explanations by humans, blind music, etc. 1j/j~Tsum
6.1.
Figure 17 shows this J: sea urchin sound F;, knee, --9 are various.
σ) Self-propelled, type G31, sound quality etc.
[DeA) A-Matt Shin + J's regenerated head Ichinoro Tsuku
Figure (・Yes, it is input to the synchronous meeting 1lIII device 12,
) 1 sink is separated and the data synchronized to these sinks
To the timing signal generator 2 to generate the timing signal
Supplied. On the other hand, the input video file A-Matsui~ signal is A
It is also input to the TC circuit 13, and J: Replay 1 is input to this circuit.
Due to variations in video signals between
To prevent data reading errors due to irregularities,
The peak level of lζ data inserted into the video signal is
The optimal threshold level is automatically set depending on the target level.
The data on the analog video signal is waveform shaped.
It becomes a digital NRZ signal. to digital signal
The resulting data is sent to the clock run-in separator 14,
9 clock run-in signals are extracted and the system clock is generated.
A system with the same phase as the clock run-in signal is input to the generator 18.
Generates a system clock. After separating the clock run-in, the digital data is
P converter 24 converts serial data to 8 pins 1 to parallel
is converted into data by the signal from timing signal generator 2.
Ru. 8-bit parallel data to clock controller 1~low
The timing generator 2 outputs the timing signal from the timing generator 2 using the data separator 39.
Ngucon1~Role data is separated and its control
Limbling (described later) in the model data: ``-1~ is linbling.
Pulling middle code discriminator 40 t' timing signal generation
It is determined and held by the latch signal from the device 2. Zambu
Control data other than the ring code is a timing signal.
Concave 1 ~ "J-Luni 1-" with the timing from No. generator 2
The data is stored in the file buffer 20. 1 point, 1-le j゛-
Sounds other than the tone data that passed through the data separator 39
Voice data is stored in the large-capacity Pfuchnoff memory 5.
, whose address is specified by the address counter 22.
It will be done. The f2 (W) signal is the address counter.
The system control is connected to the ``counter glue 1'' input terminal.
Control 77) After the first address from 11 is specified, the next address
Address 14f2 (W) F j' Dress counter is counter
The iJS is loaded one after another. Here J2 (
W) is a transmission line 1~ with axis 1t reduction 11·r between h. Next, read from the large buffer memory - reflock f
+ (R) is the output of the leanbring code discriminator 40
Therefore, there are
/ Also applied to A converter 9 to command the start of D/A conversion
Zuru. The starting address when reading is the same as when reading and writing.
Jζ is specified in the system controller 7, and the address
The count up of the counter 22 is performed by f+ (R).
be exposed. The rimbling code is represented by 2 pins 1~
Although it is latched by the code discriminator 40,
[ltsuk generator 41 receives the information from 2 bits 1~ and generates 4 kinds of
However, this system
Three types of 32Kl-1z, '6/lK1-1z
, avoid +-12 limp ring ivy on 96
I'll take what I have. With these three types of zumbling frequencies
1] Avoid operating the /A converter 9. The audio data is
With Kubuchib delta modulation (ΔD M,)
Digitalized Shinodoji, D/Δ converter is A
Convert DM audio data to analog audio signal
. In addition, a sampling of 2 pics 1~'-to is also decorated.
Connect the mode switch 42°C switching circuit 43 and selection circuit 44 to 1.
〜Roll and filters 45 to 4 corresponding to each ``-do''
7 passed u1 ringing clock 32 Kl]
z Nodoki is a 2.5KHz band filter 45.64K)
-lz's tosa- is obi 1ffl 5 K N 7 fill
+-17 to +/l 6.96 is band 7 (3K l
-I Select filter 47 of Z and select C. Also, Ri 1-1
Each decoded one-word stored in the sheet buffer 20 is
The stem controller 7 performs control according to each code,
Control related to the play 17 (by the Hubray 17 controller 10)
- (Stop [1-9 re/, I") Perform control such as forwarding.
Let's go. Next, we will explain the operation of de A sono 1 to ζ' shown in Fig. 18.
Ru. The SWS data added to still image 1 is SWS data.
1. SWS data 2. SW S F with 2 still images and 1 sentence
'-Evening is SWS data 3,5WSl/'-Evening is 4° still image
Against 3, S W S Cheetah/J< S W S
7”-ta<l. SWS data is 6. Also, control [l-ta in 2
Sampling of Pitsu 1 ~ J-do is shown in Table 2 (Details of invention
(at the end of the description). 1 control
data is one of the frames of data controlled by it
What is recorded in the previous frame, VDP
is in playback mode, the frame before SWS data 1 is played back
The limp ring code is 64 in the controller 1~roll data.
1 to 17 is detected by the discriminator 40 and the SWS data is
1. Store SWS data 2 in human capacity buffer Ameshiri 5.
, still image 1 and SWS data 1. SWS data 2 64K
Playback at a sampling frequency of l-IZ. then quiet
At the time of still image 1, SWS data 3. SWS data 4 Lee
The mixing reproduction frequency is 32 K t-1z.
Detected by the device 40 and SWS data 3. SWS data 4
Stored and still image 2 with 32K l-1z simbling
Play by frequency. Similarly, for still image 3, 96K
It is played on l-1z. In this way, the content and type of SWS data as well as the original audio information
Recording and replaying by changing the leanbring frequency depending on the sound quality of the information etc.
It becomes possible to live. Here, if the SWS data is monaural or stereo,
This will be explained using FIGS. 19 and 20. 19th
The figure is a block diagram of the reproduction system in such a case, and FIG.
I will explain 7 points about the different parts. control control
Stereo/monaural identification data inserted into the
is determined by the discriminator/18 kt 'i (+l11 output, and
The determination result of 4 non-blink f-1 block generator 41.
Switching timing generator/19 and A-D A output line
Sends to switching relay 11.2. The switching circuit 43 switches between spray A and monaural depending on the result.
Switching timing generated from timing generator/19
Put Liana D/j-4-di A fX ”j on the signal.
Switch and send to filter/15.46! I will. child
These filters remove high frequency components such as simbling frequency components.
Remove. Relay RY+, 2C Masu'i Shi A, monaural
The audio 'A signal is switched according to the signal. Next, using the bidet A-Fine 1~ in Fig. 20 (Fig. 19)
Explain the operation of the block. ■11J student system for each one
Control, frame 1\11n1hero before SWS data 1
The stereo/monaural identification data included in the d5 data is
The discriminator 48 extracts and discriminates the SWS data 1,
2 is stored in the memory 5. In this way, it is stored in memory 5.
The data is read out when playing still image 1 and monaural playback is performed.
conduct. Next, the control data for the still EU image 1 frame
It is determined that the stay is A, and SWS data 3,
4 is stored in the memory 5, and the readout step is used when playing still image 2.
Perform Leo regeneration. Here, when monaural, ft (R) is 1 non-ringing cycle.
Equal to the wave number, twice the sampling frequency in stereo
frequency, and the time axis is expanded by this. Ste
The relationship between J+ (R) in Leo mode and in monaural mode is stereo.
When trying to obtain the same band when monaural, ft (R)' of stay A11) = 2X (when monaural)
ft(R)) roar. Therefore, the limp ring clock generator 41 is
The samples related to the above are selected according to the monaural/stereo identification data.
1. In the above example, the output of the D/Δ converter 9 is changed by the switching circuit 43.
It is separated at step 1, but replace this 2゛)
Then, with the output 4 switching circuit of the large-sized bag no ameshiri ()
5'11ifl [separated - to the output of
Connect the D/△ converter and output the output of the D7/△ converter respectively.
The filter 45 is in contact with the filter 716.
; You may do so. The control data is that.
recorded in the frame before the previous frame.
However, the control lever and other devices are recorded in the same room.
You may record it. In addition, in the example of Fig. 17, J5-C is set to the ring frequency.
Use 3 corresponding low-pass filters, each band 1 or
Independently for each 1〕-C cutter (use the cutter I, switch
Chidogi I7 Bashita r ruta (basically [,shi,switch
Condenry (, 4% j is created - (b's (, clean)
Transmission feature 1 (14 frequencies) by changing the lock frequency
-(4 pieces (can be moved similarly))
I can do that. ′rJ, that is, relative to the lean blink frequency.
Change the clock frequency accordingly, and change the clock frequency for each band.
The function of the filter is explained below. ,',? +,,
A micro combi coater may be used for control. Figure 21 shows a switched capacitor filter and a micro
This is an example using a combi coater. Overlaps with Figure 17
The location will not be explained. Control data 1llt device 39
Control data separated by microcomputer
In the case of the 7-metre Φ buffer, loud noises are made each during loading and reading.
Supplying address signals to memory 5 and controlling gray 17
The sampling frequency of the generated signal is
Decipher the switching code to determine the sampling frequency of the three scales.
and the clock frequency to the switched capacitor filter 51.
Control to avoid wave number generation = 1 - timing signal
Supplied to generator 2. In the timing signal generator, the write pulse f2 (W) is
While being controlled by other microcomputer control signals
Three types of sampling pulses f1(R) and their corresponding
f3 (B) in order to cover the filter's visibility in the band
Generates tarok frequency, and f+ (R) is a large capacity buffer.
f3 (B) is a switch.
It is supplied to a capacitor filter 51. switched
-t, t・Vacita filter depends on clock frequency
By moving the transmission fj bamboo in a similar manner, each bandpass filter is
fulfill a function. In the above, digital data corresponds to picture Z
Audio data i, that is, 5WS (Still Pictu)
re With 3ound) 5'-E-C, but this
In addition to this, external devices such as Parts Blue: 1 View
One area related to digital signal processing equipment such as
If you start adding information, etc., the recording medium C, a certain video
Use an audio disc to connect UVI)P and
Control becomes possible and usefulness increases /1. Do J. Therefore, if necessary, store C internal SWS data in the block C.
In addition to the data, we also request external digital data, and
in block b to separate internal and external data.
Con I - [1 - Insert the relevant identification information into the lure cover. No.
Figure 22 shows an example of the identification information Butsugetsu.
[1-Internal/external digital data at a predetermined position 1'' in the file data
Data identification pin 1 to Y are set for 1 iri person, and Y is rO
If it is J, there is an internal SWSγ-ta, and if it is 1-11,
Assume that the data is external digital data. In addition, the figure [shown here]
so that the internal and external controls are in different predetermined positions.
Pit-X and insert, if X is "O" then continue
Control 1~Roll data is control data for internal control.
If f, 1J, external control controller 1~roll de
data. Yotsu-C1 identification
By determining the pitch I-X, Y when re-entering, the personal
It becomes possible to control external devices such as a null computer. Figure 23 is a 1199 diagram of the reproduction system in this case.
jVideo format 1 - signal includes internal and external digital
data and control data are mixed,
The signal is input to the signal separator 1 and processed on the screen!
l! It is also input to the device 8. The separated synchronization signal is
is applied to the input of the switching signal generator 2. Signal separator 2
The separated control data is input to the error corrector 4.
applied to force. Also, internal (audio) data or external data
The data is f2(W
,) Baranoa memory for time axis expansion using timing signals
5 and are sequentially transmitted and stored. Next ([, buffer
f+ output from memory 5J and retiming generator 2
(R) Aij! in issue 18! Lied, 1. τ
IT device 3 is applied to the input. Here 7: Error meter 11-
Processed internal (audio) or external data (3L, data
Applied to the input of divider 52. Was this C minutes ago?
'J1 voice data is applied to the input of the low data/A converter 9.
,. D/A converter 9'r: Analyzes digital signals.
Convert it to 3 and treat it as an audio signal.This 1.'lf,
By maintaining the frequency relationship (W)>J+(l),
The Fi signal is expanded on the time axis. From the error corrector 3
The 21st [-1-le] which was given the old J correct treatment
) - Rihacon 1~] - Lou I - Tode] - To the input of evening 6
applied. Here, inside the data shown in FIG. 22) "7 imi
X O) Internally selected by data selector etc.
The output of the 1-ruer 5'-taper is applied to the human power of the system controller 7.
The external control data output is from the external system.
It is applied to the outer face 53. Sysphl\Controller 7
Internal control 1 which is output 1 of position Y in roll data
The digital data control signal to pin 1 of the
The voltage is applied to the separator 52. This allows data separation
The device 52 outputs external data to an external interface 53.
is applied to. One of the outputs of the system controller 7 is the writing of the memory 5;
It is applied to the read switching control terminal. Another appearance
The power is applied to the control terminal of the timing signal generator 2, and the screen processor
8 input terminals, respectively. With this screen control
The normal image is output as is, and the digital signal is
The parts are replaced with the black level so that they appear clearly.
. The player controller 10 receives various information from the system controller 7.
The signal controls the stop of VDP, single playback, frame advance, etc.
transmitting control signals. The output of the interface 53 is
, is applied to the external input of the external system (personal computer) 54.
Ru. This causes the personal computer 54 to perform the actions of the gods.
Ru. Also, the external output of the personal computer 54 (generally, play V control
request, SWS playback control) is an external interface.
It is applied to the inputs of the faces 5...3. This faith q 4
．． L, applied to input J of system control 7, internal 1 nt
Processed together with II-file data. Pasoni 1in 5/I
RGB (three primary colors) output and screen processor 8C processing
The LC video output is applied to the input of an external screen processor 55.
ing. The 11-channel signal from the computer 54 is
It is applied to the control terminal of the screen processor 55. This screen
The controller has video output and RGB output. Switch the video/RGB composite output and make the output J.
It has become. In addition, the keyboard tJ56 is a general PC keyboard.
This is the computer's input device. Digital data from external devices such as PCs etc. can be transferred to VDP.
(Whether the internal SWS data is mixed or not) 1.
Other examples of Matsu 1-ff! Accepted on Figure 24. In this example,
In each field (Pull block C to people 01~C3)
3 Rive Blocks (Place this here (" 1.1, Block
It is divided into two parts (not called ku). The contents of legmen 1 to 1 are static.
f3WS data for explaining still frame 3)
, and the blocks 01 to C3 of field 1 and the next frame are
Field 2 cl, c, 11-1 Tsuk Goda 5b [l
Consists of Tsuku. Legmen 1 and 2 are external data and are
Block C3 of field 2 and 01~ of field 3
The block of C3 and the block of cl and c2 of field 4
It consists of 6 rock exercises. Furthermore, field 4
Block 03 is assumed to be a black level image. These files
information about fields, segments, blocks and internal and external data.
The relationship with the printer identification code is shown in Figure 25.
The lock callan number 1 to number is then explained in the device shown in Figure 26.
Block counter 6 to J3;
are doing. Segment each digital data segment
1-NO, is attached, and 1-small amount of each segment is I-nab.
Assume that it is expressed in the number of blocks. Figure 26 shows the video file A-pine 1~ signal shown in Figure 24.
71119 is a diagram of a reproduction system suitable for reproduction, and 57 is
, controller 1~roll data and other digital data
52 is a circuit that switches between and outputs SWS data.
to the D/Δ converter 9, and input other digital data.
Switching circuit for selectively outputting to the interface circuit 53
It is a road. 63 is when data is input into the memory 5;
1 block [Count every 1 cycle, C system as necessary.
The node retold by the pulse of C
It is a counter of 58 (Ma, ■ 21st [1-
Is the digital data from route 1 SWS data?
Data identification 2+-l to indicate whether the data is external data other than the above.
It is a data identification code decoder. 59 is Ko
Contains each digital data.
The hood indicating the number of blocks is decoded and sent to the C comparison circuit 61.
The number of blocks to be sent is 60.
Code indicating each legmen number from control data
Ceramen 1 to number decoded and output to comparison circuit 61
] - It's evening C. The comparison circuit 61 connects each decoder 58 to 60 (to the solution)
Legmen 1 number, book number, -)'-data identification-1-
The SWS data is calculated based on the output of the code and block counter 63.
1 - level when reading the data from the button 5).
The 1-level is turned off while reading the external data block.
In addition to outputting to the switching circuit 52, reading of all data is
When it is finished, "Reset F62 1~1J Reset 1"
- Generates a pulse. In addition, each of the control data
Control code decoded by decoders 58-60
Codes other than control [1 - code buffer 20]
Memorized temporarily. F "62 is the output of system controller 7.
It's becoming more popular. In this configuration, J5 (, legmen in Figure 24), 1.
The first data is sequentially transferred to the memory 5, and the legmen (~
The entire data included in leg 1 and leg 1-2 is
stored in the file. Next, the VDP starts playing still images.
The system controller 7 sets the block counter 63 when
At the same time as the reset, the memory 5 is placed in a read state. At the same time that reading of the first block of segment 1 is completed and reversed
The counter 63 becomes “1” and from then on, one block is stored from the memory.
The count increases by 1 each time the meat is released. this
In this case, the block corresponding to leg 1 to 1) J
The number is from ``0'' to ``4'' (data identification code).
1" (see Figure 25), so the SWS design
(-(Leher is sent to the switching circuit 52.
A block that responds to λ1 for legmen 1 and 2 is issued.
The data is identified when the counter is from “5” to r i OJ.
Corresponding to the code "0", J Tari, J is external data.
The TJ1- level is output to the switching circuit 52 to indicate that
It will be done. Reading when the counter 63 reaches "11" ≧C
As time passes, the comparison circuit 6 'I l, L F F
62, and by the Q output of this
stops reading. J, S, Legmen for the above action.
The contents of 1 to 1 are output from the audio signal UD/△C1% unit 9.
The content of legmen 1 to 1 or external) - Yudoji (I
Via the interface 53
It is. Next, for still images, only SWS data is added, such as text and text.
In addition to recording the other code 14, the relevant SWS data and
Record the contents that are different from each other (letters, etc.)
7. When playing, select these as ffFB.
According to 4i: it can be applied in many fields. The following is a brief explanation of the system. Figure 27 is an example of recording the video format of the system.
This is a diagram showing the control target, and each controller-roll code is
b block one frame before the image and digital data
recorded in the lock. Also, the number of times per still image
Audio, text, and other digital data with different types of content
data is recorded. In this example, there are four types of audio and digital
data has been recorded. Figure 28 (A) shows audio and text data.
(B) is an example of the case of data, and (B) similarly has four types of voices.
In the example, (C) has four types of data, but data 1 is external
This is data that can be compared with input. Also, data 2 to data 4
is the character code. Figure 29 - Various control codes and their
This is the processing content corresponding to this. All coats are Asugiko
It is a code. Figure 30 is the video format of Figure 27
The configuration of each frame in the case of Figure 28 ('A) shown in
This shows the troll code. Figure 32 shows this
Diagram of SWS decoder in system example
There is. In the diagram, the previous frame's = 1 - [1 - route] -
The buffer memory 20 for storing
From the memory of tL W
i is read and thereafter various processing is performed. sis51\controller
7 is a character indicating whether the digital data is SWS data C.
data or comparison data with an external signal.
control to supply each jitter to each block
To prepare. In addition, if you output the Φ signal or make the screen black,
Do you want to write a bell, or display text in this black area, or
It also has a control function for adding characters to the video signal. J rope I5, letters) ＼・y Noah 65 and video processor 8
motion 1'1- is 1lJll ul+ (no video processing)
It will be done. Character buffer 65) 11 strokes 1, compositing, etc.
Character of the character shown] -F -11;'J memory
It is. Figure 28<A) Sound 7' letter rasa in Figure 27 and 1
Each frame when recorded on a recording medium using DEAF A-MATTE.
The control code recorded in block b of the
The contents of the code are shown in FIG. 330. Generally, video signal
is an odd number) r~ru1~. Played in even noil order
. First, the block a part of several fields is played.
It will be done. The control code inside Brake A7 recorded here
Since the code is processed inside the player, the 5WSD (static
(Adding audio and data to images) A decoder is not involved at all.
There won't be any. Next, before playing part of block b,
Stand up and follow the city control 1 code one frame before this frame.
screen and audio controls. Next, play part b
Then, set the control 11 code of the next frame to the controller in 5w5o.
[I--Storage of odd fields in code buffer memory
Temporarily stored in storage area. Next, play back part C. Of what is recorded in part C
If the content is a normal video, the image and audio will be sent from the player.
Each of the supplied signals will be supplied to the outside. Di
If it is digital data, the specified digital data of the previous frame
Load the data into the buffer memory attached to the human capacity and display it on the screen.
and the audio will be muted. Next, playback of C is completed, and Q
and then the even field.
Reproduce a and b in the same way as for odd fields. Even number this time
5WSD control code recorded in field b
Similarly, if the con 1 to r call code/memory is
Store in the number field area. Completed playback of 1)
When overriding, the next frame is controlled by the reversible code that the decoder
'controls within' - loaded into debuff 7 memory
Especially 4. Next, play C-6, but for now,
The processing of he + J in the frame is the same as the odd field.
This is the first frame loaded in the previous frame.
t【''−Runi】−1・(52 Therefore, the odd field and
In parallel with executing the same process t-j, read in this frame.
rJ correct processing of the
Interleaved and decoded for control to each part within the system control
The signal is emitted. When the playback of c and Q is finished, the next frame
Before playing the frame, the current frame lX”Q)7
j, and output the control signals from leg 1 to each part,
It handles screen, audio, and data processing. Next, a detailed explanation will be given with reference to FIGS. 27 and 30. In Figure 27
Play frame (A). △tv1. l) M, DΔ
WO1006018~DAWO3006078
When the code is stored in the buffer memory 4, it is sent to the error corrector 4.
- C correction was performed and correction processing was performed. The system controller 7 decodes the code from line 1 to LI-L.
, each control signal is sent to the control output latch from legs 1 to 1. Na
J5, in this frame, an image (video) is recorded in C.
Therefore, the video and audio output of the player is
The output is now supplied to the outside. Next,
Prior to frame playback in Figure 27 (B), system control
The signals set in each control section within the
C It will directly control each part. At this time, AM is
Audio output j is a code indicating mute, so audio output is not possible.
The power becomes mu1~. Also, PM is screen Mikou 1~
Therefore, the video signal that makes the screen black is “output.”
Next each block is played and in b the controls for the next frame are displayed.
The command code will be read, and in C, the specified SW
S digital data is stored in the human data buffer memory.
To go. In this way, each frame of (C) and (D)
Also, the control code is used to control the next frame.
In order to
The data is read into the controller and each control is executed in the next frame.
? There is one. When playing frame (F),
The control iodine ((E, >
Frames are controlled. First △S(yonr, 7jH
Since the output shows the audio output of 5w5o, the S W S D
sws digital data is D'/A converted and 1-1-part
The audio for a single still image that has passed through a filter will be output.
Become. PA is the output image of play 17 F;
Addition] rl will be added. This 11.1 point C is still
When the character code is read out and C < i η, from the player
An image of the output will be displayed. Of course J3 is small, but
Stop at a of this frame and record to '-1' T A
3V), play 17 deciphered the 1EIi Te, rl'(
', 11-screen playback is set. This is SCi, outside.
-1) An instruction (' il
'＋runo(, unless specified from outside, the statement '?“
b not exposed. Here, from the outside, select SWS No. 2 [Yo1].
, and the character -) ~ If you specify the second part of the evening, it will be a person's appearance ■Bano.
From the specified address of J.Meshiri, 5Wsj Ishitar
Read out the light from the sky, convert it to D/△, and pass it through a low-pass filter.
is output. There is also a large capacity buffer 7 memory for character data.
of the player's output after reading from and storing it in the character buffer.
Combines it with the video signal and supplies it to the outside. In this case, the sound is "r mother" and the text is 71vl atb
er j are output respectively. then another phonetic letter
If you want to output, please supply another code from outside.
Make sure to store a large amount of short sentences, words, characters, etc. in advance.
Store the control code etc. in the buffer memory and store it.
Other digital data including any audio and text from
You can select the data and change the output. Still image ■ Live state?
If you want to move on to the next operation, press play 17 from the remote control.
]T1" - Send a control signal -C. Figure 31 is
(1) Frame and <2) Frame 1. +1 on axis C
The processing is shown in timing diagrams. Next, the operation in the block diagram of FIG. 32 will be explained. The video signal is printed on the input of TV III'1 signal - 1 unit 1.
It is also applied to the pano of the video processor 8.
. The TV synchronization signal is divided into 1tllf by the t111f unit.
-1゜■The synchronization signal is input to the timing signal generator 2.
applied. Timing signal generator (゛ is system 7 muku)
Rock (7, 16M1-1z) Kara H, Vlill
lll (based on number a, each block in the deco-ri
A timing signal is generated. In particular,
-Le code buffer ameshiri 20 temporary record 4L1 =jru
Timing signal J4 (CW) is 231 of each field.
There is a signal C generated from -1 to 26 +-1. Also - Con 1
-1- From the code buffer system 71\controller 7
To. Con1-load roll coat, iminoji l1-j
S3.13 (CR) is even field 2711 or higher
This is a timing signal that occurs at the end of the day. (2(W> is a person
To t9 buffer American L5, Aigital f-Yu III
Timing signal generated at 1lff input 1-1
271i-26 when j-yu is recorded in Ku C
There is a timing signal -C which is generated in a period of 011. J+
(R) is a large-capacity buffer candy [su5gara,) - reading the evening / 7
Timing signal 8 to start at 5 (31)
C static] 74 voices of rimbling frequency that occurs when playing one car
There is one in the number. Here, f2 (W
)>, f+ (R), then sws digital data
When starting the data, time 111 decompression processing will be performed.
Ru. Control of each timing is controlled from system system 011Z7.
control signals and generate these various timing signals.
There is. TV same number 1! I] Video signal output from signal device 1
(Since the synchronization signal is removed, it is also called the 1vIIi degree signal.
) is applied to the input of the threshold circuit 13. In the threshold circuit, any level J:
If the width hti is too large, it is reduced to “1” using a digital signal.
In some cases, it is converted to a digital signal string, such as rOJ.
After converting, further convert to 8-pit 1-1Q row, and convert 1 to [1
- code buffer 77 memory 20 and large capacity buffer 1 memory
Supply to Mori 5. ]]nt1]-runi1-dobatsfa
In the memo, the system controller or the odd field ")"
stores the odd number r-Fold's Conte 1''-Rue 1-1-
If the field is an even number,
7 address of even field is obtained and timing signal is generated.
Generated from generator 2 - Stored sequentially with ril + (CW) signal
go. Storage of even field control code is completed.
Then, Ja (at CI) signal 'C' error correction 11 circuit/l
-c After performing the correction process, manually print the system controller 7.
added. System controller - CIA, deciphers the 21-code.
, sends signals to each processing section to the cellar 1. j″rr digital day
Fill in the ta (b): If it is 1-d, Noahski code
Convert from the code to 231B data and transfer it to -C, data↑ for immediate use.
Let Jista and next arene\'s ilJ 11h
+ First, turn on the video processor 8 and the sound Ih switch.
66 and 1fl. Thready-1 Hole 1 ~ Circuit 1
The digital data supplied from 3 is human h1
- Applied to the input terminal of the memory 5. This human figure t11ba
timing signal) -; IJ from Hikari 41 device
Timing signal f2 (W) supplied by t and system i
1j controller to circle ■, address transmission of r, 53 to 4
! / (stores sequentially and goes to C.Next, large capacity buffer j・me
When the evening river entry is completed, Yu 9J:;
1. Easily included is '(mining signal generation 2, f+ <R).
Obtain the readout address signal from the system controller (,
Error reading from Hatsuno i memory old i (circuit
30 people/Jt, 2 supplies. This error correction i [three circuits r
i':'Jil Rubu and! ” r.
After downloading, put 61 on the SYSRA l\ control til + device.
In the case of digital data, apply it to the input of the D/A converter 9.
be done. A D/A converter converts digital signals into analog signals.
After converting to the audio signal, the audio signal is switched through a low-pass filter.
It is supplied to the outside through the switch 66. character day
(Similarly, the control signal is obtained from the system controller.)
, from the player with the video processor through the character buffer 765.
Combines the supplied video signals and supplies them to the outside.
works. In the case of audio and text data with several types of content
is a controller that specifies selective reading in advance.
l-Read the roll code one frame earlier and decipher it-C
unless a specified overriding code is supplied externally.
Neither audio nor text is output. The specified code from outside
When supplied to the system controller, the system controller
, decipher the code and specify in the human buffer memory
Address where the SWS data and character data are recorded
Supplying the data to the human capacity M buffer 7 memory and tying
Generate a pulse of f+ (R) to the timing signal generator.
J: Supply Uni1liII control code to timing generator
At the same time, the b control signal is supplied to the D/A converter 9 and the
It also supplies control signals to the character buffer to generate the specified voice.
and J, which outputs characters. , then the same process can be done if different voices and characters are supplied.
It operates to output audio and text. −j゛Ijita
Comparison data with external signals C・If there is an error,
Error correction data taken into system controller; L error (data from outside)
It will wait for data input. In addition, in the case of normal videos, the frequency
Due to multiplexing, 8 analog stores are recorded as heavy and C is recorded as J3.
, in this case, in Suin'f-66 (1, evening C)
The log audio is output as a playback output, etc.
I'm confused. +1'3 on each side mentioned above to the b70 connector l-
- The roll data is processed by this control 1 ~ roll data.
inserted in the same frame as digital data or image information.
18 times entered, create 15 times this control f-ri and deco
Please enter the code and identify it. -i need to
occurs. For this purpose, the beginning of the second line [J-L, I-D]
A bipolar transistor is used to operate the circuit at high speed.
circuits (emitter coupling logic and Schottky circuits)
IC) will become necessary, and the miniaturization of circuits and low power consumption will become necessary.
It becomes difficult. Therefore, as mentioned above, the digital data to be processed and
The controller 1~roll data corresponding to the image information is
At least one frame before the insertion frame of data etc.
Insert this controller into the
Processing time for playback, decoding, etc. is equivalent to at least one frame
It is written as a period. 8I, as shown in the timing chart in Figure 31.
As such, in the example for bidet A) A-pine 1 in Figure 27, (
△) of block b of frame
Δ) Frame image reproduction processing Jl's dark attack ", Deco
After processing the code etc., the data of the next <(+3) room is
Processing should be done according to this control code 1.
This is what we are doing. In addition, with the increase in the amount of information on ``1 control'',
Two fields (odd and even) make up one frame.
field) corresponding to the same water 51i scan line]
1 to role] - is assigned and inserted. Figure 33
The mode is shown in 19.
There is section C, a, 11, C and 0 are shown in Figure 1.
Same as the example - C, and the numbers 1 and 2 of each subscript are 1, which is an odd number.
The field is also 2, which is an even field.
An example of the number of scanning lines is shown in FIG. 3; block
b -c For a certain 21st 1-1-rood, -C is
Two] f-ruts: Jl, @ゎetc. Intermediate in one room
d3, the block is configured so that the transfer and error correction are completed.
rfl tsuku c-ci, each rib/' 1.1 tsuku (
(See Figure 1) J3 C Interary-f\゛bow]' j
-C is made so that l is completed. Bu [1 Tsuku 1
) is each (Φ1 controller) - de C (how many ff
1l+911 has jD lysine information, so the correction
High stopping power 'v! : ;II it rjl father-in-law (=
Since J is added to 0, an example is 1 sole - land 11 -
Revised 11th, 21] ~ Toilet - Shito a no stopori 4 "1J,
) Ic-ii is done. On the other hand, BU1'Tsuku C's digital
)-ta1. ＝Therefore, there is a certain amount of tears and injustice [ij no ga ilg
U (b eyebrows 1j + undecipherable letters, etc.)
As long as the problem (J4 Oi's C1 correction ability J, S+1 (I?
Lr'l 1. / - Doshindo]
] - is configured to perform system corrections. Figure 31 shows error correction for one control block.
This figure is recorded in block b. This blog
The block b is 23H to 268 of 1 field as mentioned above.
．． It consists of 2 fields of 23H to 26H, a total of 8H.
It is said to be 288 bytes in total, but the effective information capacity is
is 80 bytes, and the remaining 208 pies are shown in Figure 34.
With the parity P and Q in the X, Y and Z directions of the cube shown in
be. P. The subscripts X, Y, and 7 of Q are the marks F'4 i that include the parity.
It indicates the direction of Ft, and the numerical subscript indicates the direction of the code word.
It corresponds to the number of the first word. PXPYO word
is the parity P× in the X direction and at the same time the parity P× in the Y direction.
It is also a tee, and the first PXPY number in each direction is O.
Which indicates that. Also, QX QY QZ work
is the parity Qx in the X direction, and at the same time the parity in the Y direction.
It is also the word QY and the parity in the Z direction.
It shows. tc xian word expressed by combination of P or Q and subscript
The same applies to Furthermore, 1 word is 8 bits.
There is. Here, bow to Y7 at the left end of the diagram [node group Wo
, W, W? o, W2O, W41, Wco,
W6t, L) YO, QYO, Py+, (1) Yl
The 12 words are used for frame identification, which will be described later.
It's from the people who are doing it. First, for error detection -C, 1. /3
For every horizontal line (1/3 H), (n, k)
−(12,10) code is constructed and detected. this is
Figure 3371 1] Error detection in the X direction using x and Qx
71 Next, error correction - C is 2 Hfij
(n, k) constitutes the sign of (6°4) r M'
This (51, l-' v in the figure. Corresponds to the Y-direction error iJ correct due to QY. 1 Furthermore, 21
”S=I to the 41 nodes of the grid (n, k)
−(/1. Construct the code of 2> and perform the correction, this
Figure 0)/. This corresponds to error correction in the Z direction by Qz. This example uses error detection and error '='J j, I to go to
In the sword lower body GF (2> upper lead sword (1 sign V3,
1, sort 8 pitches 1-, hit in 111th place-(' 43
S, picture 'J' Noshi X is P (x)-X8-1-X
' +X '' +X ' (1q) Let it be IIJ.
Then, take α-(00000010). The parity check matrix 1-1 is (n; code length), which can be expressed in bit units using the matrix T as follows. However, ■ is an identity matrix with 8 rows and 8 columns, and -r is as shown below.
Take a matrix with 8 rows and 8 columns. t, 10000000,1 Now, to know the location of the error and the details of the error, use the following method.
Let us consider the syndrome S defined as . S = [Sp So ] =l-l ・[WTl-1,
wn-2゜...W2'+p, Q] up
J that satisfies Sp-8o = O in the formula: Sea urchin information
Along with the code, P and Q are recorded. Good trowel, frame
11Y with another code written in an even frame is “ooo
ooooo”, IelL/-mu throat aV is “0011
1110'', then P Y (+. QYO, PYI, the barrier of QY'l, r is the even frequency
A(1')iffQ "00000000", 1ii
In the case of a/L/lx, it is “00111111”, and the
Available with lane and identification code binding. The frame identification code is set between the adjacent rule l\phase t, 7
Set the code to change each other, and record it in Bookmark 1].
If you record it, you can play it back, - this arene, and the identification code.
According to the method for detecting the presence or absence of a change in
It can be quickly detected that there is a still image when there is no change.
It becomes possible to exit. Therefore, for example, in the reproduction system shown in Fig. 26, the switching circuit
Frame of the control 1~roll code output from 57
A video/still image detector that extracts and identifies program identification codes.
and send this detection output to the system controller 7.
Make it. Figure 35 shows an example of the configuration of this video/still image detector.
It is shown in , and has the following configuration. The 3rd to 7th bits of the frame identification code are all
-Noagu 1-350 to detect whether it is CO
, and gate 35 that detects whether all are 1.
1. J stiffness (00000) and (1111) on both gates
When C is detected, a detection pulse of 1 is clocked C
The next stage up/down counter 352 is updated in synchronization with K.
Up and down count 354, over puff 1]-2O with count number 16 or more
To prevent each of the following upflows, the above detection
In order to prohibit pulse counter input, the counter output
Monitor the four pitches hQA, Qs, Qc, and QD, and
When it becomes 16 or O, it generates a low level signal and
- h 353.35 'l becomes III
Gutu [J-Preventer 355. The highest pitch of counter 352
1 ~ Shift the output with a clock synchronized with the read frame
Tosaru 2 pits 1 ~ shift 1 ~ register 35G and shift 1
~Register 3560) Video or still image using two outputs
Exclusivity that overrides the output of the detection flag when detecting
It consists of Buoa Gate 357. Read con 1 ~] - Ru: 1 - Back of the code, frame
Identification codes require fast detection and error correction.
instead of using a 12-word identification code.
35 to improve reliability. human power
The 3' to 7th bits of the ``identified code'' are all 0.
or 1 is detected by gate 3!30.351. If there is a Zubete oc, I will count up Goo 1-352.
If it is 1, it will be counted down. this doki game
At the beginning of the bit (0ol is 8, that is, the most -V position among the 4 bits)
If P1- is set to 1, the frame identification code is (0
0000000) is playing the even numbered frame.
The next step is the highest pitch 1-Q of the 4-bit output.
D is always 1, and when (00111110), J
During playback of odd frames, Qo is always O. By this, you will know the playback of C1 even and odd frames.
It is possible to detect only one bit. Here, if you can read only one word of the frame identification code,
, videos, and still images, but
If this code is missing due to pull-up error 1- etc., -C can also be detected.
12 words are recorded to make it easier to read. Therefore, counter
The datater 352 counts the same frames many times.
There is a possibility that the Therefore, the output of the counter is
355, and when the output is 15 or O, the game will start.
Ando goo j ~ 353°354 of the human power stage of G is closed.
This is to stop the count. The most significant bit (Ql) of the output of this counter 352 is set to 2 bits.
clock shift 1 - register 356 contains a clock synchronized with the frame.
Enter serially with lock. At this time, video playback
If so, the counter output j input to the shift register will be different.
If you input these to the gate 357, the output will be 1
．． 1 +-1 roar. -11, l, γ1 still image playback
, shift 1 - register output (ma 1 - roaring video, still image
It is possible to distinguish between the playback states. This detection output is sent to the system controller 7/1''',
-1 System is sent to each part and interfaced as necessary.
1- via the bus 53 (=1)
I can go out. :3n] ~ 9=I treatment to increase the container of roll needle 1-
! (Another example is the C11 frame.)
Divide the 1-control route into 11 fold frames and insert it.
There are ways to record it. In this case ilj /
A schematic block diagram of the 1 system is shown in FIG.
Jir” A format toy g8 to V, 11 sink, )-
same 1sj signal, con 1 ~ "l-ru:"-de, SWS file
Separator 1, V, l-1 sink and
J-ta same 1! I] Timing from signals to each part of the system
Timing signal light that generates a transmission signal 1 device 2.5WS-
Convert ta to analog 13ge 5r digital t°' 1 voice
Taha controller 69, buffer that stores control data
Memory 20, controller 1-〇- correction for error correction of data.
Data for detecting completion of control device 4, control 1-〇-rule data
End detector 68 decodes data from memory 20
Decoder 67, control commands from the decoder, input device (computer)
Input information from Peter, etc.) 1” VDP status signal
A system system that generates and sends control signals to each part by receiving signals from the receiving side.
Control 7: A screen processor that performs various processing on the video A signal.
8 and SWS data output and general sub-dio signal
It consists of an A-dio signal processor 70 that performs switching. Control data corresponding to one frame now
is divided into blocks b of multiple frames and inserted and recorded.
This control data is then displayed continuously in the next frame.
An identification signal indicating whether or not to do so is also inserted. Next, the movement is 1'C: J2 dawn. In the figure i13,
The video format A-mat signal input is applied to signal separator 1.
, vertical sync signal, horizontal sync signal, data sync signal, and
Controller 1-roll program, digital sound horizontal domei signal
, f-Yuzuki 111J Shinzuki is printed on timing signal generator 2.
A retiming signal is generated to each part. In addition, digital and 1-voice nota (L no digital audio processor)
Buff I/Meshiri F in the 6; written, error correction
After doing that, 11.51! ! I-axis extension A”; t protrusion;
I) , / A converter via - C analog B voice input
taken out. Con 1-1” - Luata is Batono no Me
memory 20, error corrector/1.1. lJ, -
) η Perform error correction. At this point, data end detector 6
8 is Control 1] - The data is completely sticky or moves to the next room.
Detects a continuous signal. -1n1~roll
Data continues to the next frame η Rudosa (J, Baranoame
[in Mori 20] N1~I'' - data is ノ'' - evening 67
Do not send, keep (as is.Ul,:,controll-roll
When the data is complete,) Den I-Taro 7 t; L bar
ff) MeFsu 20: 1 nt 11 - rug 11 g
Read and decipher. cis/-1\controller 7 (,1 deco
Control commands from the player, information from the input device, play
Receives status signal of hair 7 (timing signal generator
, digital audio processor, screen processing 3! I! equipment, audio signal processing
various control signals to the computer, J5, and video disc player.
1゜Screen processor 84J video A〕A-mat signal
Masking the digital audio data part for signal input
(turns the TV screen black), text, graphics, etc.
Super invoice or overlap with the video signal output
. The audio signal processor 70 demodulates audio of digital audio data.
Switch between signal and audio signal input. play 17 system 91)
The signal is applied to the player's control input terminal and is
Control of constant playback, slow playback, static 1, frame number reach, etc.
I do. Next, write the video (audio corner) and SWS to the recording medium.
By recording in a mixed manner, so-called video A software 1~
We may try to diversify. In this case, for example each frame
Record the identification code between normal video and SWS on the unit in advance.C
When playing, read this identification = 3-code to determine the
One possible method is to switch the active mode accordingly. A general video disk is used as the platform for normal videos.
Like it's being said? '1 voice is 7su] Example up to zl in 1g form
For example, 2.1M+-12 (additionally 2°8M in stereo)
I-1z audio 4) 'M modulate the output signal 11 and
information (this video A signal is also converted to FM) and frequency
Multiplex and record C to iJ3<. In the case of one stroke of “Still”, IJ is,
Insert the digitized SWS data into block C.
37 shows the contents of the J control 1-t in such a case.
As shown, the top 1st seat behind the 8th building is 1-4,1,j.
1 is the output control code, and 10 samurai 1 pi 1 or human power 1
This is the J Sugo code. Output control = 1-1 ~ (J1 sle
-1-do il' i to identify A and monaural
lj, input control]-do(, (monaural height, ε'
y W S i'-Select or override analog M7'
i (7) CII 'l fork (macl+2/, g selection)
Or, furthermore, decide on Miko 1~;
, override (logic) 1” selected, “0” (non-selected)
The selection becomes - (1, further, × (31, control)
(I don't care) ~C and A\Forcibly 0 in the example
'. It is spelled as something that is said to be. In addition, n\ta of spray A,
The audio A input is connected to V D P.
(7)), jl/A NJ raw output (frequency multi-note
Since the playback output of the recorded video is selected, the priority
``Spray A'' becomes high and J3 becomes high, and a logical pass is applied to spray ∆.
1''' is now unrelated to the IC and other pins.
be done. Figure 38 is a block diagram of the reproduction system in such a case, and the
The audio selection code from the control code decoder 6 (
6-bit latch 71 for storing the time (Fig. 37);
The output of this latch 71 causes the voice selection relay RY to
'1 to RY6 are not driven, and the drive roller 1 to etc.
] - If the code cannot be corrected and erroneous data is
A protection circuit that operates to prevent malfunctions even if
72 and the output of this circuit 72 controls A off.
It has high 1h selection relays RY1 to RY6. Figure 39 shows ]n1~roll code and relay RY'1~1
(IJ diagram showing the operational relationship of Y6, discussed in monaural)
! When p1 passes, the same voice from I'< output is heard from the lower
The audio source specified by 4 bits (see Figure 37) is output.
Powered. When Chl has logic 1, VDP paste, C1
1 output, when logic 1 occurs in C1]2, VDP RCl)
The outputs are output respectively (, general)
Insert the audio content of the seeds and save it according to your preference.
Used when selected. When logic 1 stands on SwS
, the time axis compressed S W S router is time axis expanded.
processed and 1/'Δ converted (as analog audio)
Output. When logic 1 stands on J, T, Mi U-l-, the sound
The voice output is 2r and 41 is output. Figure 1IO is a diagram of the '1 example of the protection circuit in Figure 38.
Then, set the 6 bits except for the 2 bits 1゛・ indicated by X℃ in Figure 37.
Use the inverter to configure the
ing. Figure 41 shows the bidet A-771-mat of this example.
Yes, in period A, S W S date (, Ib (1
Tsuku C is inserted into your body (= ?Nia, voice is Mir
-l-. Therefore, while playing the video, S W S
I"-Yu are sequentially stored in the buffer memory 5. Furthermore,
The code during this time is 11. In period B, V l
) I”) is to play a still image η, but this f
f) The SWS data stored in the screen 5 is time-axis expanded.
This SWS data is read out from memory and output as 1.
The analogized audio of the data is derived. During this time
The code is 18. In period C, SWS'y'-evening
When playing the video while storing it in the memory, the audio at this time is
is playing the audio of cll, ch2. This 114
The code is 80 and Natsu-C. When the next period comes,
VDP plays the still image again and saves the SWS data to memory.
Is the time axis expanded by reading it out? η voice - C is horned
The code during this time is 18. Next, we will discuss the digital data separation method (as described above).
Ru. First, refer to Figure 42.
- There is a block diagram of the evening separation circuit, 421 is Bedemetal
Pedestal clamper that takes a constant voltage of 1■ level, 422
is the digital data at the threshold value (threshold value) VD.
A code that compares data and shapes the waveform into a digital signal of 1 and 0.
423 is a detector that detects V sink, /I
24 is an I-'LL (phase lock) input with V sync.
(Kudloop) circuit, 425 is the forefront of data in the l-1 section
Take out the data synchronization <DS) pulse inserted in
11) S detector, 426 is l) S pulse Pl 1
/12/Reading data from clock from I 1-1
Generate a reference signal for Tsuta (1) CK) Riruri Ptsu 1
~ circuit, 427 output from reflex 1 circuit 426
Ruri 11 to each pick 1 of the data 'l' in the center of the section
71 K) delay circuit and 1
128) Based on DCK from Hani Nobu circuit/127 ij1
There is a ``F'c'' that reads the rata.
A part of the input signal including the DS pulse of the signal waveform
The enlarged waveform diagram is reduced to Figure 43(a), and 13th, this
Signal (at fJ clamper 7121
15 (between 11 and 122)
'i V 1. ) as a digital f-word of 1.0.
The waveform is shaped as shown in C No. 43). On the other hand, J3 is detected at detector /'I23 and lJV syn
PL14.24 operates based on the arc pitch.
1 Hel 1 ~ Frequency 4 A 8 paste
It is output as follows. Also, the DS pulse is detected by the detector 425.
It is detected as shown in (C), and this is sent back as a gate pulse.
The PLL 42 avoids activating the operation of the set +- circuit 426.
Reset at the rise of tarok + d+ from 4 (point A in the diagram)
data and has the same frequency as the data rate.
A lock is generated as shown in Figure (e). This clock (C') is processed as data by the delay circuit 7I27.
Avoid delay so that the rising edge of
, DCK is generated as tf+. This DCK
The system clock roars and the clock of FF428 and
The data synchronized with this DCK is read output.
It's possible to get it. In the circuit system shown in FIG.
Chair level (threshold level) ■ [) is the amplitude of the incoming horn signal
It remains constant without following fluctuations. Okay
So, exactly 1. ＞Data slicing is not possible and data
Reading is not accurate. U: Is, DCK reference clock
The reset point for generating lock (e) is precisely
It should be the falling point of the DS pulse fcl, but in reality
At the rising point of clock pulse +d+, clock (e)
is reset. Therefore, the clock (e) is
Rotta pulse <[1] produces a phase shift every (l)
Finally, the data I'; is set to a DC that exactly matches the phase.
You can't get K. Also, in this way, the DS pulse's) A down 'a' l) G
In order to read the data in the 11-1 section using the K phase reference,
For example, when the DS pulse shown in FIG.
f Unable to detect or incorrect position due to 7'
(If detected, accurate reset in the 11-1 section
data is not read correctly, resulting in data reading errors. In addition,
Instead of generating DCK in the same way, data inversion is always
Monitor - C and follow it l) Make 11 CKs.
method, for example, using P l-, L, Ic method (1 ball
The shortcomings mentioned in 1 are solved to some extent, but not completely (゛ is i1-1)
゜Therefore, fl-1 that goes d3 in front of h4 in the field.
The r-drive shown in Figure 10 inserted into the
By using the link data, the so-called △-C
(automatic threshold control) circuit (to solve the above drawbacks)
There is a dozurumono C, and a concrete example block is shown in Figure 1I/1.
The video signal is shown at the pedestal clamper 421.
At the same time as the pedestal is clamped, this clamper
Pedestal level Vp is now output from 421.
ing. HifA〕A-Matt has a digital signal
Since other image signals also exist, the digital signal
-C gate is applied to the gate circuit 429. next pic
The positive peak of the digital signal is detected by the dark bold circuit 430.
This hole is bolded and the previous pedestal level Vp
The output voltage is divided equally by a voltage divider circuit consisting of resistors R+ and R2.
This becomes the threshold level for the comparator 422.
Ru. This threshold level is compared with the output of the clamper 421.
The waveform is shaped. Of this comparator output,
Only the digital data is -C gated to the gate circuit 431.
, this pulse 1~ rises when the output is reversed I
” Ivy extractor/132C generated. And this pal
1-rate of the data.
In addition to the wave number, there is a rising edge at the center of each bit interval of the data.
A DCK signal C is generated in the PLL circuit 434 as shown in FIG. This DCK is used as a clock input, and the I comparator/I2
17F 428 which converts the output of 2 into data input l)
Digital data synchronized with OK is read (A
1° peak hold circuit/J3 at 1.30, j
- Sudden amplitude 1 amplitude for data top-out, noise, etc.
The time constant is carefully selected so as not to follow changes. In this way, one 11r was placed at the front of the field.
According to field sink data, peak 11
1-1 of P L L will be maintained for a certain period of time.
Therefore, the image continues and then the digital data reaches 31 (
-C also immediately peak hold and I) l l block
However, stable 4i data separation is possible.
i: There are 7E. In addition, in the middle of the field PILLI
Tsuku increases (6.Digital data as shown in Figure 11)
It can be pulled into the lock by its own l) S f,;
is possible. 1 The distance between both images is a certain length (111J)
1 length, 11 in 1 go, [) 11 [Danger of cock coming off]
As shown in Figure 1,
There is also a clock at the beginning of each 1-11111 interval where the image signal bends.
Insert several 117 pulses synchronized with the clock synchronization signal.
If you do this, you can trace the PLI-lock in the middle of the field.
Even if the lock is off, the J:SPLL is applied to the next tarokk pulse.
You can avoid locking. Furthermore, on the -close side, PLL434 is used.
However, the method shown in Fig. 42 (referred to as the Relene 1-way method 1)
It is good to use. Lee, that is, 4 in Figure 44
Each block from 31 to 434 is replaced by 423 to 427 in FIG.
It is good to change to each block of C6. By the way, as shown in Figure 4, the digital data is at the forefront.
Although the clock run-in signal and DS signal are inserted,
Figure 42 Noriref 1~ method detects part of this signal.
This is the signal that resets the signal.
The entire body does not drop out (as long as it performs a good a movement).
This makes it stronger against Dorotsubuara 1~. Ma
In the Rijitsu 1 method, as shown in Figure 45, the front of the image signal is
If you do not insert tarokku during the image signal period,
Since the rets l～ is not done, the position relative to the DCK data is
When the phase shift is superimposed and transferred to digital data again
When the clock signal is
And, the 11-1 section relet 1~ is shocking.Mr. Fraudulent
', ; Data reading is done, each 11 as shown in Figure 45.
C-1 Notification 11 of inserting a clock signal at the beginning of
- Certainty disappears. However, this reflex 1 one-way r +
, ; L It is unlikely that a deviation of one cycle of the maximum clock will occur.
J can't be done. In 31 above, the recording medium is
As mentioned above, video data f′: S-C is good, and
Video A) 4-pine 1~ as digital data
In addition to SWS audio data, text information (t11) (mechanical
Storage information in the field [)
3 medical information such as electrocardiogram,
For example, it is possible to include temperature information, etc.
r Digital data tri, straight line or broken line 'l> CM method
, adaptive difference ll) PCM (△DPCM>, A1M, etc. 4)
Multiple encoding schemes can be used. Furthermore, J)A
F-pine [-Signal type is M T' S Ch j'c
For example, P△1- and S [CAM method]
ShijjJ l! f2 (Yes. Also, the number of scanning lines in each block a-Q is limited to the example in Figure 3.
It is clear that various modifications are possible without being specified.
be. According to the present invention, the structure is
Since the digital switching frequency is selected appropriately,
Data storage and σ playback system buffer 7 memory customer
In addition, the low-pass filter can be reduced accordingly.
First, the off-frequency can be selected as appropriate, and the
Reproducing output with characteristics matching the information content
It becomes possible. (Table-1) (Table-2)

[Brief explanation of drawings]

Figure 1 shows the fron 9 minutes of the frond screen that applies to the present invention. Figure 1 and Figure 2 (Jl, Jide A) A-
Figure 33 shows an example of the number of horizontal scanning lines for the 11-1 ivy in Figure 1. Figures 5 to 7 are diagrams showing an example of digital data insertion, Figures 5 to 7 are diagrams that do not show how digital data and images are inserted, respectively. FIG. 9 is a block diagram showing an outline of the recording system. FIG. 9 is a diagram showing an example of a reproduction system block. FIG. 10 is a diagram showing an example of the field sync waveform of block a. 11 of digital data”
Figure 12 shows an example of a song in the playback system block, Figure 13 is a specific example circuit diagram of the data synchronization detector in Figure 12, and Figure 1/I is a controller. Figure 15 is a diagram showing another example of the 1-roll data, Figure 16 is a timing chart showing the operation of the program in Figure 15, and Figure 17 is a diagram showing another example of the playback block. 18 is a diagram showing an example of a regeneration system block, FIG. FIG. 20 is a diagram showing another example of the software 1~,
Fig. 21 shows another example of the playback system, Fig. 22 shows an example of a song of console data, and Fig. 23 shows yet another example of the playback system blocks. Figure 24 shows another example of video software, Figure 25 shows the relationship between block C and data identification code 1, and Figure 26 shows the relationship between block C and block C. - Figure 27 shows yet another example of the video software, Figure 2ε3 shows the digital 1
Figures 29 and 330i showing the contents of the data,
Fig. 31 shows an example of the l-I control system, and Fig. 31 shows the mJ of the playback system for the video software shown in Fig. 27.
Fig. 32 shows another example of 111 threads of M raw silk. ilj to 'I'
(Fig. 34 shows a small example of insertion, and Fig. 34 is a diagram explaining the system.
The figure shows an example of a detector for a router.
3G, 11; I: A diagram showing another example of the il'i/l- system (7) block, FIG. 37 shows an example of the block data, and FIG. Figure 39 shows the control 1-roll data in Figure 337 and the high-pitched IJJ change l/- in Figure 38. Fig. 40 shows a specific example of the protection circuit shown in Fig. 3ε3, Fig. 41 shows an example of bald y''A software, and Fig. 11.2 is a block diagram of a conventional example of the data separation section. , FIG. 713 is a waveform diagram of each part explaining the operation of the block in FIG. 42, FIG. Buto 1 in figure 1
Fig. 3 shows an example of the 11-11fi Q waveform used for the test. Explanation of the symbols of the main parts 1 ・・・・・・Ini Coral part ρ■ [Vessel 2...
Timing signal generator 3.4...3ff1stJ positive circuit 5...
・Time axis expansion member [6...2] component [Call load decoater 7.
...System controller 8...Double-sided processing device 9...D/8 converter 10...Zoshi-1 a! Li 1
211 x M 1 person Pioneer Co., Ltd. agent Patent attorney Motohiko Fujizuki (1 other person)

Claims (2)

[Claims] (1) When inserting 11 Y worth of digitized digital data of the predetermined information into the video format 1-signal, select the 1 non-pulling frequency of the predetermined information as appropriate depending on the content of the information. A video format signal recording method characterized by converting and recording digital data. (2) The recording method according to claim 1, wherein an identification signal indicating a sampling frequency for the digital data is recorded. (3) When partially inserting the digitized digital data of the predetermined information into the video format 1~ signal, the sampling frequency of the predetermined information is appropriately selected depending on the content of the information, and the digital data is When recording the digital data, J
It has a frequency equal to the sampling frequency of 3G
Video A characterized by re-processing
A-Matt Haku8 recording and playback method.