JPS6065803U - controller - Google Patents
controllerInfo
- Publication number
- JPS6065803U JPS6065803U JP15797183U JP15797183U JPS6065803U JP S6065803 U JPS6065803 U JP S6065803U JP 15797183 U JP15797183 U JP 15797183U JP 15797183 U JP15797183 U JP 15797183U JP S6065803 U JPS6065803 U JP S6065803U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- control signal
- output
- circuit
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Feedback Control In General (AREA)
- Control Of Temperature (AREA)
- Waste-Gas Treatment And Other Accessory Devices For Furnaces (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の調節計を構成する演算回路及び出力回
路の一実施例を示すブロック図、第2図は出力回路にお
ける2動作信号生成回路の機能を説明するための波形図
、第3図は出力回路における比例動作信号生成回路の機
能を説明するための波形図、第4図は出力回路における
V/I変換回路の機能を説明するための波形図、第5図
は不感帯と比例定数の関係を説明するための図である。
1・・・調節計、3・・・演算回路、4・・・出力回路
、6・・・CPU、20・・・2動作信号生成回路、2
1・・・比例動作信号生成回路、22・・・V/I変換
回路、2 ′4・・・基準値設定回路、26・・、
・三角波発生回路。FIG. 1 is a block diagram showing one embodiment of the arithmetic circuit and output circuit that constitute the controller of the present invention, FIG. 2 is a waveform diagram for explaining the functions of the two-operation signal generation circuit in the output circuit, and FIG. The figure is a waveform diagram to explain the function of the proportional operation signal generation circuit in the output circuit, Figure 4 is a waveform diagram to explain the function of the V/I conversion circuit in the output circuit, and Figure 5 is the dead band and proportionality constant. FIG. DESCRIPTION OF SYMBOLS 1... Controller, 3... Arithmetic circuit, 4... Output circuit, 6... CPU, 20... 2 Operation signal generation circuit, 2
DESCRIPTION OF SYMBOLS 1... Proportional operation signal generation circuit, 22... V/I conversion circuit, 2'4... Reference value setting circuit, 26...,
・Triangular wave generation circuit.
Claims (4)
される帰還信号とに基づいて前記被制御系を制御して前
記帰還信号の値を前記設定値に近づけるための制御信号
を求める演算回路と、前記制御信号から所望形式の信号
を算出して前記被制御系に供給する1つまたは複数の出
力回路とを設えたことを特徴とする調節計。(1) An arithmetic circuit that calculates a control signal for controlling the controlled system based on a preset setting value and a feedback signal fed back from the controlled system to bring the value of the feedback signal close to the setting value. and one or more output circuits that calculate a signal of a desired format from the control signal and supply it to the controlled system.
れている一定な設定信号と比較する比較回路より成り、
該比較回路に入力される前記制御信号が前記設定信号よ
り高い場合には第1の信号を出力し、前記制御信号が前
記設定信号より低い場合には第2の信号を出力するもの
である実用新案登録請求の範囲第1項記載の調節計。(2) the output circuit comprises a comparison circuit that compares the control signal with a preset constant setting signal;
When the control signal input to the comparison circuit is higher than the setting signal, a first signal is output, and when the control signal is lower than the setting signal, a second signal is output. A controller according to claim 1 of the patent registration claim.
定される所定周期の連続した波形波とを比較する比較回
路より成り、該比較回路に入力される前記波形波が前記
制御信号より高い部分で第3の信号を出力し、前記波形
波が前記制御信号より低い部分で第4の信号を出力する
ものである実用新案登録請求の範囲第1項記載の調節計
。(3) The output circuit includes a comparison circuit that compares the control signal with a continuous waveform wave having a predetermined period set in advance, and a portion where the waveform wave input to the comparison circuit is higher than the control signal. The controller according to claim 1, wherein the controller outputs a third signal at a portion where the waveform is lower than the control signal, and outputs a fourth signal at a portion where the waveform is lower than the control signal.
の電圧/電流変換回路によって前記制御信号に応じた電
流信号を生成するものである実用新案登録請求の範囲第
1項記載の調節計。(4) The controller according to claim 1, wherein the output circuit comprises a voltage/current conversion circuit, and the voltage/current conversion circuit generates a current signal according to the control signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15797183U JPS6065803U (en) | 1983-10-14 | 1983-10-14 | controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15797183U JPS6065803U (en) | 1983-10-14 | 1983-10-14 | controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6065803U true JPS6065803U (en) | 1985-05-10 |
Family
ID=30348130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15797183U Pending JPS6065803U (en) | 1983-10-14 | 1983-10-14 | controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6065803U (en) |
-
1983
- 1983-10-14 JP JP15797183U patent/JPS6065803U/en active Pending
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