JPS6062180A - Semiconductor light emitting element - Google Patents
Semiconductor light emitting elementInfo
- Publication number
- JPS6062180A JPS6062180A JP17097883A JP17097883A JPS6062180A JP S6062180 A JPS6062180 A JP S6062180A JP 17097883 A JP17097883 A JP 17097883A JP 17097883 A JP17097883 A JP 17097883A JP S6062180 A JPS6062180 A JP S6062180A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- buried
- layers
- light emitting
- inp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
- H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
(発明の技術分野)
本発明はダブルへテロ構造の両側に電流狭窄層としての
埋込み層を有する構造の埋込み形半導体発光素子に関す
る。DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a buried type semiconductor light emitting device having a structure having buried layers as current confinement layers on both sides of a double heterostructure.
(従来技術の説明)
先ず、本発明の説明に入る前に、従来のこの種の埋込み
形半導体発光素子を半導体レーザを例に取って説明する
。(Description of Prior Art) First, before entering into a description of the present invention, a conventional buried type semiconductor light emitting device of this type will be described using a semiconductor laser as an example.
第1図は従来のInP系の半導体レーザの構造を臂開面
に沿って取った断面で示す線図である。第1図に示すよ
うにこのレーザのダブルへテロ構造はn−1nPからな
る下側クラッド層1、Ga1nAsPからなる活性層2
及びp −InPからなる上側クラッド層3から成って
おり、このダブルへテロ構造の外側に電流狭窄層と成る
べき逆バイアス埋込み層4を形成し、この埋込み層4を
下側のp −InP層5及び上側のn −InP層6を
以って構成していた。しかしながらこの構成では、下側
のp −1nP層5が活性層2を中心とした上下の両ク
ラッド層1及び3にまたがってこれら各層に接している
ため、図中矢印Iで示すように、クラッド層3→P−I
nP層5→クラッド層lへと電流漏洩経路が存在し、こ
れがため、注入電流が大きくなった高注入域では電流リ
ークが生じ出力が飽和してしまうという欠点があった。FIG. 1 is a diagram showing the structure of a conventional InP-based semiconductor laser in a cross section taken along an arm opening. As shown in FIG. 1, the double heterostructure of this laser includes a lower cladding layer 1 made of n-1nP and an active layer 2 made of Ga1nAsP.
A reverse bias buried layer 4 to serve as a current confinement layer is formed outside this double heterostructure, and this buried layer 4 is connected to the lower p-InP layer. 5 and an upper n-InP layer 6. However, in this configuration, the lower p-1nP layer 5 extends over and is in contact with both the upper and lower cladding layers 1 and 3 with the active layer 2 at the center, so the cladding layer 5 is Layer 3 → P-I
There is a current leakage path from the nP layer 5 to the cladding layer l, which has the disadvantage that current leakage occurs in a high injection region where the injection current is large and the output is saturated.
また、InP系では半絶縁性の結晶のエピタキシャル成
長は従来技術では達成されておらず、この半絶縁性結晶
を埋込み層として用いることは出来ないという欠点があ
った。Furthermore, in the InP system, epitaxial growth of semi-insulating crystals has not been achieved with conventional techniques, and there is a drawback that this semi-insulating crystal cannot be used as a buried layer.
(発明の目的)
本発明の目的は上述したような電流漏洩経路を有せず、
しかも、半絶縁性結晶を埋込み層として有する、発光効
率の良い半導体発光素子を提供するにある。(Object of the invention) The object of the present invention is to eliminate the current leakage path as described above,
Moreover, it is an object of the present invention to provide a semiconductor light emitting device having a semi-insulating crystal as a buried layer and having high luminous efficiency.
(発明の構成)
この目的の達成を図るため、本発明の半導体発光素子に
おいては、電流狭窄層として供する埋込み層を、InP
又はGa InAsPのR品からなる下地層上に有機金
属気相成長法により成長させた半絶縁性An x Ga
1−XASを以って、構成して成るCとを特徴とする。(Structure of the Invention) In order to achieve this object, in the semiconductor light emitting device of the present invention, the buried layer serving as the current confinement layer is made of InP.
Or semi-insulating An
1-XAS.
(実施例の説明)
以下、第2図を参照して本発明の半導体発光素子に一実
施例につき説明する。(Description of Embodiment) Hereinafter, one embodiment of the semiconductor light emitting device of the present invention will be described with reference to FIG.
第2図は本発明の半導体発光素子の一実施例であるGa
InAsP / InP系の埋込み形半導体レーザ素子
を示す臂開面またはこれに平行な面に沿って取って示し
た略図的断面図である。尚、この図において、各構成部
分の寸法関係、形状配置等は本発明が理解出来る程度に
概略的に示しであるにすぎない。また、同図において一
部分のみにハ・ンチングを付して示し他の部分のハツチ
ングは省略して示しである。FIG. 2 shows an example of the semiconductor light emitting device of the present invention.
1 is a schematic cross-sectional view taken along an open plane of the arm or a plane parallel thereto, showing an InAsP/InP-based buried semiconductor laser device. In this figure, the dimensional relationship, shape arrangement, etc. of each component are merely shown schematically to the extent that the present invention can be understood. Further, in the figure, only a portion is shown with hatching, and hatching in other portions is omitted.
第2図において、7は下地層としてのInP基板であっ
て、この場合には、この基板7は下側クラッド層を兼ね
ている。8はこの下側クラッド層7上に設けた活性層、
9はこの活性層8上に設けられかつ下側クラッド層とは
反対導電型の上側クラッド層である。これら各層7.8
.9によってタプルへテロ構造を構成し、上側クラッド
層9の表面から活性層8の下側の下側クラッド層7の一
部分に至るところまで両側部を除去し中央部を残した、
例えば、ストライプ構造となしている。このストライプ
構造、すなわち、ダブルへテロ構造の両側部に、基板す
なわち下側クラッド層7の表面から上側へと、この両側
部に沿って、有機金属気相成長法により Au x G
ap−xAs 10を埋込み成長させて形成している。In FIG. 2, 7 is an InP substrate as a base layer, and in this case, this substrate 7 also serves as a lower cladding layer. 8 is an active layer provided on this lower cladding layer 7;
Reference numeral 9 denotes an upper cladding layer provided on the active layer 8 and having a conductivity type opposite to that of the lower cladding layer. Each of these layers7.8
.. 9 constitutes a tuple heterostructure, and both side parts are removed from the surface of the upper cladding layer 9 to a part of the lower cladding layer 7 below the active layer 8, leaving the central part.
For example, it has a striped structure. Au x G is deposited on both sides of this stripe structure, that is, the double heterostructure, from the surface of the substrate, that is, the lower cladding layer 7 to the upper side, by metal organic vapor phase epitaxy along these both sides.
It is formed by growing ap-xAs 10 in a buried manner.
この場合、中央のストライプ状のダブルへテロ構造は、
波相、気相、有機金属気相、分子線等のいずれのエピタ
キシャル成長法によって形成しても良い。しかしながら
、このダブルへテロ構造を形成している各層7.8.9
の領域と、埋込み層lOの領域とを格子不整合となして
、内領域間の界面での抵抗を高抵抗とする必要があるど
共に、この埋込み層10自体の抵抗も高抵抗とする必要
がある。従って、本発明では材料A文x Gap−xA
sを埋込み層10の材料として用い、このAJI X
Ga1−xAsをInP基板である下側クラッド層7」
二に有機金属気相成長法で成長させ、このA文x Ga
I−XASをノンドープにする。In this case, the central striped double heterostructure is
It may be formed by any epitaxial growth method such as wave phase, gas phase, organometallic vapor phase, or molecular beam. However, each layer forming this double heterostructure7.8.9
It is necessary to make the region of the buried layer 10 and the region of the buried layer 10 lattice mismatched so that the resistance at the interface between the inner regions is high, and the resistance of this buried layer 10 itself also needs to be high. There is. Therefore, in the present invention, material A sentence x Gap-xA
s as the material of the buried layer 10, this AJI
The lower cladding layer 7 is made of Ga1-xAs and is an InP substrate.
Secondly, this A pattern x Ga is grown by organometallic vapor phase epitaxy.
Make I-XAS non-doped.
次に、動作につき説明する。上側及び下側クララ1ζ層
9及び7を経て夫々活性層8に注入された電子と正孔と
が再結合して発光し、誘導放出を引起す。第2図に示す
ような場合には、光が臂開面での反射を繰返しファブリ
ペロモードでレーザ発振する。また、このレーザをDF
B、DBI’l構造とする場合には、この光はブラッグ
反射を利用してレーザ発振する。Next, the operation will be explained. Electrons and holes injected into the active layer 8 through the upper and lower Clara 1ζ layers 9 and 7 recombine to emit light, causing stimulated emission. In the case shown in FIG. 2, the light is repeatedly reflected at the arm opening surface and oscillates as a laser in the Fabry-Perot mode. Also, this laser can be used as a DF
In the case of a B, DBI'l structure, this light oscillates as a laser using Bragg reflection.
この場合、この構造の上下方向についてはInPクラエ
ンド層9及び7が活性層8よりも屈折率が小さいので、
光閉込めが良好に行われ、また側面方向では、A文x
Ga +−xAsの屈折率が活性層8であるGa1nA
sPの屈折率よりも小さくなるようにXの値を設定する
ことにより良好に光閉込めを行わせることが出来る。In this case, since the InP end layers 9 and 7 have a lower refractive index than the active layer 8 in the vertical direction of this structure,
Light confinement is performed well, and in the lateral direction, A sentence x
Ga1nA whose refractive index of Ga + -xAs is active layer 8
By setting the value of X to be smaller than the refractive index of sP, it is possible to achieve good light confinement.
次に、電流狭窄につき、述べる。AfLx GaI−x
AsはInP及びGa InAsPよりもエネルギーギ
ャップがはるかに大きいため、このAi x Gap−
xAsの埋込み層領域10にはクラッド層9.7や活性
層8から電流は流れ込みにくい。また、Ill x G
a r−xAsの領域10と、InPの領域7及び9と
が格子整合していないため、内領域間の界面で高抵抗と
なる。さらに、 A文x Gap−xAsをノンドープ
にすることにより、容易に高抵抗層が選られる等の理由
から、注入された電流はほとんど埋込み層10には流れ
ないで、ダブルへテロ構造の領域のみに集中して流れ、
発光効率が高まる。Next, we will discuss current confinement. AfLx GaI-x
As As has a much larger energy gap than InP and Ga InAsP, this Aix Gap-
Current does not easily flow into the xAs buried layer region 10 from the cladding layer 9.7 and the active layer 8. Also, Ill x G
Since the a r-xAs region 10 and the InP regions 7 and 9 are not lattice matched, high resistance occurs at the interface between the inner regions. Furthermore, by making A-pattern x Gap-x non-doped, a high-resistance layer can be easily selected, so that almost no current injected flows into the buried layer 10, but only in the double heterostructure region. Concentrate on and flow,
Increases luminous efficiency.
尚、この実範例では半導体レーザ素子につき説明したが
、この素子の端面を臂開面とせずに、発光ダイオードと
して作動させ払ことも出来る。In this example, a semiconductor laser element has been described, but the end face of this element can also be operated as a light emitting diode without having an arm opening.
また、上述した下地層は必ずしも基板自体である必要は
なく、基板上に形成された他の層であっても良いが、い
ずれにしてもInP又はGa InAsPの混晶材料か
ら形成されていることが必要である。Further, the base layer mentioned above does not necessarily have to be the substrate itself, and may be another layer formed on the substrate, but in any case, it must be formed from a mixed crystal material of InP or Ga InAsP. is necessary.
また、これら各層の導電型は適当に組み合わせて選定で
きる。Further, the conductivity types of these layers can be selected in an appropriate combination.
さらに、このレーザは超格子構造であっても良い。Furthermore, this laser may have a superlattice structure.
(発明の効果)
上述した説明からも明らかなように、本発明の半導体発
光素子によれば、ダブルへテロ構造の両側にInP又は
Ga InAsPの混晶からなる下11i4層上にA又
x Gap−xAsの半絶縁性の埋込み層を設け、両者
の界面で格子不整合となしているので、この埋込み層は
電流狭窄層として良好に作動し、この界面を経る従来の
半導体発光素子のような電流漏洩経路は形成されない。(Effects of the Invention) As is clear from the above description, according to the semiconductor light emitting device of the present invention, A or - Since a semi-insulating buried layer of xAs is provided and there is a lattice mismatch at the interface between the two, this buried layer works well as a current confinement layer, and the current confinement layer passes through this interface as in a conventional semiconductor light emitting device. No current leakage path is formed.
従って、高注入昨に出力が飽和する恐れがなく、発光効
率が向上し、発振しきい値の低減を図れるという利点が
ある。Therefore, there is no possibility that the output will be saturated during high injection, and there are advantages in that the luminous efficiency is improved and the oscillation threshold can be reduced.
第1図は従来の埋込み形半導体発光素子の構造を説明す
るための断面図、
第2図は本発明の半導体発光素子の一実施例を示す略図
的拡大断面図である。
7・・・下地層(基板又は下側クラッド層)8・・・活
性層、 9・・・上側クラッド層10・・・埋込み層(
電流狭窄層)。FIG. 1 is a sectional view for explaining the structure of a conventional embedded semiconductor light emitting device, and FIG. 2 is a schematic enlarged sectional view showing an embodiment of the semiconductor light emitting device of the present invention. 7... Base layer (substrate or lower cladding layer) 8... Active layer, 9... Upper cladding layer 10... Buried layer (
current confinement layer).
Claims (1)
み形半導体発光素子において、該埋込み層を、InP又
はGaInAsPの混晶からなる下地層上に有機金属気
相成長法により成長させた半絶縁性A9LX Gat−
++Asを以って、構成して成ることを特徴とする半導
体発光素子。In a buried type semiconductor light emitting device having a buried layer on both sides of a double heterostructure, the buried layer is a semi-insulating semiconductor light-emitting device grown by organometallic vapor phase epitaxy on a base layer made of a mixed crystal of InP or GaInAsP. A9LX Gat-
A semiconductor light emitting device comprising ++As.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17097883A JPS6062180A (en) | 1983-09-16 | 1983-09-16 | Semiconductor light emitting element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17097883A JPS6062180A (en) | 1983-09-16 | 1983-09-16 | Semiconductor light emitting element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6062180A true JPS6062180A (en) | 1985-04-10 |
Family
ID=15914870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17097883A Pending JPS6062180A (en) | 1983-09-16 | 1983-09-16 | Semiconductor light emitting element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6062180A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09186402A (en) * | 1985-07-03 | 1997-07-15 | British Telecommun Plc <Bt> | Semiconductor structure |
-
1983
- 1983-09-16 JP JP17097883A patent/JPS6062180A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09186402A (en) * | 1985-07-03 | 1997-07-15 | British Telecommun Plc <Bt> | Semiconductor structure |
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