JPH04257284A - Buried hetero structured semiconductor laser - Google Patents

Buried hetero structured semiconductor laser

Info

Publication number
JPH04257284A
JPH04257284A JP3907991A JP3907991A JPH04257284A JP H04257284 A JPH04257284 A JP H04257284A JP 3907991 A JP3907991 A JP 3907991A JP 3907991 A JP3907991 A JP 3907991A JP H04257284 A JPH04257284 A JP H04257284A
Authority
JP
Japan
Prior art keywords
layer
semiconductor laser
type
current
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3907991A
Other languages
Japanese (ja)
Inventor
Naoto Sato
直人 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ando Electric Co Ltd
Original Assignee
Ando Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ando Electric Co Ltd filed Critical Ando Electric Co Ltd
Priority to JP3907991A priority Critical patent/JPH04257284A/en
Publication of JPH04257284A publication Critical patent/JPH04257284A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To provide a semiconductor laser which suppresses leaking current from a p-type clad layer to an InGaAsP gain suppressing layer and that prevents the reduction of light output even when high current is injected by preventing the turn-on of a p-n-p-n current block part by the InGaAsP gain suppressing layer and providing a separating layer which has a structure that prevents the gain suppressing layer from directly making contact with an activating layer and a clad layer on a mesa stripe side. CONSTITUTION:A current block part is provided with a gain suppressing layer 5, whose forbidden band width is wider than an activating layer 3 and narrower than a buffer layer 2 and a clad layer 4, and a separating layer 9 which has a structure that prevents the gain suppressing layer 5 from directly making contact with the activating layer 3 and the clad layer 4 on a mesa stripe side.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、活性層以外の領域に
電流が流れないように電流ブロック層を設けた埋め込み
ヘテロ構造半導体レーザについてのものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a buried heterostructure semiconductor laser in which a current blocking layer is provided to prevent current from flowing in regions other than the active layer.

【0002】0002

【従来の技術】光ファイバ通信用の光源には、埋め込み
ヘテロ構造半導体レーザ(以下、単に半導体レーザとい
う。)が主に用いられている。
2. Description of the Related Art Buried heterostructure semiconductor lasers (hereinafter simply referred to as semiconductor lasers) are mainly used as light sources for optical fiber communications.

【0003】次に、従来技術による半導体レーザの構成
を図2により説明する。図2の1はn型基板、2はn型
バッファ層、3は活性層、4は基板1と極性が反対のp
型クラッド層、12はp型電流ブロック層、6はn型電
流ブロック層、7はp型埋め込み層、8は電極形成層、
10はn側電極、11はp側電極である。
Next, the structure of a semiconductor laser according to the prior art will be explained with reference to FIG. In Figure 2, 1 is an n-type substrate, 2 is an n-type buffer layer, 3 is an active layer, and 4 is a p-type substrate whose polarity is opposite to that of substrate 1.
type cladding layer, 12 is a p-type current blocking layer, 6 is an n-type current blocking layer, 7 is a p-type buried layer, 8 is an electrode forming layer,
10 is an n-side electrode, and 11 is a p-side electrode.

【0004】図2では、発光部の活性層3に効率よく電
流が流れるように、活性層3を含むメサストライプ以外
の領域を活性層3と逆方向接合にして電流ブロック層1
2、6を形成し、p−n−p−nサイリスタ構造の電流
ブロック部にしている。しかし、p型クラッド層4から
p型電流ブロック層5に流れる漏れ電流がp−n−p−
n電流ブロック部のゲート電流として作用するので、高
電流注入動作時はp−n−p−n電流ブロック部のター
ンオンが起き、電流ブロック部全体に大きな電流が流れ
る結果、図4アの特性になる。
In FIG. 2, a region other than the mesa stripe including the active layer 3 is connected to the active layer 3 in the opposite direction to form a current blocking layer 1 so that current flows efficiently through the active layer 3 of the light emitting section.
2 and 6 are formed to form a current block portion having a pnpn thyristor structure. However, the leakage current flowing from the p-type cladding layer 4 to the p-type current blocking layer 5 is p-n-p-
Since it acts as the gate current of the n current block section, during high current injection operation, the p-n-p-n current block section is turned on, and as a result, a large current flows through the entire current block section, resulting in the characteristics shown in Figure 4A. Become.

【0005】次に、従来技術による他の半導体レーザの
構成を図3により説明する。図3は図2の半導体レーザ
を改善したものである。図3の5は利得抑制層であり、
その他は図2と同じものである。利得抑制層5は、禁制
帯幅が活性層3よりも広く、電流ブロック層5、6より
も狭いので、p−n−p−n電流ブロック部のゲート電
流に対する感度が下がり、ターンオンが発生しにくくな
る。しかし、利得抑制層5の禁制帯幅が図2のp型電流
ブロック層12よりも狭いので、p型クラッド層4から
の漏れ電流は大きくなり、図4イの特性となる。
Next, the structure of another semiconductor laser according to the prior art will be explained with reference to FIG. FIG. 3 shows an improved version of the semiconductor laser shown in FIG. 5 in FIG. 3 is a gain suppression layer,
The rest is the same as FIG. 2. Since the gain suppression layer 5 has a forbidden band width wider than that of the active layer 3 and narrower than that of the current blocking layers 5 and 6, the sensitivity of the p-n-p-n current blocking portion to the gate current decreases, and turn-on occurs. It becomes difficult. However, since the forbidden band width of the gain suppression layer 5 is narrower than that of the p-type current blocking layer 12 in FIG. 2, the leakage current from the p-type cladding layer 4 becomes large, resulting in the characteristics shown in FIG. 4A.

【0006】[0006]

【発明が解決しようとする課題】図2や図3では、それ
ぞれ電流ブロック部のターンオンが発生したり、漏れ電
流が増えたりするので、高出力が得られない。この発明
は、InGaAsP利得抑制層をn型バッファ層2とn
型電流ブロック層6の間に設けることにより、p−n−
p−n電流ブロック部のターンオンを防ぎ、メサストラ
イプ側面で利得抑制層が活性層3、p型クラッド層4に
直接触れない構造の隔離層を設けることにより、p型ク
ラッド層4からInGaAsP利得抑制層に流れる漏れ
電流を抑制し、高電流注入時にも光出力が低下しない半
導体レーザの提供を目的とする。
[Problems to be Solved by the Invention] In FIGS. 2 and 3, high output cannot be obtained because turn-on of the current block portion occurs and leakage current increases, respectively. This invention combines an InGaAsP gain suppression layer with an n-type buffer layer 2 and an n-type buffer layer 2.
By providing between the type current blocking layers 6, p-n-
InGaAsP gain suppression is achieved from the p-type cladding layer 4 by preventing turn-on of the p-n current blocking portion and providing an isolation layer with a structure in which the gain suppression layer does not directly touch the active layer 3 and the p-type cladding layer 4 on the side surface of the mesa stripe. The purpose of the present invention is to provide a semiconductor laser in which leakage current flowing through layers is suppressed and optical output does not decrease even when high current is injected.

【0007】[0007]

【課題を解決するための手段】この目的を達成するため
、この発明では、基板1上に、基板1と極性が同じバッ
ファ層2、活性層3、基板1と極性が反対のクラッド層
4を順次成長させ、活性層3を含むメサストライプ以外
の領域をクラッド層4の表面から活性層3が分断される
深さまで取り除き、電流ブロック層をこの部分に活性層
3と逆方向に接合して成長させる埋め込みヘテロ構造半
導体レーザにおいて、電流ブロック部に禁制帯幅が活性
層3よりも広く、バッファ層2、クラッド層4よりも狭
い利得抑制層5と、メサストライプ側面で利得抑制層5
が活性層3、クラッド層4に直接触れない構造の隔離層
9を備える。
[Means for Solving the Problems] In order to achieve this object, in the present invention, a buffer layer 2 having the same polarity as the substrate 1, an active layer 3, and a cladding layer 4 having the opposite polarity to the substrate 1 are provided on the substrate 1. The area other than the mesa stripe including the active layer 3 is removed from the surface of the cladding layer 4 to a depth where the active layer 3 is separated, and the current blocking layer is bonded to this area in the opposite direction to the active layer 3 and grown. In the buried heterostructure semiconductor laser, there is a gain suppression layer 5 in the current block portion whose forbidden band width is wider than that of the active layer 3 and narrower than that of the buffer layer 2 and the cladding layer 4, and a gain suppression layer 5 on the side surface of the mesa stripe.
The isolation layer 9 has a structure that does not directly touch the active layer 3 and the cladding layer 4.

【0008】[0008]

【作用】次に、この発明による半導体レーザの構成を図
1により説明する。図1の9は隔離層であり、その他の
部分は図3と同じものである。隔離層9は活性層3より
禁制帯幅が広く、活性層3、n型バッファ層2に比べて
抵抗率が高いので、p型クラッド層4を流れる電流のほ
とんどは活性層3を通してn型バッファ層2に流れ、隔
離層9へは微少な漏れ電流しか流れない。
[Operation] Next, the structure of the semiconductor laser according to the present invention will be explained with reference to FIG. Reference numeral 9 in FIG. 1 is an isolation layer, and the other parts are the same as in FIG. 3. Since the isolation layer 9 has a wider forbidden band width than the active layer 3 and has higher resistivity than the active layer 3 and the n-type buffer layer 2, most of the current flowing through the p-type cladding layer 4 passes through the active layer 3 to the n-type buffer layer. Only a small leakage current flows through the layer 2 and into the isolation layer 9.

【0009】高電流注入動作時にp型クラッド層4から
隔離層9、利得抑制層5を通りn型バッファ層2に流れ
込む電流は、p型埋め込み層7、n型電流ブロック層6
、利得抑制層5、n型バッファ層2で構成されるp−n
−p−nサイリスタ構造のゲート電流として作用するが
、利得抑制層5の存在によってターンオンが抑制され、
電流ブロック部全体に大きな電流が流れるのを防ぐ。こ
の結果、図1の半導体レーザは図4ウの特性になる。
During high current injection operation, current flowing from the p-type cladding layer 4 through the isolation layer 9 and the gain suppression layer 5 into the n-type buffer layer 2 flows through the p-type buried layer 7 and the n-type current blocking layer 6.
, a gain suppression layer 5, and an n-type buffer layer 2.
-Although it acts as a gate current of the pn thyristor structure, turn-on is suppressed by the presence of the gain suppression layer 5,
Prevent large current from flowing throughout the current block section. As a result, the semiconductor laser shown in FIG. 1 has the characteristics shown in FIG. 4C.

【0010】次に、図1の半導体レーザの製造方法を説
明する。半導体基板材料としてn型InPを使用する場
合を例にする。
Next, a method for manufacturing the semiconductor laser shown in FIG. 1 will be explained. Let us take as an example a case where n-type InP is used as the semiconductor substrate material.

【0011】まず、平坦な(100)n型InP基板1
上にn型InPバッファ層2、InGaAsP活性層3
、p型InPクラッド層4を順次成長させる。
First, a flat (100) n-type InP substrate 1
On top, an n-type InP buffer layer 2 and an InGaAsP active layer 3
, p-type InP cladding layer 4 is sequentially grown.

【0012】次に、通常のフォトリソ工程によって、活
性層が分断される深さまで幅1μm程度の〈011〉方
向メサストライプ状にエッチングする。このメサストラ
イプ部の側面にだけInP隔離層9を成長させた後、I
nGaAsP利得抑制層5、n型InP電流ブロック層
6、p型InP埋め込み層7、p型InGaAsP電極
形成層8を成長させ、最後に電極10、11を形成する
Next, by a normal photolithography process, the active layer is etched in a mesa stripe shape in the <011> direction with a width of about 1 μm to a depth that divides the active layer. After growing an InP isolation layer 9 only on the sides of this mesa stripe,
An nGaAsP gain suppression layer 5, an n-type InP current blocking layer 6, a p-type InP buried layer 7, a p-type InGaAsP electrode forming layer 8 are grown, and finally electrodes 10 and 11 are formed.

【0013】[0013]

【発明の効果】この発明によれば、InGaAsP利得
抑制層5の存在によってp−n−p−n電流ブロック部
のターンオンを防ぎ、InP隔離層9の存在によって、
p型クラッド層4からInGaAsP利得抑制層5に流
れる漏れ電流を抑制できるので、高電流注入時にも光出
力が低下しない半導体レーザが得られる。
According to the present invention, the presence of the InGaAsP gain suppression layer 5 prevents turn-on of the p-n-p-n current blocking portion, and the presence of the InP isolation layer 9 prevents turn-on of the p-n-p-n current block portion.
Since the leakage current flowing from the p-type cladding layer 4 to the InGaAsP gain suppression layer 5 can be suppressed, a semiconductor laser whose optical output does not decrease even when a high current is injected can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明による半導体レーザの構成図である。FIG. 1 is a configuration diagram of a semiconductor laser according to the present invention.

【図2】従来技術による半導体レーザの構成図である。FIG. 2 is a configuration diagram of a semiconductor laser according to the prior art.

【図3】従来技術による他の半導体レーザの構成図であ
る。
FIG. 3 is a configuration diagram of another semiconductor laser according to the prior art.

【図4】半導体レーザの光出力特性図である。FIG. 4 is a diagram showing optical output characteristics of a semiconductor laser.

【符号の説明】[Explanation of symbols]

1  n型基板 2  n型バッファ層 3  活性層 4  p型クラッド層 5  InGaAsP利得抑制層 6  n型電流ブロック層 7  p型埋め込み層 8  電極形成層 9  隔離層 10  n側電極 11  p側電極 12  p型電流ブロック層 1 N-type substrate 2 N-type buffer layer 3 Active layer 4 P-type cladding layer 5 InGaAsP gain suppression layer 6 N-type current blocking layer 7 P-type buried layer 8 Electrode forming layer 9 Isolation layer 10 N-side electrode 11 p-side electrode 12 p-type current blocking layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  基板(1) 上に、基板(1) と極
性が同じバッファ層(2) 、活性層(3) 、基板(
1) と極性が反対のクラッド層(4) を順次成長さ
せ、活性層(3) を含むメサストライプ以外の領域を
クラッド層(4) の表面から活性層(3) が分断さ
れる深さまで取り除き、この部分に活性層(3) と逆
方向接合の電流ブロック層を成長させる埋め込みヘテロ
構造の半導体レーザにおいて、電流ブロック部に禁制帯
幅が活性層(3) よりも広く、バッファ層(2) 、
クラッド層(4) よりも狭い利得抑制層(5) と、
メサストライプ側面で利得抑制層(5) が活性層(3
) 、クラッド層(4) に直接触れない構造の隔離層
(9) を備えることを特徴とする埋め込みヘテロ構造
半導体レーザ。
1. On a substrate (1), a buffer layer (2) having the same polarity as the substrate (1), an active layer (3), and a substrate (
A cladding layer (4) with opposite polarity to 1) is sequentially grown, and the area other than the mesa stripe including the active layer (3) is removed from the surface of the cladding layer (4) to a depth where the active layer (3) is separated. In a semiconductor laser with a buried heterostructure in which a current blocking layer is grown in this part in a direction opposite to the active layer (3), the forbidden band width in the current blocking part is wider than that of the active layer (3), and the buffer layer (2) ,
a gain suppression layer (5) narrower than the cladding layer (4);
On the side of the mesa stripe, the gain suppression layer (5) is connected to the active layer (3).
), a buried heterostructure semiconductor laser comprising an isolation layer (9) having a structure that does not directly touch the cladding layer (4).
【請求項2】  請求項1記載の隔離層(9) の抵抗
率がクラッド層(4) よりも高いことを特徴とする埋
め込みヘテロ構造半導体レーザ。
2. A buried heterostructure semiconductor laser according to claim 1, characterized in that the resistivity of the isolation layer (9) is higher than that of the cladding layer (4).
JP3907991A 1991-02-08 1991-02-08 Buried hetero structured semiconductor laser Pending JPH04257284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3907991A JPH04257284A (en) 1991-02-08 1991-02-08 Buried hetero structured semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3907991A JPH04257284A (en) 1991-02-08 1991-02-08 Buried hetero structured semiconductor laser

Publications (1)

Publication Number Publication Date
JPH04257284A true JPH04257284A (en) 1992-09-11

Family

ID=12543098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3907991A Pending JPH04257284A (en) 1991-02-08 1991-02-08 Buried hetero structured semiconductor laser

Country Status (1)

Country Link
JP (1) JPH04257284A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06338654A (en) * 1993-05-28 1994-12-06 Nec Corp Semiconductor laser, manufacture thereof and semiconductor laser array
JPH0888445A (en) * 1994-09-20 1996-04-02 Nec Corp Buried p-type substrate semiconductor laser

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06338654A (en) * 1993-05-28 1994-12-06 Nec Corp Semiconductor laser, manufacture thereof and semiconductor laser array
JPH0888445A (en) * 1994-09-20 1996-04-02 Nec Corp Buried p-type substrate semiconductor laser

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