JPS6059974U - Frequency/voltage conversion circuit - Google Patents
Frequency/voltage conversion circuitInfo
- Publication number
- JPS6059974U JPS6059974U JP15257283U JP15257283U JPS6059974U JP S6059974 U JPS6059974 U JP S6059974U JP 15257283 U JP15257283 U JP 15257283U JP 15257283 U JP15257283 U JP 15257283U JP S6059974 U JPS6059974 U JP S6059974U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- generates
- frequency
- conversion circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Recording Measured Values (AREA)
- Picture Signal Circuits (AREA)
- Networks Using Active Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案による周波数・電圧変換回路の一実施例
を示す回路図、第２図ａ −ｈは第１図に示す回路の各
部動作波形図である。
１・・・微分回路、２・・・リセット信号発生回路、３
・・・ラップ電圧発生回路、４・・・対数変換回路、５
・・・微分回路、６・・・サンプルホールド回路、７・
・・フィルタ。FIG. 1 is a circuit diagram showing an embodiment of the frequency/voltage conversion circuit according to the present invention, and FIGS. 2a to 2h are operational waveform diagrams of each part of the circuit shown in FIG. 1. 1... Differential circuit, 2... Reset signal generation circuit, 3
... Wrap voltage generation circuit, 4... Logarithmic conversion circuit, 5
...Differential circuit, 6...Sample hold circuit, 7.
··filter.
Claims (1)
する微分回路と、この微分回路から抛生されるパルス信
号に対してわずかに遅れたリセット信号を発生するリセ
ット信号発生回路と、定電流源の出力を積分するととも
に前記リセット信号により積分値がリセットされること
によってラップ電圧を発生するラップ電圧発生回路と、
前記ラップ電圧を対数変換する対数変換回路と、この対
数変換回路の出力信号を微分する微分回路と、この微分
回路の出力信号を前記パルス信号の発生時に保存して入
力信号の周波数に対応した出力信号を発生するサンプル
ホールド回路とを備えた周波数・電圧変換回路。A differentiating circuit that generates a pulse signal by differentiating the leading edge of an input signal, a reset signal generating circuit that generates a reset signal slightly delayed from the pulse signal generated from this differentiating circuit, and a constant current source. a wrap voltage generation circuit that generates a wrap voltage by integrating the output of the circuit and having the integrated value reset by the reset signal;
a logarithmic conversion circuit that logarithmically converts the wrap voltage; a differentiation circuit that differentiates the output signal of the logarithm conversion circuit; and an output signal that stores the output signal of the differentiation circuit when the pulse signal is generated and outputs a signal corresponding to the frequency of the input signal. A frequency/voltage conversion circuit equipped with a sample and hold circuit that generates a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15257283U JPS6059974U (en) | 1983-09-30 | 1983-09-30 | Frequency/voltage conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15257283U JPS6059974U (en) | 1983-09-30 | 1983-09-30 | Frequency/voltage conversion circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6059974U true JPS6059974U (en) | 1985-04-25 |
| JPS636686Y2 JPS636686Y2 (en) | 1988-02-25 |
Family
ID=30337792
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15257283U Granted JPS6059974U (en) | 1983-09-30 | 1983-09-30 | Frequency/voltage conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6059974U (en) |
-
1983
- 1983-09-30 JP JP15257283U patent/JPS6059974U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS636686Y2 (en) | 1988-02-25 |
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