JPS6057598A - Read-only memory - Google Patents

Abstract

PURPOSE:To protect secret of data which are stored by equipping a logic conversion circuit which converts logic of external output signals by output signals of an address detecting circuit which detects specific address selection using a memory-cell array and an address signal. CONSTITUTION:A logic conversion circuit 8 enables an output signal D to the condition of reverse or non-reverse rotation for an input signal (d) of the logic conversion circuit 8 by transfer gates T1 and T2 which are controlled by outputs Q and Q' of a flip-flop FF1 which makes phi1 as an input signal, and enables to set logic of ROM output to positive or negative logic. Therefore, when a specific address, which is set by a code setting part, is selected, logic of ROM output is converted from positive to negative logic or vice versa, and therefore, when the data, which are stored in ROM, are read without distinguishing the specific address from other addresses, wrong data are read, and as a result, secret is protected.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor read-only memory (hereinafter referred to as ROM) with an added data security function.

In recent years, with the development of ROM microcomputers,
Its uses are wide-ranging, and in particular, system operation programs are often stored and used.

By the way, the development of this operation program always requires a huge amount of man-hours, and it is necessary to protect it as an important secret, but if the operation program is stored in a conventional ROM, The stored contents can be easily read from the ROM, and it is difficult to protect the operation program as a secret.

An object of the present invention is to provide an R that can protect the confidentiality of data stored in normal situations where it is difficult to read the data easily.
The goal is to provide OM.

The ROM according to the present invention includes an address detection circuit for selecting a specific address with respect to a conventional ROM, and inverts the logic of the output of the 9ROM by the output of the address detection circuit when the specific address is selected. It is characterized by being equipped with a logic conversion circuit.

The present invention will be explained below using examples.

This embodiment differs from the conventional ROM shown in FIG.
Address signal A as shown in the figure. , AI, . . . An has an address detection circuit for selecting a specific address, and an output signal φ! of the address detection circuit is provided. Yo, 9RO
A logic conversion circuit for inverting the logic of the output of M is connected in series between the Y selector 5 and the output buffer 6.

As shown in FIG. 3, the address detection circuit is configured so that the code setting unit 9 receives the address signal ao input from the address manual buffer 1, and the code setting section 9 selects the address signal ao input from the address manual buffer 1, as shown in FIG. a,,possible1 '-' an r- NOR gate Q+ when a specific address is selected by the sieve
The Ql force φ is set to the "H" level, and the output φ is input to the logic conversion circuit. The code setting section can be easily set during the manufacturing process using a contact process mask, an aluminum plate mask, or the like.

As shown in FIG. 4, the logic conversion circuit is formed by a transfer gate (T+, Tz) controlled by the output Q and output of the flip-flop FFI which takes φ1 as an input signal. The output signal can be inverted or non-inverted, and the output logic of the ROM can be set to positive logic or negative logic.

Therefore, when the specific address set by the code setting section is selected, the logic of the ROM output? Since positive logic is converted to negative logic, or vice versa, if you distinguish the specific address from other addresses, <When attempting to read data stored in ROM. , since the logic of the output of R(li) after selecting the specific address is inverted, incorrect data will be read out.In other words, the confidentiality of the data stored in the ROM is protected. Well, by setting the specific address to the selected state, the output of !1llNORQ2 will always be IIL!Level, so whether the logic of the ROM output is a positive theory or a negative theory? Since it is possible to know the correct data stored in the ROM, if the data in the ROM is read without selecting the specific address, the correct data can be read out.

As explained above, according to the present invention, an address detection circuit is added to the conventional ROM, and a 5ROM is added to the conventional ROM by the output of the address detection circuit.
By providing a logic conversion circuit that converts the logic of the output of the ROM, it is possible to provide a small ROM that protects the confidentiality of stored data.

Figure 1 is an example of a block diagram showing the configuration of a conventional ROM, Figure 2 is a block diagram showing the configuration of the ROM of the present invention, and Figure 3 is an address detection circuit. FIG. 4 is a diagram showing an example of a logic conversion circuit.

1... Address human buffer, 2...
Medecoder, 3...Yr7 coder, 4...
...Memory cell array, 5...Y selector, 6...Output buffer, 7...Address detection circuit, 8...Logic conversion circuit, 9. ...
...Code setting section, Ql + Q2...NOR
Gate, (93...inverp-ke,-),'
f', Tx...Transfer gate, FF
1... indicates a flip-flop.

Claims (1)

[Claims] A read-only memo 1 comprising a memory cell array, an address detection circuit that detects selection of a specific address based on an address signal, and a logic conversion circuit that converts the logic of an external output signal based on the output signal of the address detection circuit.几