JPS6055506A - Peak shift compensating method for magnetic memory - Google Patents

Abstract

PURPOSE:To secure a sufficient phase margin even in case reading is performed with a thin film magnetic head by performing writing synchronously with the phase delayed or advanced clocks to a reference clock corresponding to bit intervals. CONSTITUTION:A clock generating circuit 11 produces a reference clock CL0, phase-advanced clocks CL1, CL2, CL3- and phase-delayed clocks CL11, CL12, CL13- compared with the clock CL0 respectively synchronously with a servo clock. These clocks are sent to a clock selecting circuit 12. While NRZ data to be written is converted into MFM data by an NRZ/MFM converting circuit 14 and sent to a bit string deciding circuit 15. The position information on a track to which the data and the bit cycle decided by the circuit 15 is sent to the circuit 12. The circuit 12 selects clocks which are used as a delay clock CLA for correction of advance quantity and an advance clock CLB for correction of delay quantity respectively. These clocks are sent to a correction data generating circuit 13 together with the clock CL0.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a peak shift compensation method for a magnetic recording device, and particularly to a peak shift compensation method for writing using a thin film magnetic recording device. This paper relates to improvements in the control method of loading timing.

(bl) Prior Art and Problems To read information recorded on a magnetic recording medium, as shown in FIG.
This is done by determining 1 or 0 depending on whether or not there is a signal 2 from the protruding head at 8 within a time defined by 1/l by the width t. However, as is well known, the read position in (12 windows@';) 1 fluctuates due to noise, waveform interference, and the like. The remaining tA and tB obtained by subtracting this jitter t° from the width t of the window (, j') are called the phase margin. expensive.

A phenomenon called peak shift 1 caused by waveform interference is known as one of the causes of reducing this phase margin. As shown in Figure 2 Tal, if there are two consecutive trust '1 degrees, writing is performed using a write current 3 with a waveform as shown in Figure 2 (1+l).When this is read by a magnetic head, the flit rises. The /1!1 shapes are 4 and 4 degrees, respectively.The composite waveform 5 of both is obtained as the output 5 of the magnetic heel 1.

In the above example, the peak position of the output 5 of the magnetic head does not coincide with the reversal position of the write current 3. This phenomenon is called peak shift.

The peak shift amounts A and B are determined at both ends of the short period when there are two successive signals °1 and the two before and after are "0", that is, when the bit interval continues from long period to short period to long period. The peak shift amount becomes the largest, and as the recording density becomes higher, the peak shift amount becomes relatively larger.

Therefore, the recording density in magnetic recording media increases significantly,
As the bit interval on the magnetic recording medium becomes narrower, the phase margin tA+t[l becomes smaller and smaller. Furthermore, in a disk-shaped magnetic recording medium such as a magnetic disk, the closer to the center of the disk, the higher the recording density becomes, and the phase margins 1A and 1B become smaller.

Therefore, in magnetic storage devices, in order to ensure a sufficient phase margin tAltB, writing is performed at intervals narrower than the original bit interval according to the peak shift sizes A and B, as shown in Figure 3, and the peak position of the read waveform is is corrected so that it is in its original position.

In this way, compensation for peak shift 1 has been conventionally performed, but in the case of the conventionally used Hulk Hesod, peak shift 1-GflA, I mouth J: /III-)'! The before and after Ura waveforms are almost the same, but in thin-film magnetic/rad, which has come into use in recent years due to its good 101 frequency characteristics, the pole face 14 is generally different on both sides of the gap, so peak shift polishing A, +3 are usually not equal. Therefore, with the conventional peak shift 1- compensation method, it may not always be possible to ensure a sufficient phase margin.

(C) ``Object 1'' of the present invention is to provide a peak shift compensation method that can sufficiently secure the phase -7-jin even when reading is performed using the thin film magnetic belly button 1. It is in.

+d) Structure of the Invention The feature of the present invention is that by performing the same 1u1 input with the delayed clock whose phase is delayed and the advance clock whose phase is advanced with respect to the reference clock corresponding to the bit interval, In correcting the write timing, the amount of delay of the delay clock and the amount of advance of the lead clock relative to the reference clock are independently selected based on the recording density and the bit pattern.

(el　Embodiments of the invention An embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a diagram showing the amount of peak shift when reading using the thin-film magnetic head described above, where the horizontal axis shows the recording density and the vertical axis shows the amount of peak shift with respect to the bit interval, that is, the amount of standardized peak shift. . As seen in the figure, when a thin film magnetic head is used, the readout waveform is not symmetrical, and even if the recording density is the same, the peak shift amount A and B
However, the amount of peak shift with respect to the bit interval is determined in accordance with the recording density.

In this embodiment, the peak shift amount is not only corrected depending on the recording density, that is, whether the trunk position is outside or inside the disk in the case of a magnetic disk, but also optimally corrected according to the bit interval. It also attempts to correct asymmetry.

Figure 4 shows MFM (Modified Frequency).
FIG. 2 is a diagram showing a bit pattern including a long-period bit string and its readout waveform according to a recording modulation method. In the MFM recording modulation method, when there are two successive 0's in the bit string to be written as shown in Figure 5 [al], they are replaced with two '0's and a '1' is inserted between the 11 as shown in figure (11). Convert ゛ into the inserted bit string and write it. Therefore, in the MFM recording modulation system, the bit pattern in which the bit string "110°" (hereinafter referred to as (1] 0)) shown in FIG. 4 repeats includes the longest bit interval.

[Note that the original data shown in Figure 5 1al is converted to NRZ (Not
6 is a block diagram showing the peak shift amount correction cycle Vδ used in an embodiment of the present invention. A method of correcting the peak shift amount according to the trunk position and bit string in this embodiment will be explained using the following.

In FIG. 6, 11 is a clock generation circuit, 12 is a clock selection circuit, 13 is a correction data generation circuit, and 14 is an NR
A Z-MFM conversion circuit, 15 a bit string discrimination circuit, and 16 a current conversion circuit.

In this embodiment, first, in synchronization with the servo clock, as shown in FIG. 7, the clock generation circuit 11 generates a reference clock CLo and a clock CLI + Cl3 + Cl3 + .
, and the phase-delayed clock CL11+ CLI2 +
It generates Cl2O+ and sends it to the clock selection circuit 12.

On the other hand, the data to be written, that is, NRZ data, is NRZ-
It is converted into MFM data in the MFM conversion circuit 14,
It is sent to the bit string discrimination circuit 15. This bit string discrimination circuit 15 reads in advance the MFM data and discriminates the bit period contained therein.

The determined bit period and position information of the trunk into which the data should be written are sent to the clock selection circuit 12.

In the clock selection circuit 12, a delayed clock C1, A for correcting the advance amount based on these two pieces of information,
Select the clock to be used as the advance clock CL for correcting the amount of delay 11i! f,, standard 1 point C
L. Along with the correction data '1. Send to Ii old 7813.

As mentioned above, the recording density of a magnetic disk is lower at the outer periphery and higher at the inner periphery, so the peak shift correction amount should be small when the trunk position is on the outer periphery, and large when the trunk position is on the inner periphery. It is necessary. Therefore, based on the track position information, the clock selection circuit 12 selects the reference clock C1 when the position of the track to be written is on the outer circumference.

The delay hl of the lagging clock (:LA) and the lead of the lead clock (:LB) are made small, and when the track position is on the inner circumference, both the lagging appendix and lead M and ffl are set large.

Moreover, the peak shift varies depending on the pitch I and the hit period in the column, and is maximum in the case of the above-mentioned 3L, 1llo]. Therefore ill Ili! The delay amount of the delayed clock and the lead y of the leading clock, BHL, are the bit string (1
In the case of (10), the largest value is selected, and for other bit strings, the value is selected to be smaller than in the case of (110), depending on the bit period.

Furthermore, when a thin-film magnetic head is used, peak shifts A and B are not equal, so in order to correct this, the amount of delay to the delayed clock CL and the amount of advance of the leading clock CLB are calculated based on FIG. Select separately.

For example, when the track position specified by the track position information is the inner circumferential portion and the write data is (110), the largest correction amount is selected for the bit string "11" in this data. Furthermore, in this case, if the amount of advance of the peak shift is greater than the amount of delay, then the clock with the maximum amount of delay, ie, Cl2O, is used as the delayed clock CLA, and the clock with the maximum amount of delay, ie, Cl2O, is used as the advanced clock CLB, and the amount of advance is the aforementioned delayed clock Ct, , 2, which is smaller than the delay amount of , 3 [Fig. 8, 2]
0].

The correction data generation circuit 13 uses the delayed clock CL, 3 and the advanced clock CL2 as the MFM data [FIG. 8, 20] sent from the bit discrimination circuit 15, in this case, the bit string (bit "1. ” is synchronized with -l° and compensated writing, 7r data 21 is made to output 4, and sent to current conversion circuit 1fi. Current conversion circuit 171'r 16
L; L Converts the compensated floating data 21 into a write current and sends it to a write head (not shown) to write at a predetermined position on the magnetic disk.

In this embodiment, the above operations are performed on the MFM to be written.
The data is read in advance to determine the bit pattern, and a delayed clock and an advanced clock are selected in advance according to this bit string and the 1γ position of the trasset clock 1) I! The write data is corrected in synchronization with this clock to generate compensated write data.1! In particular, V), the peak shift is corrected to the maximum. Therefore, according to this embodiment, when reading out information recorded in high density using a thin film magnetic head, t),
It is possible to secure a large phase margin for -1-', ).

(fl Effects of the Invention) As explained above, according to the present invention, it is possible to obtain a sufficiently large phase margin even when information recorded at high density on a magnetic disk is not read out with 1iVIK magnetic field. This makes it possible to improve the reliability of magnetic recording devices.

[Brief explanation of drawings]

Figures 1 to 3 are diagrams for explaining peak shift; Figures 1 and 2 are waveform diagrams, Figure 3 is a curve diagram showing the relationship between peak shift amount and recording density, and Figure 4 and FIG. 5 are diagrams showing a waveform diagram and a bit string for explaining the MFM recording modulation method, respectively, and FIGS. 6 to 8 are diagrams showing one embodiment of the present invention, and FIG. 6 is a diagram showing the above-mentioned one embodiment. FIG. 7 is a block diagram showing the peak shift amount correction circuit used in the above embodiment, FIG. 7 is a diagram showing the timing of the clock generated in the peak shift amount correction circuit, and FIG. FIG. 3 is a diagram showing a process of creating write data. In the figure, 1 is a window signal, 2 is a readout waveform,
3 is the write current, 4,4° is the isolated waveform, 5 is the composite waveform,
11 is a clock generation circuit, 12 is a clock selection circuit, 1
3 is a correction data generation circuit, 14 is an NRZ-MFM conversion circuit, 15 is a bit string discrimination circuit, 16 is a current conversion circuit, 2
0 is the bit string in the MFM data, 21 is the compensated write data, Δ and B are the peak shifts, tA and t, t
ri phase margin, C1,. For example, the reference clock CLΔ and CI,B are the delayed clock and the leading clock, C1, respectively. , CI,1,・
..., CI, 11°... indicate the generated clock. Agent Patent Attorney Sada Igata - 1 2 Fig. 3 1 = - T. Yoshikago Fig. 4 011011QI Lc Fig. 5 CLI Lz CL+ Fig. 6 Fig. 77 Fig. 8 LI (b) 1011 1 1

Claims (1)

[Claims] Writing is performed in synchronization with a delayed clock that is delayed by 77 phases relative to the reference clock corresponding to the bit interval, and an advanced clock that has a phase jl. The amount of deviation of the clock and the amount of advance of the leading clock are determined independently based on the recording density and focus pattern.
III! 1. A peak shift compensation method for a magnetic storage device, characterized in that: