JPS5958607A - Correcting system of write data in magnetic disc device - Google Patents

Abstract

PURPOSE:To reduce considerably the error rate for data read by detecting a read error to correct data on a basis of check data for optimum pre-shift check which is preliminarily recorded on a disc plate. CONSTITUTION:An encoding circuit 9 converts write data W to an encoded pulse signal and outputs it to a pre-shift circuit 10. The circuit 10 uses an optimum pre-shift value, which is set on a basis of an error detection result E of an error detecting circuit 8, to perform the pre-shift control for the pulse signal from the circuit 9. The pulse signal subjected to the pre-shift control in the circuit 10 is given to a write data control circuit 11. The circuit 11 oututs a write current corresponding to the pulse signal to a head control circuit 2. The circuit 2 drives and controls a head 1 in accordance with the write current to correct the data write. Thus, the error rate for data read is reduced considerably, and a stable characteristic is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a write data correction method for a magnetic disk device for reducing an error rate when reading data.

[Technical background of the invention and its problems]

In general, when reading data recorded on a magnetic disk board (hereinafter simply referred to as a disk board) in a magnetic disk device, the error rate (rate of errors) during reading has a large effect on the characteristics of the device. This is one of the important subtleties.

By reducing such error rate as much as possible, a magnetic disk device with stable characteristics can be obtained. To reduce the error rate, you need to increase Normal + Findou Marnon.

This window margin is the data window used when extracting data from the output of a magnetic bed (hereinafter referred to as a head), the peak zoft of the read waveform when reading data, and the PLO (Phase L) with respect to the window width.
When a data window is created using an activated 0scillator, blurring caused by the characteristics of the electronic circuit, noise, etc. is subtracted.

The r-window width is determined by the recording method used in the magnetic disk device. MF that has been widely used in recent years
Modified Frequency Mo
duration) method, 50% of the minimum bit interval
is the possible range of 1 yen as window 9. In addition, when extracting data from the head output, it is necessary to detect the peak position of the read waveform, but this peak position shifts from the written position. This is the peak shift mentioned above, and the The peak shift is determined by the head used in the magnetic disk device, the magnetic characteristics of the disk plate, the characteristics of the electronic circuit, noise, head positional deviation, etc.

Specifically, there is waveform interference particularly in the head output, and this waveform interference occurs because the bit interval recorded on the medium is narrow (for example, 4 to 2.5 μm). This causes a peak shift, and the peak shift) 3
3) It depends on the frequency characteristics determined by the head and disk plate. Usually, what is used to indicate this frequency characteristic is the resolution, which is the value obtained by dividing the output at the highest frequency for r small by the output at the lowest frequency.

By the way, in order to reduce the peak shift due to waveform interference, which is one of the factors for reducing the window marnon, as described above, a means called a preshift method has been conventionally used. With this pre-shift method, when data is written, it is shifted in the direction opposite to the peak shift (which occurs when reading as described above) and is set to 1. For example, as shown in FIG. 1(C), if a peak shift occurs in the readout waveform of the head, the decoded data (shown in FIG. 1(D))
The intervals are different from normal. In addition, Figure 1 (
A) shows the write data, and (E) shows its 14FM code. On the other hand, in the preshift method, as shown in Fig. 2 (C
), even if a peak shift occurs in the readout waveform of the head, the intervals of the data after decoding (shown in FIG. 2(D)) are normal intervals. However, conventionally, the preshift value used in the preshift method is fixed by a magnetic disc M. As a result, not only is it not possible to sufficiently improve the characteristics, that is, reduce the peak shift due to waveform interference, but there have also been cases where adverse effects have occurred.

That is, the resolution that influences the amount of peak shift is determined by the characteristics of the disk plate and the head, and also varies depending on the combination thereof and the position of the inner circumference, outer circumference, etc. on the disk plate. Therefore, depending on the magnetic disk device,
The preshift value becomes smaller than the peak shift amount at the time of head reading, and optimum characteristic improvement is not achieved. On the other hand, if it is too large, it may be harmful.

[Purpose of the invention]

This invention was made in view of the above circumstances, and sets an optimal preshift value according to the characteristics of the magnetic disk drive to reduce the peak shift caused by waveform interference of the head 9 output. It is an object of the present invention to provide a write data correction method for a magnetic disk device that can significantly reduce the error rate during reading and realize a magnetic disk device with stable characteristics.

[Summary of the invention]

That is, in the present invention, a track for data checking is provided in advance on the magnetic disk plate f, and check data for optimum serial shift checking having different preshift values is recorded in each sector of this track. Based on this check data, reading from the magnetic disk board (7 errors f, for example, is detected by an error detection circuit).

According to the result of this error detection, means is provided for selecting an optimum Norishift value from the preshift values of each sector, and data writing correction to the magnetic disk board is performed based on this optimum preshift value.

[Embodiments of the invention]

An embodiment of the present invention will be described with reference to the recent drawings. FIG. 3 shows a plot diagram according to this invention,
A two-head control circuit controls the operation of hect 1 to read and write data (hereinafter referred to as read) to a disk plate (not shown).

(referred to as "write"). The readout waveform (head reproduction signal) successively generated by the head control circuit 2 is amplified by the amplifier 3 and then applied to the differentiating circuit 4. This differential circuit 4
detects the peak from the read waveform and outputs it to cell'+j5. This circuit +j5 is a circuit that converts the above-mentioned peak into a pulse signal which is a desotal signal. pal v
The 9 pulse signal output from 5 is connected to the composite circuit 7 and PL.
given to both O6. The PLO 6 creates a data window based on the pulse signal from the pulser 5 as described above. Further, the composite circuit 7 includes a data separation circuit, etc., and outputs the pulse signal from the YARSA 5 as read data R completely reproduced by the data window. The read data R is read by the read clock I'r from the disk, and a read error E is detected based on the check data for optimum preshift check recorded in advance on the disk plate.

In contrast to the read circuit as described above, the write circuit will be explained. 9 is a code circuit which converts the write data W into an encoded pulse signal and outputs it to the Nori shift circuit 10. This pre-shift circuit 10 performs pre-shift control on the pulse signal from the encoder circuit 9 using the optimum print value set based on the error detection result E of the second detection circuit 8. Then, the cell signal, which is controlled by the preshift circuit IO, is transferred to the write data control circuit 1.
1 is given. The write data control circuit 11 includes the above-mentioned
Writing 1 according to the mother signal! Head split part 1 circuit 2
Output to.

The head control circuit 2 increases the write current and controls the drive of the spatula 1''I, resulting in writing the write data W onto the disk plate.

In such a configuration, the operation thereof will be explained with reference to FIGS. 4 and 6 showing specific circuits of the error detection circuit 8 and the Nori shift circuit lθ, which are the characteristics of the present invention. FIG. 4 shows a specific circuit of the error detection circuit 8, in which the read data R output from the composite circuit 7 is applied to the shift register 12 as described above. In this case, read data R
is stored in the shift register 12 in synchronization with the read clock r output from the composite circuit 2. Read data R
3 is created based on the read waveform read from the head l whose drive is controlled by the head control circuit 2, as shown in FIG. That is, the differential circuit 4 detects the peak of the readout waveform, and a signal corresponding to the peak position is generated.
Output from mother Lusa 5. This pulse signal from pulser 5 is given to PLO 6, thereby creating a data window. Then, the composite circuit 7 outputs the pulse signal as read data R completely reproduced using this data window.

This read data R is transferred to the shift register 1 as described above.
2, it is shifted by the read clock r and output to the controller 13 (output signal *R+ ~R
1). This controller has 3 output signals R1 to R3.
When all become "1", the output signal C8 which is "1" is transferred to D.
Output to type flip-flop 7°z4. When the DI7 flip 70 and f14 are set and the output signal Q+ is outputted to the frequency divider circuit Z5, the frequency divider circuit I5 is enabled. This frequency dividing circuit I5 divides the frequency of the lead clock signal to, for example, 1/3 and outputs it.
The output signal co of the 4' regulator Z3 is applied to one large output terminal of the AND circuit Z7 via the input gate Z6.

The other input terminal of this AND circuit 17 is given the output signal Q1 of the D-type frizz 7°14.The output signal a of this AND circuit I7 is
given to 8. The output signal f of the frequency dividing circuit I5 is applied to one input terminal of the AND circuit Z9, and the output signal f of the D-type flip-flop 18 is applied to the other input terminal.
(an inverted signal of output signal E) is given. This AND circuit 19 outputs its output signal to the Da flip 70 as a clock signal. Then, the comparator 13 reads the read data R (R,
~Rs) and determines that there is an error.
An output signal C6, which is rOJ, is applied to the inverter 16.

Therefore, the output signal a of the AND circuit Z2 becomes "1" and is applied to the D-type flip-flop 18. This D-type flip-flop frg outputs an error signal E as an output signal when the signal a is set. This error signal E becomes "1" because when the - group is set, the output signal f of the frequency dividing circuit 15 is prohibited by the AND circuit 19.
will be held. Note that the shift register 12 and the D-type flip-flops 14 and 18 receive a clear signal C.
L is commonly given and initialized before the error detection operation. Further, the read clock r is applied to one input terminal of the AND circuit 20. The output signal 4 of the D-type frizzo 70 and 14 is applied to the other input terminal of the AND circuit 20. And this AND circuit 20
The output signal is given to the D-type differential differential lodge 14 as a clock signal.

Incidentally, a timing chart for explaining the above operation is shown in FIG.

In this way, error E′t for read data R
-Can be detected. By the way, in the present invention, check data for checking the optimum seam shift as shown in FIG. 7 is recorded on the desk board in advance. That is, tracks for data checking are provided on predetermined data surfaces (inner station and outer periphery) of the disk plate, and the worst peak shift pattern (worst number or turn) with a different preshift value is written for each sector. This data check track is a location that is not used as a normal data area and cannot be accessed from outside the magnetic disk drive. However, when the power of the magnetic disk device is turned on, control is performed so that this track can be accessed. Such control is performed using, for example, a microprocessor (not shown).

This kind of check data is transferred from the disk plate to the head 1.
When reading using , data win from PLO6t)
"+7 The relationship between the DW and the pulse signal PL from the i4 Lusa 5 is read back and forth. Then, the read check data is checked by the error detection circuit 8 to see if a read error has occurred. This check is performed by determining the error signal E by a microprocessor (not shown).

This microprocessor ultimately determines the optimum preshift value that does not cause any errors in the sector that allows the maximum shift without causing a read error, that is, the sector shown in FIG. Specifically, P7
Head l is positioned on the check track as shown in the figure, and data is read. In this case, P recorded in advance
It is necessary to have a sufficiently long pattern for LO synchronization, and to write a synchronization number or turn indicating that PLO synchronization has been completed. Furthermore, PLO synchronous start is performed by INDg
This is done using the X signal or sector signal. And P
When the LO synchronization is completed and the synchronization pattern comes,
In the error detection circuit 8 shown in FIG. 4, the D-type flip-flop I4 is set and a step 2-check of the worst pattern of the check data is started. That is, for each sector, the microprocessor checks (7) the output signal i'f of the D-type flip 70ff1B of the error detection circuit 8 (7) to confirm whether a read error has occurred. By counting, it is possible to check in which sector a read error has occurred or not.This continues until an error occurs in all sectors. : Shift the timing of the noise signal PL and repeat the check. and,
The preshift value given to the sector in which no error occurs up to the maximum timing shift becomes the optimal preshift value. In this way, the optimum grit 77 values for the inner and outer peripheries of the disk plate are determined. The optimum preshift value for the disk plate is determined from these two optimum prissy y l -values, and if necessary, the preshift value is divided into inner and outer circumferences. The microprocessor stores this optimal preshift value.

Here, the shift of the data window DW and the nosolus signal PL will be briefly explained. FIG. 8 shows the timing of the data window DW and the pulse signal PL. P.L.O.
Reference numeral 6 normally has a circuit configuration as shown in FIG. 9, and operates so that the data window DW and the pulse signal PL are synchronized with an appropriate phase difference. PLO6 like this
is a digital-to-analog conversion path (D/A converter) 21.
22 is set to a predetermined value, 'current source 2
3. Current is output from 24. This current source 23.24
When there is no output current, resistors R1 and R are connected so that the pulse signal PL is in the center of the data window l)W.
Each value of 1 is set. In addition, in order to satisfy this timing, the charge time t1 and the discharge time are changed, that is, the transistor Try.

When the timing of each pace signal of Tr4 is set like this, when current is output from the current source 23, the charge current icO value to the capacitor C of the LPF (low pass filter) 25 becomes smaller accordingly. Also,
The data window DW must always oscillate at the same frequency.

Therefore, in order to keep the output of the LPF 25 constant, the pulse signal PL is operated so as to lag behind the center of the data window DW and hold the chart time tl for a long time.

At this time, the discharge time t2 is kept unchanged. Conversely, when a current is output from the current source 24, the timing is such that the pulse signal PL advances beyond the center of the data window DW. In this way,
By setting predetermined values in the D/A converters 21 and 22, the pulse signal PL can be shifted to a predetermined position with respect to the data window DW.

Next, after the optimum serial shift value is set as described above, write correction of the write data W is performed using this serial shift value. That is, as shown in FIG. 3, the write data W is first encoded by the encoding circuit 9 and given to the preshift circuit 10 as a pulse signal Wd. This preshift circuit IO is specifically configured as shown in FIG. 6, and the arm pulse signal Wd is applied to the delay line 30. This delay line 30 outputs signals Wd, ~Wd, having a constant delay time to the selector 31. Further, the pulse signal Wd is: - Arm turn identification circuit 32
It is determined whether or not it is delayed. This pattern identification circuit 32 outputs a control signal for advancing the pulse signal Wd to the delay time select control circuit 33 so as not to have a temporal change that delays the pulse signal Wd. This control circuit 33 is supplied with the optimum preshift values M, ~M3 from the microprocessor as described above, and receives the pulse signal Wd.
A Nori shift value corresponding to the above is determined, and its output signal is output to the selector 31. The selector 31 selects the output signals Wd1 to Wd and Wd from the delay line 30 based on the output signal of the digital time select control circuit 33, and outputs the selection signal Pr to the write data control circuit 11. and a write data control circuit LIIri,
A current of 2 VC corresponding to the write data W subjected to the optimum pre-shift control is outputted to one head control circuit. Therefore, the end result is that the optimal serial shift control is performed and the Nira() data W is completely included in the DSU board.

〔Effect of the invention〕

As described in detail above, according to the present invention, by detecting a read error based on the check data trap for checking the optimum rate shift recorded in advance on the disk board, the efficiency of the magnetic disk drive device is improved. You can set the optimal preshift value according to your needs. Therefore, data writing correction is performed based on this optimum series shift value. Therefore, when viewing data, it is possible to reduce the peak shift due to waveform interference of the head output, and it is possible to significantly reduce the rate at which data is read. That is, the window margin can be increased and a magnetic disk device with stable characteristics can be realized.

[Brief explanation of the drawing]

1 and 2 are timing charts for explaining the conventional write data correction method, FIG. 3 is a block diagram showing the basic configuration of an embodiment of the present invention, and FIG. 4 is an error detection circuit diagram. Fig. 5 is a timing chart to prove its operation, Fig. 6 is a concrete block diagram of the preshift circuit, Fig. 7 is a diagram showing an example of optimum preshift L-th check data, Fig. 8 This figure is a block diagram shown in FIG. 3, and is a timing chart of each output signal of the pulp and PLO, and FIG. 9 is a specific configuration diagram of the PLO. l...Magnetic head, 5...Pulser, 6...PLO,
8...Error detection circuit, IO...Nori shift circuit,
14.18...D flip-flop, 17.19
20...AND circuit, R1-R6...Resistor, Tr
l~Tr6...transistor, C...capacitor.

Claims (1)

[Claims] A magnetic recording device using print values recorded in advance in 1Ii12,
In the 1-degree data correction method of the Sufu device, a track for data check is provided in advance, and each sector of this track is recorded with check data for optimum preshift check having a different Nori shift value. a setting means for detecting a read error on the basis of the check data read from the disk board, and determining the grid shift value of the sector selected by h(f; based on the detection result as the optimum shift value); 1. A write data correction method for a magnetic disk device, comprising: a correction means for performing data write correction based on the optimum preshift value in addition to a normal data write operation.