JPS6054074A - Electron beam drawing data converting device - Google Patents

Abstract

PURPOSE:To obtain an electron beam drawing data converting device that can make high speed processing by sending data to a memory by the first computer and giving the memory block under control of the second computer and making fixed processing. CONSTITUTION:Data are sent by the first computer 1 to a buffer memory 4 from a data file disk 3 through a system bus 2. When transfer of the data is completed, the first computer 1 starts processing of the second computer 8 through the system bus 2 and a control circuit 9, and at the same time, a change-over switch 7 is made ON for the buffer memory 4, and a switch-over circuit 6 is made OFF. Further, the first computer 1 transfers remaining data to a buffer memory 5, and the second computer 8 starts processing and sends back the result obtained to the first computer 1 successively. When processing is completed for the buffer memory 4, processing is made for the buffer memory 5.

Description

[Detailed description of the invention] [Field of application of the invention] The present invention relates to an electron beam lithography data conversion device.

[Background of the invention]

Each electron beam lithography apparatus has its own data format. Various types of drawing data are output from the CAD system, and Rails converts them into a device-specific format, removes overlapping figures, reverses black and white, corrects dimensions, etc. calculation is required. With the development of Ls-Otori, the number of clicks has increased enormously, and improving the drawing speed has become a serious issue. The present invention relates to a solution to this problem.

Conventionally, conversion devices include those based on minicomputers and those based on large-scale computers, and the former are either built into a drawing device or used exclusively for conversion, and there is no one with sufficient processing speed. Although the latter is much faster than the former, it has disadvantages such as enormous system cost, the need to use a large computer for long periods of time, and the need for mobility.

[Purpose of the invention]

SUMMARY OF THE INVENTION It is an object of the present invention to provide an electron beam lithography data conversion apparatus capable of high-speed processing.

[Summary of the invention]

Processing in data conversion can be roughly divided into the following three types. (1) Processing of data distribution, management, etc.
(2) is a simple way to search for related data from a large amount of data, or data that seems to be related, for one graphic data. The logic is relatively simple, such as completing the entire process, and the processing is performed extremely many times.

(3) is a process in which the data selected in the former (2) is examined and processed in detail, and a large number of complex graphical logical operations are performed.

Regarding (1) and (3), it should be done comprehensively on the first computer755, and (21 on the second computer).
It is extremely advantageous to perform the processing 73 in parallel with the processing of (11. +31) by the first computer using the divider or logical operation circuit.

For example, when expressing a figure data using vector data as shown in Figure 1, in order to express one vector,
For example, it is necessary to hold some of the start point coordinates, end point coordinates, angle data, length data, etc. For example, the second
When using the lower left end coordinate and upper right end coordinate angle data as shown in the figure, at least ten or more bytes of data are required. When using a special computer or logic operation circuit that can perform batch parallel processing on these data, it is possible to speed up the process 81 in (2) and shorten the processing time.

Furthermore, by making the buffer memory a two-board memory, the second computer or arithmetic circuit can handle a large amount of data at high speed without disturbing the processing of the first computer. Also, by having buffer memory on two or more sides,
There is an advantage that data preparation by the first 8-scientific computer and processing (2) can be performed simultaneously and in parallel.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using Examples.

FIG. 3 is a block diagram showing an embodiment of the electronic 4'Ili image data conversion device in which there are two memory buffers. In the figure, there is a first computer (CPU) 1, which is responsible for overall control and complex logical processing. 2 is the system bus of the previous machine reducer l, 3
is the data file disk, 4 is the buffer memory (1)
, 5 is a buffer memory (2). 6 is a switching circuit seen from the system bus 2 and corresponds to the word length of the system bus 2. Reference numeral 7 denotes a switching circuit for the second computer or arithmetic circuit 8, which has a long word length in order to read and write graphic data at high speed. The switching circuit 7 is controlled so that the same buffer memory as the switching circuit 6 is not connected at the same time, thereby increasing the speed. A control circuit 9 provides data and control for the second computer 8 and the first computer l.

In such a configuration, the first computer l transfers data from the data file disk 3 to the data file disk 3.
→ First computer 1 → Data is sent to the uneven memory 4 via the system bus 2. When the data transfer to the buffer memory 4 is completed, the first n1 computer 1 starts the processing to the second computer 8 via the system bus 2 and the control circuit 9, and at the same time turns on the changeover switch 7. Buffer memo! I (1) 4 is turned ON and the switching circuit 6 is turned OFF. The first computer 1 further transfers the remaining data to the buffer memory IJ (215). The data is sent back to the computer 1 in the buffer memory (January 1).Once the processing for the buffer memos 1) and 4 is completed, processing is performed for the memory in the buffer memory (2) 5. A timing diagram of these described processes is shown in FIG.

FIG. 5 is a block diagram showing another embodiment of the electron beam lithography data conversion apparatus according to the present invention. The major difference in configuration from FIG. 3 is that a two-vote main memory is used as the buffer memory. In the figure, data from a data file disk 3 is sent to a buffer memory 4 in one high-speed transfer to prepare the data at high speed. A timing diagram for this case is shown in FIG.

By making the main memory two ports, the processing capacity of the first R1 computer 1 is not degraded because the high-speed data reading and writing performed by the second computer 8 does not prevent the memory bus from working. You will have advantages.

In the above-described embodiment, the case where the memory buffer is dual-sided is explained, but in this case, when processing is faster than transfer, a transfer bottleneck occurs. Therefore, by making the memory buffer three-sided, the seventh
As seen in the system operation timing diagram shown in the figure,
It becomes possible to solve the transfer bottleneck.

〔Effect of the invention〕

As is clear from the above description, the electron beam lithography data conversion device according to the present invention can speed up fil processing (10 times or more) by K or more, making it possible to realize a practical processing system using a small computer. .

(2) It becomes a dedicated system and provides mobility.

Effects such as this can be obtained.

[Brief explanation of the drawing]

FIG. 1 and FIG. 2 are explanatory diagrams showing examples of figure and vector display and vector expression, respectively, in the electron beam lithography data conversion device, and FIG. 3 shows an embodiment of the electron beam lithography data conversion device according to the present invention. Configuration diagram, g4 diagram a 3rd
3 is a system operation timing diagram, FIG. 5 is a configuration diagram showing another embodiment of the electron beam lithography f-ta converter according to the present invention, FIG. 6 is a system operation timing diagram in FIG. The figure is a system operation timing diagram which is an embodiment of the song in FIG. 1...First computer, 2...System bus, 3...
・Data file disk, 4, 5... Buffer memory, 6.7... Switching circuit, 8... Second computer, 9
...Control i-roll circuit. Agent Patent Attorney Tatsuyuki Unuma 5F! ] 1 figure, height 2m, 3 figures, coffin figure

Claims (1)

[Claims] 1. An electron beam lithography data conversion device that converts input lithography data into a data format specific to the lithography device and performs graphic calculation processing, which includes a first computer, two or more memory blocks, and a second high-speed calculation circuit. or a calculator, and the first
The computer controls one or more memory blocks and sends the data to be processed into the memory, and transfers the sent memory block to the control of a second computer or arithmetic circuit. The circuit controls one or more of the memory blocks, performs predetermined processing on the data stored in the memory, reports the calculation results to the first computer, and processes the data in the memory block. An electron beam lithography data conversion apparatus characterized in that, after completion, the memory block is returned to the control of the first computer.