JPS6052595B2 - solid-state image sensor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to blooming control of a solid-state image sensor, particularly a CCD image sensor.

A solid-state image sensor is provided with an accumulation section that accumulates charge carriers generated according to the amount of light received during the light reception period, but when this accumulation section receives locally strong incident light, excess charge that exceeds the amount of charge that can be handled is generated in this accumulation section. If a charge is generated locally,
This flows into other surrounding accumulation areas, that is, other picture elements,
or readout mechanism (e.g. CCD shift register section)
This causes so-called blooming, which significantly impairs the reproduced image.

In order to avoid the occurrence of such blooming, solid-state imaging devices employ the method of removing the above-mentioned surplus charge.

For example, in a solid-state image sensor using an interline transfer method, as shown in FIG. 3 is deposited on the substrate 1 to receive light, and a sensor section, that is, a light reception accumulation section, is provided which accumulates the charge generated according to the amount of received light. For example, an N-type overflow drain region 4 is provided facing the surface of the base 1 . 5 is a transfer gate electrode provided between a shift register section (not shown) and a sensor section, and 6 is a channel stopper region.

In this configuration, in the light-receiving state, for example, a positive predetermined voltage is applied to the sensor electrode 3. In this case, for example, the thickness of the insulating layer 2 is made partially different so that the solid line d shows the distribution of the surface potential. , part d, where a potential well is formed, that is, a minority carrier storage part, and a part (d) between this storage part and overflow drain region 4 (an overflow control forming a barrier shown by 2). A portion is provided so that surplus charge exceeding the amount of charge handled in the storage portion defined by this barrier mountain is sucked into the overflow drain region 4 as shown by arrow e.However,
In the case of a solid-state image sensor having such an overflow drain region 4, it is difficult to increase the density by reducing the unit pixel size due to limitations in microfabrication technology.
Another drawback is that the pixel area cannot be used effectively. The present invention provides a novel solid-state imaging device that does not have the above-mentioned drawbacks and can effectively eliminate excess charge.

That is, in the present invention, excess charge exceeding the amount of charge that the light receiving and accumulating section can handle is absorbed by the sensor electrode through the insulating layer covering the surface of the light receiving and accumulating section.

First, to explain the absorption of surplus charge in the solid-state image sensing device of the present invention, particularly the mechanism for eliminating and absorbing the surplus charge accumulated in the surface channel, in the present invention,
By replacing the MOS capacitor used in the conventional light receiving and accumulating unit with an MIS (metal-insulating-film-semiconductor) structure using a multilayer insulating film, such as the MNOS (metal-mono-nitride-monoxide-semiconductor) structure, the properties of the MOS capacitor can be utilized. The basic principle is to do so.
It is known that an insulating film such as a silicon nitride film (Si3N4) has nonlinear electrical conduction with respect to an electric field using electrons or holes as carriers, which is explained by a certain mechanism.

It has also been confirmed that in a silicon oxide film (SiO2), electrons mainly conduct from the silicon substrate under a certain electric field. Therefore, when a voltage is applied to a diode having an East B structure having a two-layer film of a silicon nitride film and a silicon oxide film as a gate film, a certain current can flow. An example regarding this characteristic is shown in FIG. FIG. 2 shows the MNOS structure shown in FIG. 3, in which a 50Af) SiO film 8 and a 400A(7) Si3N concentration 9 are deposited on a P-type silicon substrate 7, and an electrode 10 is deposited on top of the MNOS structure shown in FIG. The voltage when the voltage E applied between the electrode 10 and the substrate 7 is changed so that the electrode 10 side is positive when the light 11 is irradiated to the element formed by depositing the electrode 10! One current characteristic. According to this characteristic curve a, electrons are generated by irradiating the vicinity of the so-called East B capacitor on the P-type silicon substrate 7, and these electrons are transferred from the inversion layer on the surface of the silicon substrate to the SiO
It is thought that the liquid flowed to the electrode 10 through the 2-Si3N4 film 8-Si3N4 film 9. This diode characteristic is equivalent to a voltage-current characteristic having a certain threshold voltage determined from the structural gate film thickness. In FIG. 2, the voltage VO is a threshold voltage determined by the gate film thickness, particularly the film thickness of the SiO2 film 8, and any current below this value is a negligible current. Therefore, a light receiving and accumulating section having such characteristics, for example, P
A SiO. A light receiving and accumulating section is provided with a sensor electrode attached through a film and a Si3N4 film, and when a voltage higher than a threshold voltage determined by the film thickness is applied to the sensor electrode during the light receiving period, charge carriers are accumulated in this light receiving and accumulating section. is restricted from increasing beyond a certain amount.

That is, as the amount of electron charge increases, the potential of the inversion layer on the substrate surface approaches the substrate potential, and the electric field applied to the SiO2 film and the Si3N4 film increases. And that electric field is
Electron charges are accumulated until the threshold electric field determined by the O2 film thickness is exceeded, but once the threshold electric field is exceeded, the electron charges corresponding to the excess exceed the SiO2 layer as shown in the energy band model of the MNOS structure in Fig. , penetrates through the film due to the tunnel effect, conducts through the Si3N4 film, becomes a so-called electrode current, and is absorbed by the sensor electrode. That is, excess charge is removed and absorbed by the sensor electrode. Although the principle mechanism of the present invention has been shown above, examples of the present invention will now be described in detail.

This example is a case where the method is applied to a two-dimensional image sensor using an interline transfer method. First, with reference to FIG. 5, a schematic configuration of a solid-state image sensor using an interline transfer method will be described. In this solid-state image sensor, a plurality of light receiving and accumulating sections 21, which are so-called picture elements that accumulate signal charges generated by incident radiation of light, are arranged in row and column directions, that is, horizontally and vertically. Light receiving and accumulating section 21 on the vertical line
a vertical shift register section 22 consisting of a charge transfer element commonly provided corresponding to the vertical shift register section 22;
A horizontal shift register section 23 made of a charge transfer element is provided in common to both. 24 is an output circuit.

In this configuration, for example, in an odd-numbered field, the signal charges obtained in the received light storage section 21 on every other horizontal line according to the amount of light received are transferred to the vertical shift register 22, thereby causing the signal charge for each horizontal line to be transferred to the vertical shift register 22. is transferred to the horizontal shift register 23, and the horizontal shift register 23 sequentially sends the signal charges to the output circuit 24, which sequentially extracts the signals and transfers them to every other horizontal line in the even-numbered field. The signal charges in each of the above light receiving and accumulating sections 21 are transferred to the vertical shift register 22, simultaneously transferred to the horizontal shift register 23, and sent to the output circuit 24, from which the signals are sequentially extracted.

FIGS. 6 to 8 show essential parts of an example in which the present invention is applied to a solid-state imaging device using this interline transfer method.

In this example, the light receiving and accumulating section 21 has a surface channel type structure,
This is a case where the vertical shift register section 22 has a buried channel type structure. FIG. 6 is a schematic top view showing a portion of the light receiving and accumulating section 21 and the corresponding vertical shift register section 22, and FIGS. 7 and 8 are respectively on line AA and line B-- in FIG. It is each sectional view on the B line. In this example, 1
A semiconductor having a conductivity type, for example, a P-type silicon substrate 2
A channel stopper region 26 of the same conductivity type, P type, and having a high impurity concentration is provided facing the surface of 5, that is, one principal surface.

- In the part constituting the vertical shift register, there is a region 2 for forming an N-type buried channel of a conductivity type different from that of the base body 25.
7 is provided. Further, the vertical shift register section 22 has two
In the case of a phase clock type configuration, each shift register section 2
2 on a common horizontal line for each of the first and second electrodes 2
8a and 28b are commonly provided extending horizontally,
In each shift register section 22, there is a first insulating layer 29a under the first electrode 28a, and a first insulating layer 29a exists under the first electrode 28b.
A second insulating layer 29b, which is thinner than the first insulating layer 29a, exists underneath, so that the potential depths under each electrode 28a and 28b are different. Thus, at the potential of the buried channel, that is, the minimum potential, minority carriers (signal charges) are present under the first electrode 28a.
A so-called storage part St is formed in which a potential well is generated, and a transfer part Tr is formed under the second electrode 28b to form a potential barrier. A transfer gate section TG is provided between each storage section St and the corresponding light receiving and accumulating section 21, for example, by integrally extending the insulating layer 29a and the first electrode 28a of the storage section St. In this case, the channel stopper region 26 is integrally extended between each transfer section Tr and the corresponding light receiving and accumulating section 21. First and second electrodes 28a and 28b provided corresponding to each light receiving and accumulating section 21 of the shift register section 22 are connected to each other to form two sets of electrodes 281 and 282. Also,
The sensor electrode 31 provided in the light receiving and accumulating section is made of, for example, a transparent electrode, and can be commonly applied to each of the light receiving and accumulating sections 21 over the entire surface with an insulating layer 32 interposed therebetween. In this device, the present invention provides an insulating layer 32 covering the light receiving and accumulating portion 21, a first insulating layer 33'' made of silicon dioxide (SiO2) in contact with the surface of the base 25, and a nitride layer provided on this layer 33, for example. It has a two-layer structure with a second insulating layer 34 such as silicon (Si3N4).

The insulating layer 32 having a two-layer structure can be formed in the entire region corresponding to the light receiving and accumulating section 21 or a part thereof in relation to the amount of accumulation in the light receiving and accumulating section 21 .

The thickness of the first insulating layer 33 may be sufficient as long as the excess charge in the light receiving and accumulating section 21 flows through the tunnel effect.
A range of 0A to 50A is preferred. The thickness of layer 33 is 50A
If it exceeds 30 A, the threshold voltage for producing a tunnel effect becomes high, and if it is thinner than 30 A, a memory effect occurs, which is undesirable. The second insulating layer 34 is necessary to obtain the withstand voltage of the insulating layer, and the thickness of the layer 34 is preferably 400A or more in the case of silicon nitride (Si3N,), for example, and 400A or more.
If it is thinner than 0A, the withstand voltage will decrease. As the second insulating layer 34, in addition to silicon nitride (Si3N,), for example, alumina (
Al. O3) etc. are also possible. In principle, it is also possible to deposit a thick SiO2 layer that has a tunnel effect on the base 25 and provide the sensor electrode 31 directly thereon, but in this case, the withstand voltage cannot be obtained and the SiO2 layer is There is a risk of being destroyed. In a solid-state image sensor having such a configuration, a common predetermined positive voltage φ3 = "1" is applied to the sensor electrode 31 during the light reception and accumulation period as usual, and the potential well formed under the light reception and accumulation section 21 is Signal charges corresponding to the amount of light received are accumulated.

Next, for example, when reading an odd field, a voltage φ, = "0" is applied to the sensor electrode 31 during the transfer period from the light receiving and accumulating section 21 to the shift register section 22, and a clock signal is applied to one set of electrodes 281. Pulse φ1
=゜“1゛ is given, shift register section 2
In the buried channel No. 2, a potential well is formed in the storage section St under the first electrode 28a of this set of electrodes 281, and a potential well under the transfer gate section between the corresponding light receiving and accumulating section 21 is formed. The barrier is lowered, and the signal charges of the light receiving and accumulating sections 21, that is, the light receiving and accumulating sections 21 on every other horizontal line are sent to the storage section St via the transfer gate section TG. At this time, the clock pulse φ2 applied to the other set of electrodes 282 is, for example, 0V (
φ2=6° C.), and the signal charges in the light receiving and accumulating section corresponding to this group are not sent to the shift register 22. Then, in the next period, both sets of electrodes 281 and 28. Two sets of pulses φ1 and φ2 are applied to perform charge transfer in the vertical direction. When reading the next even field, the voltage φ5 = "゜0゛ is applied to the sensor electrode 31, and conversely to the above, the electrode 282 of the other set
By applying the clock pulse φ2=゜゜1゛ to the storage section St under the second electrode 282, the signal charges of every other corresponding light receiving and accumulating section 21 are sent. In the above-mentioned light reception accumulation period, especially in the present invention, the voltage φ applied to the sensor electrode 31 is
3, an insulating layer 32 having a two-layer structure, particularly a first insulating layer 3
A voltage equal to or higher than the threshold voltage determined by the film thickness of No. 3 is applied.

In this way, during the light reception and accumulation period, the amount of charge handled in the light reception and accumulation section 21, that is, the amount of saturated charge, is determined by the threshold voltage determined by the thickness of the insulating layer, and any surplus charge beyond that is determined by the first and second charges. It is absorbed into the sensor electrode through the insulating layers 33 and 34. That is, even if an excessive amount of charge is generated by light, a certain amount, ie, more than one amount of charge to be handled, becomes an electrode current and is absorbed by the sensor electrode 31, and the storage capacity is not exceeded. Further, the amount of charge to be handled is also defined by the area limitation of the two-layer structure of the first and second insulating layers 33 and 34. Therefore, so-called overflow drain. This has the same effect as providing an in area. There must be a balance between the surplus charge generated and the ability to absorb the deficit. The ability to absorb excess charge is proportional to the area of the two-layer structure formed by the first and second insulating layers 33 and 34, and is also proportional to the voltage φ3 applied to the sensor electrode 31. For this reason, if, for example, there is a large amount of surplus charge generated in relation to the amount of charge handled in the light receiving and accumulating section 21, the area of the insulating layer of the two-layer structure should be increased or
Alternatively, it is necessary to increase the sensor voltage φ. Note that in the above example, the overflow drain region of a conductivity type different from that of the conventional substrate is completely omitted, but the present invention and such an overflow drain region may be used together, and in this case, the overflow drain region requires a smaller area than conventional methods.

As described above, according to the solid-state image sensing device of the present invention, excess charges can be removed by being absorbed into the sensor electrode 31 via the insulating layer 32B in the light receiving and accumulating section, so that they do not mix with signal charges in other parts. It is possible to avoid the possibility that blooming may occur.

Unlike conventional overflow drain regions, there is no need to provide a region of a conductivity type different from that of the substrate adjacent to the light receiving and accumulating region, or even if such a region is provided, a relatively small area is sufficient, so the pixel area can be effectively utilized. This makes it possible to improve the degree of integration. Incidentally, in the conventional configuration having an overflow drain region, approximately 113 to 112 of the area occupied by the light receiving and accumulating section had to be allocated to the overflow drain region, but in the present invention, this is omitted or reduced. . Further, conventional overflow drain regions require fine processing on a flat surface with high dimensional accuracy, but the present invention has the advantage that manufacturing is easy because the accuracy of dimensional processing on a flat surface is not affected by characteristics. In the above example, the present invention is applied to a solid-state image sensor using an interline transfer method, but the present invention can also be applied to a solid-state image sensor using a frame transfer method, that is, an image portion of the CCD structure.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of the main parts of a solid-state image sensor using a conventional interline transfer method, Fig. 2 is a voltage-current characteristic diagram between an electrode and a substrate in a TOC structure element used to explain the present invention, and Fig. 3 is a cross-sectional view of the MNOS structure element, FIG. 4 is an energy band model diagram of the MNOS structure according to the present invention,
FIG. 5 is a schematic configuration diagram of an example of the solid-state image sensor of the present invention, FIG. 6 is a schematic top view of the main parts thereof, and FIGS. 7 and 8 are respectively on line A-A and line B-- It is a sectional view on the B line.

Claims (1)

[Claims] 1. A semiconductor substrate, a light receiving and accumulating portion provided on the substrate and accumulating signal charges generated by incident beam radiation, an insulating layer covering the surface of the semiconductor substrate, an electrode means provided on the insulating layer, and the above light receiving and accumulating portion. An insulating layer that covers at least a portion of the light receiving and accumulating portion is provided on a first insulating layer made of silicon dioxide and on the first insulating layer that is in contact with the surface of the semiconductor substrate. The thickness of the first insulating layer and the voltage applied to the electrode means are selected to be a value sufficient to cause excess charge in the light receiving and accumulating portion to flow from the base to the electrode means. A solid-state image sensor made of