JPS6052536U - Microprocessor signal detection circuit - Google Patents

Microprocessor signal detection circuit

Info

Publication number
JPS6052536U
JPS6052536U JP14121383U JP14121383U JPS6052536U JP S6052536 U JPS6052536 U JP S6052536U JP 14121383 U JP14121383 U JP 14121383U JP 14121383 U JP14121383 U JP 14121383U JP S6052536 U JPS6052536 U JP S6052536U
Authority
JP
Japan
Prior art keywords
detection circuit
signal detection
microprocessor
signal
microprocessor signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14121383U
Other languages
Japanese (ja)
Inventor
正美 飯出
Original Assignee
ソ−ド株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソ−ド株式会社 filed Critical ソ−ド株式会社
Priority to JP14121383U priority Critical patent/JPS6052536U/en
Publication of JPS6052536U publication Critical patent/JPS6052536U/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図及び第２図は、本考案の実施例を示す。 回路図。 １・・・マイクロプロセッサ（ＣＰＵ）　、２・・・ア
ドレス一致回路、３・・・信号ラッチ回路、４・・・ア
ンドゲート、５・・・メモリ、６・・・データラッチ回
路、７・・・優先順位回路、Ａ、　Ｂ・・・信号。1 and 2 show an embodiment of the invention. circuit diagram. DESCRIPTION OF SYMBOLS 1... Microprocessor (CPU), 2... Address matching circuit, 3... Signal latch circuit, 4... AND gate, 5... Memory, 6... Data latch circuit, 7...・Priority circuit, A, B...signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプロセッサで信号を検出する場合において、ア
ドレス一致回路からのアドレス一致出力と信号ラッチ回
路への信号及びリードストローブからの出力が全て一致
した場合にメモリをディセーブルとし、マイクロプロセ
ッサに予じめ条件設定したデータラッチ回路からのデー
タをメモリのデータとすり変えて送ることとしたマイク
ロプロセッサの信号検出回路。When detecting a signal with a microprocessor, if the address match output from the address match circuit, the signal to the signal latch circuit, and the output from the read strobe all match, the memory is disabled and the microprocessor is programmed with preconditions. A microprocessor signal detection circuit that replaces the data from the set data latch circuit with memory data and sends it.
JP14121383U 1983-09-12 1983-09-12 Microprocessor signal detection circuit Pending JPS6052536U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14121383U JPS6052536U (en) 1983-09-12 1983-09-12 Microprocessor signal detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14121383U JPS6052536U (en) 1983-09-12 1983-09-12 Microprocessor signal detection circuit

Publications (1)

Publication Number Publication Date
JPS6052536U true JPS6052536U (en) 1985-04-13

Family

ID=30315900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14121383U Pending JPS6052536U (en) 1983-09-12 1983-09-12 Microprocessor signal detection circuit

Country Status (1)

Country Link
JP (1) JPS6052536U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49107645A (en) * 1973-02-19 1974-10-12
JPS5144846A (en) * 1974-10-16 1976-04-16 Hitachi Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49107645A (en) * 1973-02-19 1974-10-12
JPS5144846A (en) * 1974-10-16 1976-04-16 Hitachi Ltd

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