JPS6052041A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6052041A
JPS6052041A JP58161369A JP16136983A JPS6052041A JP S6052041 A JPS6052041 A JP S6052041A JP 58161369 A JP58161369 A JP 58161369A JP 16136983 A JP16136983 A JP 16136983A JP S6052041 A JPS6052041 A JP S6052041A
Authority
JP
Japan
Prior art keywords
link
film
semiconductor memory
memory device
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58161369A
Other languages
Japanese (ja)
Inventor
Yasushi Terada
寺田 康
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58161369A priority Critical patent/JPS6052041A/en
Publication of JPS6052041A publication Critical patent/JPS6052041A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To magnify the margin of the accuracy of the position of projection of laser beams against a link, and to blow a laser positively by forming a film inclined-section capable of refracting laser beams on the link. CONSTITUTION:Sections 2a in this thickness are formed to a field oxide film 2 positioned at both sides of a link 3. Consequently, inclined sections 4a are shaped on both sides of the upper sections of the link 3 in a PSG film 4 on the section 2a. Accordingly, since projected laser beams are refracted to the link 3 side by the inclined sections 4a of the PSG film 4, laser beams are projected positively to the link 3 even when the position of projection of laser beams is displaced from the link 3.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は半導体メモリ装置、特に冗長性メモリにおけ
るレーザプロウリンクの構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates to a structure of a laser plow link in a semiconductor memory device, and in particular a redundancy memory.

〔従来技術〕[Prior art]

一般にこの種の冗長回路を備えた半導体メモリ装置、す
なわちスペアのメモリセルを有する半導体メモリ装置に
おいては、不良メモリセルを不活性にしたり、スペアデ
コーダに置換すべきアドレスを書き込んだりするために
、同装置上にリンクを設け、このリンクをレーザにより
ブロクするようにしている。
Generally, in a semiconductor memory device equipped with this type of redundant circuit, that is, a semiconductor memory device having spare memory cells, a redundant circuit is used to deactivate a defective memory cell or to write an address to be replaced in a spare decoder. A link is provided on the device, and this link is blocked by a laser.

こ\で従来例によるこのような半導体メモリ装置におけ
るレーザプロウリンクの概要構成を第1図に示す。すな
わち、この第1図従来例装置において、符号(1)は半
導体基板、(2)はこの基板(1)上に形成されたフィ
ールド酸化膜、(3)はこの酸化膜(2)上にあってポ
リシリコン、シリサイドもしくはポリサイドによシ形成
されたレーザプロウリンク、(4)はこれらの上を被覆
するPEG膜である。なお、この場合、PSG膜(4)
を被覆させない構成とすることもある。
FIG. 1 shows a schematic configuration of a laser plow link in such a conventional semiconductor memory device. That is, in the conventional device shown in FIG. 1, reference numeral (1) indicates a semiconductor substrate, (2) indicates a field oxide film formed on this substrate (1), and (3) indicates a field oxide film formed on this oxide film (2). (4) is a PEG film covering the laser plow links formed of polysilicon, silicide, or polycide. In this case, the PSG film (4)
In some cases, the structure may be such that it is not covered.

そしてこの半導体メモリ装置、例えば256 K(D)
RAMとか64 K(S)RAMなどでは、現在、幅2
 μm程度のリンクが使用されておシ、またレーザ光源
としては波長1.06μmのYAGが利用されていて、
このレーザのビーム径は6μm程度であるので、前記第
1図従来例装置のリンク(3)では、p s cJ4)
による屈折を殆ど無視できることから、レーザビームの
照射位置のリンクからのずれが2μm程度以下であれば
、リンクの両端に亘った照射が可能になって正確なプロ
ウを期待でき、またこれはPEG膜(4)のない場合に
ついても同様である。
And this semiconductor memory device, for example, 256 K(D)
Currently, the width of RAM and 64K(S) RAM is 2.
A link of about μm is used, and YAG with a wavelength of 1.06 μm is used as a laser light source.
Since the beam diameter of this laser is about 6 μm, in the link (3) of the conventional device in FIG.
Since the refraction caused by The same applies to the case without (4).

しかし乍ら一方、レーザ装置自体のビーム照射精度はせ
いぜい±1.5μm程度であシ、かつ正確なビーム照射
のためには、他にも種々の要因がか\わってくるので、
前記したリンクからのずれが2μm程度以下という値は
、確実なレーザプロウをなすためのマージンとしては少
なすぎるものであった。
However, on the other hand, the beam irradiation accuracy of the laser device itself is at most about ±1.5 μm, and various other factors come into play for accurate beam irradiation.
The value of the deviation from the link of about 2 μm or less was too small as a margin for reliable laser plowing.

〔発明の概要〕[Summary of the invention]

この発明は従来のこのような欠点に鑑み、リンクを覆う
被膜によるレーザビームの屈折を利用することによって
、レーザビームの照射位置精度に関するマージンを拡大
させ、これによって確実なレーザビームを行なえるよう
にしたものである。
In view of these conventional drawbacks, the present invention utilizes the refraction of the laser beam by the film covering the link to expand the margin regarding the accuracy of the laser beam irradiation position, thereby ensuring reliable laser beam irradiation. This is what I did.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明装置の実施例につき、第2図ないし第4
図を参照して詳細に説明する。
Embodiments of this invention device will be described below with reference to FIGS. 2 to 4.
This will be explained in detail with reference to the drawings.

第2図ないし第4図はそれぞれに各別の実施例であって
、これらの各図中、前記第1図従来装置と同一符号は同
一または相当部分を示している。
2 to 4 show different embodiments, and in each of these figures, the same reference numerals as in the conventional device shown in FIG. 1 indicate the same or corresponding parts.

こ\でレーザビームは基板表面に対して垂直に照射され
るから、とのレーザビームを屈折させるためには、被膜
としてのPSG膜(4)のリンク近傍表面に大きな角度
の傾斜部分を設ける必要がある。
In this case, the laser beam is irradiated perpendicularly to the substrate surface, so in order to refract the laser beam, it is necessary to provide a sloped part with a large angle on the surface of the PSG film (4) as a coating near the link. There is.

第2図実施例は前記リンク(3)の両側に位置するフィ
ールド酸化膜(2)に厚さの薄い部分(21)を形成さ
せ、これによってその上のPSG膜(4)に同リンク(
3)の上部両側で傾斜部分(4M)を形成させたもので
ある。
In the embodiment shown in FIG. 2, a thin portion (21) is formed in the field oxide film (2) located on both sides of the link (3), and this causes the PSG film (4) thereon to be formed on the link (3).
3), sloped portions (4M) are formed on both sides of the upper part.

従ってこの第2図実施例の場合には、照射されるレーザ
ビームがPSG膜(4)の傾斜部分(4a’7によりリ
ンク(3)側に屈折されるために、このレーザビームの
照射位置がリンク(3)から若干ずれることがあっても
、確実にリンク(3)に照射されてプロウでき、レーザ
ビームの照射位置精度のマージンを拡大できるのである
Therefore, in the case of the embodiment shown in FIG. 2, since the irradiated laser beam is refracted toward the link (3) by the inclined portion (4a'7) of the PSG film (4), the irradiation position of this laser beam is Even if the laser beam deviates slightly from the link (3), the link (3) can be reliably irradiated and the margin of accuracy of the irradiation position of the laser beam can be expanded.

なお、この第2図実施例でのPSG膜は、これよりも屈
折率の大きいシリコン窒化膜に置き代えてよシ一層照射
位置精度のマージンを拡大することも可能であシ、さら
にはPSG膜の上にシリコン窒化膜を形成させて二重構
造としてもよい。
The PSG film in the embodiment shown in FIG. 2 can be replaced with a silicon nitride film having a higher refractive index to further expand the margin of irradiation position accuracy. It is also possible to form a double structure by forming a silicon nitride film thereon.

また第3図実施例のように前記リンク(3/の両側のp
 s aM (4)をエツチングによシ選択的に除去し
て同様に傾斜部分(4m)を形成させてもよく、具体的
にはコンタクトホールの開口と同時にエツチングすれば
よい。そしてこの第3図実施例の場合にあっても前記し
九PSG膜のシリコン窒化膜への置換。
In addition, as in the embodiment shown in FIG.
The sloped portion (4m) may be similarly formed by selectively removing saM (4) by etching, and specifically, etching may be performed simultaneously with the opening of the contact hole. Also in the case of the embodiment of FIG. 3, the PSG film is replaced with a silicon nitride film as described above.

PSG膜とシリコン窒化膜との二重構造を適用すること
ができ、かつまた第4図実施例に示したように、第3図
構造上にさらにシリコン窒化膜(5)を形成させるよう
にしてもそれなりの効果が得られる。
A double structure of a PSG film and a silicon nitride film can be applied, and as shown in the embodiment of FIG. 4, a silicon nitride film (5) can be further formed on the structure of FIG. 3. can also have some effect.

〔発明の効果〕 以上詳述したようにこの発明によるときは、リンク上に
レーザビームを屈折し得る被膜傾斜部分を形成させるよ
うにしたから、このリンクに対するレーザビームの照射
位置精度のマージンを拡大テキ、これによって常に正確
なレーザプロウを実行し得るほか、構造的にも簡単であ
るなどの特長を有するものである。
[Effects of the Invention] As detailed above, according to the present invention, since a sloped portion of the coating that can refract the laser beam is formed on the link, the margin of accuracy of the irradiation position of the laser beam with respect to this link is expanded. This method not only enables accurate laser plowing at all times, but also has the advantage of being simple in structure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例装置によるレーザプロウリンクの概要構
成を示す断面図、第2図ないし第4図はこの発明装置の
各別の実施例によるレーザプロウリンクの概要構成をそ
れぞれに示す断面図である。 (1)・・・・半導体基板、(2)・・・・フィールド
酸化膜、(3)・・・・レーザブロウリンク、(4)・
・・・PSG膜、(4a)・・・・PSG膜の傾斜部分
、(5)・・・・シリコン窒化膜。 代理人 大岩増雄 221− 萬4図 手続補正書(自発) 特許庁長官殿 1、事件の表示 特願昭58−161369号2、発明
の名称 半導体メモリ装置 3、補正をする者 事件との関係 特許出願人 住 所 東京都千代田区丸の内二丁目2番3号名 称 
(601)三菱電機株式会社 代表者片山仁八部 4、代理人 住 所 東京都千代口1区丸の内二丁目2番3号明細書
の図面の簡単な説明の欄 6、補正の内容
FIG. 1 is a cross-sectional view showing the general structure of a laser plow link according to a conventional device, and FIGS. 2 to 4 are cross-sectional views showing the general structure of laser plow links according to different embodiments of the device of the present invention. be. (1)...Semiconductor substrate, (2)...Field oxide film, (3)...Laser blow link, (4)...
... PSG film, (4a) ... Slanted portion of PSG film, (5) ... Silicon nitride film. Agent Masuo Oiwa 221- 4th figure procedural amendment (voluntary) Commissioner of the Japan Patent Office 1. Indication of the case: Japanese Patent Application No. 161369/1982. 2. Title of the invention: Semiconductor memory device 3. Relationship with the person making the amendment. Patent. Applicant address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name
(601) Mitsubishi Electric Corporation Representative Hitoshi Katayama 4, Agent Address 2-2-3 Marunouchi, Chiyoguchi 1-ku, Tokyo Column 6 of the brief explanation of the drawings in the specification, Contents of the amendment

Claims (1)

【特許請求の範囲】 (1)レーザプロウリンクを有する半導体メモリ装置に
おいて、前記リンク上にレーザビームを屈折し得る被膜
を設けると共に、リンク両側に位置して被膜に傾斜部分
を形成させたことを特徴とする半導体メモリ装置。 (→ リンク両側部分の被膜を選択的にエツチングして
、同両側に傾斜部分を形成させたことを特徴とする特許
請求の範囲第1項記載の半導体メモリ装置。 (3)被膜がPSG膜であることを特徴とする特許請求
の範囲第1項または第2項記載の半導体メモリ装置。 (4)被膜がシリコン窒化膜であることを特徴とする特
許請求の範囲第1項または第2項記載の半導体メモリ装
置。 (5)被膜がPSG膜とシリコン窒化膜との二重構造で
あることを特徴とする特許請求の範囲第1項記載の半導
体メモリ装置。 (6) 被膜上にさらにシリコン窒化膜を形成したこと
を特徴とする特許請求の範囲第2項記載の半導体メモリ
装置。
[Scope of Claims] (1) In a semiconductor memory device having a laser plow link, a coating capable of refracting a laser beam is provided on the link, and sloped portions are formed in the coating on both sides of the link. Features of semiconductor memory device. (→ The semiconductor memory device according to claim 1, characterized in that the film on both sides of the link is selectively etched to form sloped parts on both sides. (3) The film is a PSG film. (4) A semiconductor memory device according to claim 1 or 2, characterized in that: (4) a semiconductor memory device according to claim 1 or 2, characterized in that the film is a silicon nitride film; (5) The semiconductor memory device according to claim 1, wherein the coating has a double structure of a PSG film and a silicon nitride film. (6) Further silicon nitride on the coating. 3. The semiconductor memory device according to claim 2, wherein a film is formed.
JP58161369A 1983-08-31 1983-08-31 Semiconductor memory device Pending JPS6052041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58161369A JPS6052041A (en) 1983-08-31 1983-08-31 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58161369A JPS6052041A (en) 1983-08-31 1983-08-31 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6052041A true JPS6052041A (en) 1985-03-23

Family

ID=15733773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58161369A Pending JPS6052041A (en) 1983-08-31 1983-08-31 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6052041A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920075A (en) * 1982-06-15 1990-04-24 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device having a lens section

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920075A (en) * 1982-06-15 1990-04-24 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device having a lens section

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